Lines Matching refs:U32
353 U32 Word32;
512 U32 MsgContext; /* 08h */
515 U32 PageAddress; /* 18h */
543 U32 MsgContext; /* 08h */
546 U32 IOCLogInfo; /* 10h */
637 U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
656 U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
666 U32 Reserved1; /* 04h */
675 U32 ISVolumeSettings; /* 48h */
676 U32 IMEVolumeSettings; /* 4Ch */
677 U32 IMVolumeSettings; /* 50h */
678 U32 Reserved3; /* 54h */
679 U32 Reserved4; /* 58h */
680 U32 Reserved5; /* 5Ch */
687 U32 Reserved8; /* 68h */
688 U32 Reserved9; /* 6Ch */
730 U32 Reserved3; /* 10h */
731 U32 Reserved4; /* 14h */
745 U32 ProductSpecificInfo;/* 04h */
754 U32 Pinout; /* 00h */
759 U32 Reserved2; /* 18h */
795 U32 Reserved1; /* 04h */
796 U32 Reserved2; /* 08h */
797 U32 Flags; /* 0Ch */
815 U32 ProductSpecificInfo;/* 04h */
825 U32 ProductSpecificInfo;/* 04h */
835 U32 ProductSpecificInfo;/* 04h */
859 U32 Flags; /* 04h */
891 U32 Flags; /* 04h */
892 U32 BiosVersion; /* 08h */
894 U32 Reserved1; /* 1Ch */
940 U32 Reserved1; /* 04h */
955 U32 TotalNVStore; /* 04h */
956 U32 FreeNVStore; /* 08h */
961 U32 ClassCode; /* 14h */
973 U32 Flags; /* 04h */
974 U32 CoalescingTimeout; /* 08h */
1024 U32 CapabilitiesFlags; /* 04h */
1116 U32 Reserved1; /* 04h */
1129 U32 CapabilitiesFlags; /* 04h */
1141 U32 Reserved5; /* 14h */
1142 U32 SupportedStripeSizeMapIS; /* 18h */
1143 U32 SupportedStripeSizeMapIME; /* 1Ch */
1144 U32 Reserved6; /* 20h */
1152 U32 IRNvsramVersion; /* 30h */
1153 U32 Reserved11; /* 34h */
1154 U32 Reserved12; /* 38h */
1180 U32 BiosOptions; /* 04h */
1181 U32 IOCSettings; /* 08h */
1182 U32 Reserved1; /* 0Ch */
1183 U32 DeviceSettings; /* 10h */
1249 U32 Reserved1; /* 00h */
1250 U32 Reserved2; /* 04h */
1251 U32 Reserved3; /* 08h */
1252 U32 Reserved4; /* 0Ch */
1253 U32 Reserved5; /* 10h */
1254 U32 Reserved6; /* 14h */
1255 U32 Reserved7; /* 18h */
1256 U32 Reserved8; /* 1Ch */
1257 U32 Reserved9; /* 20h */
1258 U32 Reserved10; /* 24h */
1259 U32 Reserved11; /* 28h */
1260 U32 Reserved12; /* 2Ch */
1261 U32 Reserved13; /* 30h */
1262 U32 Reserved14; /* 34h */
1263 U32 Reserved15; /* 38h */
1264 U32 Reserved16; /* 3Ch */
1265 U32 Reserved17; /* 40h */
1274 U32 Reserved2; /* 04h */
1275 U32 Reserved3; /* 08h */
1276 U32 Reserved4; /* 0Ch */
1278 U32 Reserved5; /* 18h */
1279 U32 Reserved6; /* 1Ch */
1280 U32 Reserved7; /* 20h */
1281 U32 Reserved8; /* 24h */
1282 U32 Reserved9; /* 28h */
1283 U32 Reserved10; /* 2Ch */
1284 U32 Reserved11; /* 30h */
1285 U32 Reserved12; /* 34h */
1286 U32 Reserved13; /* 38h */
1287 U32 Reserved14; /* 3Ch */
1288 U32 Reserved15; /* 40h */
1296 U32 Reserved1; /* 04h */
1297 U32 Reserved2; /* 08h */
1298 U32 Reserved3; /* 0Ch */
1300 U32 Reserved4; /* 18h */
1301 U32 Reserved5; /* 1Ch */
1302 U32 Reserved6; /* 20h */
1303 U32 Reserved7; /* 24h */
1304 U32 Reserved8; /* 28h */
1305 U32 Reserved9; /* 2Ch */
1306 U32 Reserved10; /* 30h */
1307 U32 Reserved11; /* 34h */
1308 U32 Reserved12; /* 38h */
1309 U32 Reserved13; /* 3Ch */
1310 U32 Reserved14; /* 40h */
1319 U32 Reserved2; /* 04h */
1320 U32 Reserved3; /* 08h */
1321 U32 Reserved4; /* 0Ch */
1323 U32 Reserved5; /* 18h */
1324 U32 Reserved6; /* 1Ch */
1325 U32 Reserved7; /* 20h */
1326 U32 Reserved8; /* 24h */
1327 U32 Reserved9; /* 28h */
1328 U32 Reserved10; /* 2Ch */
1329 U32 Reserved11; /* 30h */
1330 U32 Reserved12; /* 34h */
1331 U32 Reserved13; /* 38h */
1332 U32 Reserved14; /* 3Ch */
1333 U32 Reserved15; /* 40h */
1339 U32 Reserved1; /* 08h */
1340 U32 Reserved2; /* 0Ch */
1342 U32 Reserved3; /* 18h */
1343 U32 Reserved4; /* 1Ch */
1344 U32 Reserved5; /* 20h */
1345 U32 Reserved6; /* 24h */
1346 U32 Reserved7; /* 28h */
1347 U32 Reserved8; /* 2Ch */
1348 U32 Reserved9; /* 30h */
1349 U32 Reserved10; /* 34h */
1350 U32 Reserved11; /* 38h */
1351 U32 Reserved12; /* 3Ch */
1352 U32 Reserved13; /* 40h */
1358 U32 Reserved1; /* 08h */
1359 U32 Reserved2; /* 0Ch */
1361 U32 Reserved3; /* 18h */
1362 U32 Reserved4; /* 1Ch */
1363 U32 Reserved5; /* 20h */
1364 U32 Reserved6; /* 24h */
1365 U32 Reserved7; /* 28h */
1366 U32 Reserved8; /* 2Ch */
1367 U32 Reserved9; /* 30h */
1368 U32 Reserved10; /* 34h */
1369 U32 Reserved11; /* 38h */
1370 U32 Reserved12; /* 3Ch */
1371 U32 Reserved13; /* 40h */
1377 U32 Reserved1; /* 08h */
1378 U32 Reserved2; /* 0Ch */
1382 U32 Reserved4; /* 1Ch */
1383 U32 Reserved5; /* 20h */
1384 U32 Reserved6; /* 24h */
1385 U32 Reserved7; /* 28h */
1386 U32 Reserved8; /* 2Ch */
1387 U32 Reserved9; /* 30h */
1388 U32 Reserved10; /* 34h */
1389 U32 Reserved11; /* 38h */
1390 U32 Reserved12; /* 3Ch */
1391 U32 Reserved13; /* 40h */
1409 U32 Reserved1; /* 04h */
1410 U32 Reserved2; /* 08h */
1411 U32 Reserved3; /* 0Ch */
1412 U32 Reserved4; /* 10h */
1413 U32 Reserved5; /* 14h */
1414 U32 Reserved6; /* 18h */
1450 U32 Capabilities; /* 04h */
1451 U32 PhysicalInterface; /* 08h */
1499 U32 Configuration; /* 04h */
1500 U32 OnBusTimerValue; /* 08h */
1530 U32 PortFlags; /* 04h */
1531 U32 PortSettings; /* 08h */
1583 U32 NegotiatedParameters; /* 04h */
1584 U32 Information; /* 08h */
1615 U32 RequestedParameters; /* 04h */
1616 U32 Reserved; /* 08h */
1617 U32 Configuration; /* 0Ch */
1648 U32 DomainValidation; /* 04h */
1649 U32 ParityPipeSelect; /* 08h */
1650 U32 DataPipeSelect; /* 0Ch */
1709 U32 Flags; /* 04h */
1714 U32 PortIdentifier; /* 0Ch */
1717 U32 SupportedServiceClass; /* 20h */
1718 U32 SupportedSpeeds; /* 24h */
1719 U32 CurrentSpeed; /* 28h */
1720 U32 MaxFrameSize; /* 2Ch */
1723 U32 DiscoveredPortsCount; /* 40h */
1724 U32 MaxInitiators; /* 44h */
1798 U32 Flags; /* 04h */
1831 #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << M…
1832 #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_…
1833 #define MPI_FCPORTPAGE1_FLAGS_PROT_LAN ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCP…
1834 #define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << …
1882 U32 Did;
1923 U32 PortFlags; /* 04h */
1924 U32 PortSettings; /* 08h */
1970 U32 Reserved; /* 04h */
1996 U32 Reserved; /* 04h */
2007 U32 BitVector[8]; /* 04h */
2017 U32 Reserved; /* 04h */
2020 U32 UnitType; /* 18h */
2021 U32 PhysicalPortNumber; /* 1Ch */
2022 U32 NumAttachedNodes; /* 20h */
2134 U32 HwConfig1; /* 08h */
2135 U32 HwConfig2; /* 0Ch */
2171 U32 PortIdentifier; /* 14h */
2283 U32 MaxLBA; /* 10h */
2284 U32 MaxLBAHigh; /* 14h */
2285 U32 StripeSize; /* 18h */
2286 U32 Reserved2; /* 1Ch */
2287 U32 Reserved3; /* 20h */
2318 U32 Reserved1; /* 48h */
2319 U32 Reserved2; /* 4Ch */
2395 U32 Reserved1; /* 0Ch */
2400 U32 MaxLBA; /* 68h */
2432 U32 Reserved1; /* 08h */
2449 U32 PacketPrePad; /* 08h */
2465 U32 MinPacketSize; /* 08h */
2466 U32 MaxPacketSize; /* 0Ch */
2467 U32 HardwareAddressLow; /* 10h */
2468 U32 HardwareAddressHigh; /* 14h */
2469 U32 MaxWireSpeedLow; /* 18h */
2470 U32 MaxWireSpeedHigh; /* 1Ch */
2471 U32 BucketsRemaining; /* 20h */
2472 U32 MaxReplySize; /* 24h */
2473 U32 NegWireSpeedLow; /* 28h */
2474 U32 NegWireSpeedHigh; /* 2Ch */
2511 U32 ControllerPhyDeviceInfo;/* 04h */
2514 U32 DiscoveryStatus; /* 0Ch */
2577 U32 ControllerPhyDeviceInfo; /* 04h */
2705 U32 Reserved1; /* 08h */
2706 U32 MaxInvalidDwordCount; /* 0Ch */
2707 U32 InvalidDwordCountTime; /* 10h */
2708 U32 MaxRunningDisparityErrorCount; /* 14h */
2709 U32 RunningDisparityErrorTime; /* 18h */
2710 U32 MaxLossDwordSynchCount; /* 1Ch */
2711 U32 LossDwordSynchCountTime; /* 20h */
2712 U32 MaxPhyResetProblemCount; /* 24h */
2713 U32 PhyResetProblemTime; /* 28h */
2731 U32 DiscoveryStatus; /* 14h */
2777 U32 PhyInfo; /* 14h */
2778 U32 AttachedDeviceInfo; /* 18h */
2786 U32 Reserved4; /* 24h */
2830 U32 DeviceInfo; /* 1Ch */
2877 U32 Reserved1; /* 08h */
2879 U32 Reserved2; /* 14h */
2894 U32 EnclosureMapping; /* 10h */
2922 U32 AttachedDeviceInfo; /* 18h */
2927 U32 PhyInfo; /* 20h */
2979 U32 Reserved1; /* 08h */
2980 U32 InvalidDwordCount; /* 0Ch */
2981 U32 RunningDisparityErrorCount; /* 10h */
2982 U32 LossDwordSynchCount; /* 14h */
2983 U32 PhyResetProblemCount; /* 18h */
2997 U32 Reserved1; /* 08h */
3007 U32 Reserved2; /* 20h */
3008 U32 Reserved3; /* 24h */
3042 U32 TimeStamp; /* 00h */
3043 U32 Reserved1; /* 04h */
3057 U32 Reserved1; /* 08h */
3058 U32 Reserved2; /* 0Ch */