Lines Matching refs:U16
352 U16 Word16[2];
363 U16 ExtPageLength; /* 04h */
509 U16 ExtPageLength; /* 04h */
540 U16 ExtPageLength; /* 04h */
545 U16 IOCStatus; /* 0Eh */
618 U16 DeviceID; /* 00h */
673 U16 ExtFlags; /* 0Eh */
683 U16 Reserved6; /* 62h */
686 U16 Reserved7; /* 66h */
729 U16 Reserved2; /* 0Eh */
758 U16 Slot; /* 16h */
801 U16 Reserved4; /* 22h */
881 U16 AdapterFlags; /* 02h */
924 U16 Reserved2; /* 06h */
925 U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
957 U16 VendorID; /* 0Ch */
958 U16 DeviceID; /* 0Eh */
962 U16 SubsystemVendorID; /* 18h */
963 U16 SubsystemID; /* 1Ah */
1002 U16 Reserved3; /* 06h */
1064 U16 Reserved2; /* 06h */
1076 U16 Reserved; /* 02h */
1085 U16 Reserved1; /* 06h */
1119 U16 Reserved3; /* 0Ah */
1140 U16 Reserved4; /* 12h */
1147 U16 Reserved8; /* 26h */
1148 U16 MaxBadBlockTableEntries; /* 28h */
1149 U16 Reserved9; /* 2Ah */
1150 U16 IRNvsramUsage; /* 2Ch */
1151 U16 Reserved10; /* 2Eh */
1184 U16 NumberOfDevices; /* 14h */
1187 U16 IOTimeoutBlockDevicesNonRM; /* 18h */
1188 U16 IOTimeoutSequential; /* 1Ah */
1189 U16 IOTimeoutOther; /* 1Ch */
1190 U16 IOTimeoutBlockDevicesRM; /* 1Eh */
1295 U16 PCIAddress; /* 02h */
1380 U16 SlotNumber; /* 18h */
1381 U16 Reserved3; /* 1Ah */
1417 U16 Reserved8; /* 1Eh */
1503 U16 IDConfig; /* 0Eh */
1523 U16 DeviceFlags; /* 02h */
1689 U16 MsgRejectCount; /* 04h */
1690 U16 PhaseErrorCount; /* 06h */
1691 U16 ParityErrorCount; /* 08h */
1692 U16 Reserved; /* 0Ah */
1891 U16 Flags; /* 12h */
1945 U16 Reserved; /* 02h */
2023 U16 IPVersion; /* 24h */
2024 U16 UDPPortNumber; /* 26h */
2026 U16 Reserved1; /* 38h */
2027 U16 TopologyDiscoveryFlags; /* 3Ah */
2054 U16 Wavelength; /* 4Ch */
2133 U16 Reserved2; /* 06h */
2174 U16 BBCredit; /* 1Ah */
2175 U16 MaxRxFrameSize; /* 1Ch */
2213 U16 Reserved; /* 00h */
2226 U16 Reserved; /* 02h */
2244 U16 Settings; /* 00h */
2334 U16 Reserved; /* 02h */
2335 U16 ErrorCount; /* 04h */
2338 U16 SmartCount; /* 08h */
2366 U16 Reserved; /* 02h */
2412 U16 Reserved1; /* 02h */
2417 U16 Flags; /* 16h */
2431 U16 Reserved2; /* 06h */
2447 U16 TxRxModes; /* 04h */
2448 U16 Reserved; /* 06h */
2462 U16 Reserved; /* 04h */
2492 U16 MaximumBuffers; /* 08h */
2493 U16 Reserved1; /* 0Ah */
2512 U16 AttachedDeviceHandle; /* 08h */
2513 U16 ControllerDevHandle; /* 0Ah */
2521 U16 NvdataVersionDefault; /* 08h */
2522 U16 NvdataVersionPersistent; /* 0Ah */
2525 U16 Reserved3; /* 0Eh */
2578 U16 MaxTargetPortConnectTime; /* 08h */
2579 U16 Reserved1; /* 0Ah */
2594 U16 ControlFlags; /* 08h */
2595 U16 MaxNumSATATargets; /* 0Ah */
2596 U16 AdditionalControlFlags; /* 0Ch */
2597 U16 Reserved1; /* 0Eh */
2671 U16 Reserved2; /* 0Ah */
2672 U16 MaxPersistentIDs; /* 0Ch */
2673 U16 NumPersistentIDsUsed; /* 0Eh */
2676 U16 MaxNumPhysicalMappedIDs;/* 12h */
2729 U16 EnclosureHandle; /* 0Ah */
2732 U16 DevHandle; /* 18h */
2733 U16 ParentDevHandle; /* 1Ah */
2734 U16 ExpanderChangeCount; /* 1Ch */
2735 U16 ExpanderRouteIndexes; /* 1Eh */
2770 U16 Reserved2; /* 0Ah */
2773 U16 NumTableEntriesProgrammed; /* 0Eh */
2776 U16 AttachedDevHandle; /* 12h */
2779 U16 OwnerDevHandle; /* 1Ch */
2821 U16 Slot; /* 08h */
2822 U16 EnclosureHandle; /* 0Ah */
2824 U16 ParentDevHandle; /* 14h */
2827 U16 DevHandle; /* 18h */
2831 U16 Flags; /* 20h */
2880 U16 DevHandle; /* 18h */
2916 U16 OwnerDevHandle; /* 08h */
2917 U16 Reserved1; /* 0Ah */
2919 U16 AttachedDevHandle; /* 14h */
2999 U16 Flags; /* 14h */
3000 U16 EnclosureHandle; /* 16h */
3001 U16 NumSlots; /* 18h */
3002 U16 StartSlot; /* 1Ah */
3044 U16 LogSequence; /* 08h */
3045 U16 LogEntryQualifier; /* 0Ah */
3059 U16 NumLogEntries; /* 10h */
3060 U16 Reserved3; /* 12h */