Lines Matching +full:reg +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/memory/tegra30-mc.h>
42 .reg = 0x34c,
43 .shift = 0,
55 .reg = 0x228,
59 .reg = 0x2e8,
60 .shift = 0,
72 .reg = 0x228,
76 .reg = 0x2f4,
77 .shift = 0,
89 .reg = 0x228,
93 .reg = 0x2e8,
94 .shift = 16,
106 .reg = 0x228,
110 .reg = 0x2f4,
111 .shift = 16,
123 .reg = 0x228,
127 .reg = 0x2ec,
128 .shift = 0,
140 .reg = 0x228,
144 .reg = 0x2f8,
145 .shift = 0,
157 .reg = 0x228,
161 .reg = 0x2ec,
162 .shift = 16,
174 .reg = 0x228,
178 .reg = 0x2f8,
179 .shift = 16,
191 .reg = 0x228,
195 .reg = 0x300,
196 .shift = 0,
208 .reg = 0x228,
212 .reg = 0x308,
213 .shift = 0,
225 .reg = 0x228,
229 .reg = 0x308,
230 .shift = 16,
242 .reg = 0x228,
246 .reg = 0x328,
247 .shift = 0,
259 .reg = 0x228,
263 .reg = 0x364,
264 .shift = 0,
276 .reg = 0x228,
280 .reg = 0x2e0,
281 .shift = 0,
293 .reg = 0x228,
297 .reg = 0x2e4,
298 .shift = 0,
310 .reg = 0x228,
314 .reg = 0x2f0,
315 .shift = 0,
327 .reg = 0x228,
331 .reg = 0x2fc,
332 .shift = 0,
344 .reg = 0x228,
348 .reg = 0x334,
349 .shift = 0,
361 .reg = 0x228,
365 .reg = 0x33c,
366 .shift = 0,
378 .reg = 0x228,
382 .reg = 0x30c,
383 .shift = 0,
395 .reg = 0x228,
399 .reg = 0x318,
400 .shift = 0,
412 .reg = 0x228,
416 .reg = 0x310,
417 .shift = 0,
429 .reg = 0x228,
433 .reg = 0x310,
434 .shift = 16,
446 .reg = 0x228,
450 .reg = 0x334,
451 .shift = 16,
463 .reg = 0x228,
467 .reg = 0x33c,
468 .shift = 16,
480 .reg = 0x228,
484 .reg = 0x328,
485 .shift = 16,
497 .reg = 0x228,
501 .reg = 0x32c,
502 .shift = 0,
514 .reg = 0x228,
518 .reg = 0x32c,
519 .shift = 16,
531 .reg = 0x228,
535 .reg = 0x344,
536 .shift = 0,
548 .reg = 0x228,
552 .reg = 0x344,
553 .shift = 16,
565 .reg = 0x228,
569 .reg = 0x350,
570 .shift = 0,
582 .reg = 0x22c,
586 .reg = 0x338,
587 .shift = 0,
599 .reg = 0x22c,
603 .reg = 0x340,
604 .shift = 0,
616 .reg = 0x22c,
620 .reg = 0x354,
621 .shift = 0,
633 .reg = 0x22c,
637 .reg = 0x354,
638 .shift = 16,
650 .reg = 0x22c,
654 .reg = 0x358,
655 .shift = 0,
667 .reg = 0x22c,
671 .reg = 0x358,
672 .shift = 16,
684 .reg = 0x324,
685 .shift = 0,
697 .reg = 0x320,
698 .shift = 0,
710 .reg = 0x22c,
714 .reg = 0x300,
715 .shift = 16,
727 .reg = 0x22c,
731 .reg = 0x304,
732 .shift = 0,
744 .reg = 0x22c,
748 .reg = 0x304,
749 .shift = 16,
761 .reg = 0x22c,
765 .reg = 0x330,
766 .shift = 0,
778 .reg = 0x22c,
782 .reg = 0x364,
783 .shift = 16,
795 .reg = 0x22c,
799 .reg = 0x368,
800 .shift = 0,
812 .reg = 0x22c,
816 .reg = 0x368,
817 .shift = 16,
829 .reg = 0x22c,
833 .reg = 0x36c,
834 .shift = 0,
846 .reg = 0x22c,
850 .reg = 0x30c,
851 .shift = 16,
863 .reg = 0x22c,
867 .reg = 0x2e0,
868 .shift = 16,
880 .reg = 0x22c,
884 .reg = 0x2e4,
885 .shift = 16,
897 .reg = 0x22c,
901 .reg = 0x338,
902 .shift = 16,
914 .reg = 0x22c,
918 .reg = 0x340,
919 .shift = 16,
931 .reg = 0x22c,
935 .reg = 0x318,
936 .shift = 16,
948 .reg = 0x22c,
952 .reg = 0x314,
953 .shift = 0,
965 .reg = 0x22c,
969 .reg = 0x31c,
970 .shift = 0,
982 .reg = 0x324,
983 .shift = 16,
995 .reg = 0x320,
996 .shift = 16,
1008 .reg = 0x22c,
1012 .reg = 0x330,
1013 .shift = 16,
1025 .reg = 0x22c,
1029 .reg = 0x348,
1030 .shift = 0,
1042 .reg = 0x22c,
1046 .reg = 0x348,
1047 .shift = 16,
1059 .reg = 0x22c,
1063 .reg = 0x350,
1064 .shift = 16,
1076 .reg = 0x22c,
1080 .reg = 0x35c,
1081 .shift = 0,
1093 .reg = 0x22c,
1097 .reg = 0x35c,
1098 .shift = 16,
1110 .reg = 0x230,
1114 .reg = 0x360,
1115 .shift = 0,
1127 .reg = 0x230,
1131 .reg = 0x360,
1132 .shift = 16,
1142 { .name = "dc", .swgroup = TEGRA_SWGROUP_DC, .reg = 0x240 },
1143 { .name = "dcb", .swgroup = TEGRA_SWGROUP_DCB, .reg = 0x244 },
1144 { .name = "epp", .swgroup = TEGRA_SWGROUP_EPP, .reg = 0x248 },
1145 { .name = "g2", .swgroup = TEGRA_SWGROUP_G2, .reg = 0x24c },
1146 { .name = "mpe", .swgroup = TEGRA_SWGROUP_MPE, .reg = 0x264 },
1147 { .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 },
1148 { .name = "afi", .swgroup = TEGRA_SWGROUP_AFI, .reg = 0x238 },
1149 { .name = "avpc", .swgroup = TEGRA_SWGROUP_AVPC, .reg = 0x23c },
1150 { .name = "nv", .swgroup = TEGRA_SWGROUP_NV, .reg = 0x268 },
1151 { .name = "nv2", .swgroup = TEGRA_SWGROUP_NV2, .reg = 0x26c },
1152 { .name = "hda", .swgroup = TEGRA_SWGROUP_HDA, .reg = 0x254 },
1153 { .name = "hc", .swgroup = TEGRA_SWGROUP_HC, .reg = 0x250 },
1154 { .name = "ppcs", .swgroup = TEGRA_SWGROUP_PPCS, .reg = 0x270 },
1155 { .name = "sata", .swgroup = TEGRA_SWGROUP_SATA, .reg = 0x278 },
1156 { .name = "vde", .swgroup = TEGRA_SWGROUP_VDE, .reg = 0x27c },
1157 { .name = "isp", .swgroup = TEGRA_SWGROUP_ISP, .reg = 0x258 },
1224 unsigned int fifo_size = client->fifo_size; in tegra30_mc_tune_client_latency()
1244 switch (client->swgroup) { in tegra30_mc_tune_client_latency()
1271 arb_nsec -= arb_tolerance_compensation_nsec; in tegra30_mc_tune_client_latency()
1279 * client may wait in the EMEM arbiter before it becomes a high-priority in tegra30_mc_tune_client_latency()
1282 la_ticks = arb_nsec / mc->tick; in tegra30_mc_tune_client_latency()
1283 la_ticks = min(la_ticks, client->regs.la.mask); in tegra30_mc_tune_client_latency()
1285 value = mc_readl(mc, client->regs.la.reg); in tegra30_mc_tune_client_latency()
1286 value &= ~(client->regs.la.mask << client->regs.la.shift); in tegra30_mc_tune_client_latency()
1287 value |= la_ticks << client->regs.la.shift; in tegra30_mc_tune_client_latency()
1288 mc_writel(mc, value, client->regs.la.reg); in tegra30_mc_tune_client_latency()
1293 struct tegra_mc *mc = icc_provider_to_tegra_mc(src->provider); in tegra30_mc_icc_set()
1294 const struct tegra_mc_client *client = &mc->soc->clients[src->id]; in tegra30_mc_icc_set()
1295 u64 peak_bandwidth = icc_units_to_bps(src->peak_bw); in tegra30_mc_icc_set()
1298 * Skip pre-initialization that is done by icc_node_add(), which sets in tegra30_mc_icc_set()
1320 * ISO clients need to reserve extra bandwidth up-front because in tegra30_mc_icc_aggreate()
1339 unsigned int i, idx = spec->args[0]; in tegra30_mc_of_icc_xlate_extended()
1343 list_for_each_entry(node, &mc->provider.nodes, node_list) { in tegra30_mc_of_icc_xlate_extended()
1344 if (node->id != idx) in tegra30_mc_of_icc_xlate_extended()
1349 return ERR_PTR(-ENOMEM); in tegra30_mc_of_icc_xlate_extended()
1351 client = &mc->soc->clients[idx]; in tegra30_mc_of_icc_xlate_extended()
1352 ndata->node = node; in tegra30_mc_of_icc_xlate_extended()
1354 switch (client->swgroup) { in tegra30_mc_of_icc_xlate_extended()
1360 ndata->tag = TEGRA_MC_ICC_TAG_ISO; in tegra30_mc_of_icc_xlate_extended()
1364 ndata->tag = TEGRA_MC_ICC_TAG_DEFAULT; in tegra30_mc_of_icc_xlate_extended()
1371 for (i = 0; i < mc->soc->num_clients; i++) { in tegra30_mc_of_icc_xlate_extended()
1372 if (mc->soc->clients[i].id == idx) in tegra30_mc_of_icc_xlate_extended()
1373 return ERR_PTR(-EPROBE_DEFER); in tegra30_mc_of_icc_xlate_extended()
1376 dev_err(mc->dev, "invalid ICC client ID %u\n", idx); in tegra30_mc_of_icc_xlate_extended()
1378 return ERR_PTR(-EINVAL); in tegra30_mc_of_icc_xlate_extended()