409 		dev_err(emc->dev, "failed to update timing: %d\n", err);  in emc_seq_update_timing()
440 	struct emc_timing *timing = NULL;  in emc_find_timing()  local
445 			timing = &emc->timings[i];  in emc_find_timing()
450 	if (!timing) {  in emc_find_timing()
451 		dev_err(emc->dev, "no timing for rate %lu\n", rate);  in emc_find_timing()
455 	return timing;  in emc_find_timing()
458 static bool emc_dqs_preset(struct tegra_emc *emc, struct emc_timing *timing,  in emc_dqs_preset()  argument
464 	if (timing->data[71] & EMC_XM2DQSPADCTRL2_VREF_ENABLE) {  in emc_dqs_preset()
475 	if (timing->data[78] & EMC_XM2DQSPADCTRL3_VREF_ENABLE) {  in emc_dqs_preset()
486 	if (timing->data[77] & EMC_XM2QUSEPADCTRL_IVREF_ENABLE) {  in emc_dqs_preset()
525 	struct emc_timing *timing = emc_find_timing(emc, rate);  in emc_prepare_timing_change()  local
538 	if (!timing || emc->bad_state)  in emc_prepare_timing_change()
541 	dev_dbg(emc->dev, "%s: using timing rate %lu for requested rate %lu\n",  in emc_prepare_timing_change()
542 		__func__, timing->rate, rate);  in emc_prepare_timing_change()
557 	if (emc->dll_on == !!(timing->emc_mode_1 & 0x1))  in emc_prepare_timing_change()
559 	else if (timing->emc_mode_1 & 0x1)  in emc_prepare_timing_change()
564 	emc->dll_on = !!(timing->emc_mode_1 & 0x1);  in emc_prepare_timing_change()
566 	if (timing->data[80] && !readl_relaxed(emc->regs + EMC_ZCAL_INTERVAL))  in emc_prepare_timing_change()
601 	if (emc_dqs_preset(emc, timing, &schmitt_to_vref)) {  in emc_prepare_timing_change()
615 	if (timing->emc_auto_cal_interval) {  in emc_prepare_timing_change()
617 		val ^= timing->data[74];  in emc_prepare_timing_change()
636 	for (i = 0; i < ARRAY_SIZE(timing->data); i++) {  in emc_prepare_timing_change()
639 			writel_relaxed(timing->data[i],  in emc_prepare_timing_change()
643 	err = tegra_mc_write_emem_configuration(emc->mc, timing->rate);  in emc_prepare_timing_change()
654 		val = timing->data[82] & EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK;  in emc_prepare_timing_change()
658 		val = timing->data[82] & ~EMC_MRS_WAIT_CNT_LONG_WAIT_MASK;  in emc_prepare_timing_change()
674 		new_mode = timing->data[39] & EMC_CFG5_QUSE_MODE_MASK;  in emc_prepare_timing_change()
703 			writel_relaxed(timing->emc_mode_1,  in emc_prepare_timing_change()
716 	writel_relaxed(timing->data[73], emc->regs + EMC_XM2CLKPADCTRL);  in emc_prepare_timing_change()
720 	if (qrst_used || timing->emc_cfg_periodic_qrst != val) {  in emc_prepare_timing_change()
721 		if (timing->emc_cfg_periodic_qrst)  in emc_prepare_timing_change()
737 		if (timing->emc_mode_1 != emc->emc_mode_1)  in emc_prepare_timing_change()
738 			writel_relaxed(timing->emc_mode_1,  in emc_prepare_timing_change()
741 		if (timing->emc_mode_2 != emc->emc_mode_2)  in emc_prepare_timing_change()
742 			writel_relaxed(timing->emc_mode_2,  in emc_prepare_timing_change()
745 		if (timing->emc_mode_reset != emc->emc_mode_reset ||  in emc_prepare_timing_change()
747 			val = timing->emc_mode_reset;  in emc_prepare_timing_change()
757 		if (timing->emc_mode_2 != emc->emc_mode_2)  in emc_prepare_timing_change()
758 			writel_relaxed(timing->emc_mode_2,  in emc_prepare_timing_change()
761 		if (timing->emc_mode_1 != emc->emc_mode_1)  in emc_prepare_timing_change()
762 			writel_relaxed(timing->emc_mode_1,  in emc_prepare_timing_change()
766 	emc->emc_mode_1 = timing->emc_mode_1;  in emc_prepare_timing_change()
767 	emc->emc_mode_2 = timing->emc_mode_2;  in emc_prepare_timing_change()
768 	emc->emc_mode_reset = timing->emc_mode_reset;  in emc_prepare_timing_change()
795 	struct emc_timing *timing = emc_find_timing(emc, rate);  in emc_complete_timing_change()  local
815 		writel_relaxed(timing->emc_auto_cal_interval,  in emc_complete_timing_change()
819 	if (timing->emc_cfg_dyn_self_ref) {  in emc_complete_timing_change()
826 		writel_relaxed(timing->emc_zcal_cnt_long,  in emc_complete_timing_change()
832 	/* update restored timing */  in emc_complete_timing_change()
848 		dev_err(emc->dev, "timing configuration can't be reverted\n");  in emc_unprepare_timing_change()
889 				   struct emc_timing *timing,  in load_one_timing_from_dt()  argument
897 		dev_err(emc->dev, "timing %pOF: failed to read rate: %d\n",  in load_one_timing_from_dt()
902 	timing->rate = value;  in load_one_timing_from_dt()
905 					 timing->data,  in load_one_timing_from_dt()
909 			"timing %pOF: failed to read emc timing data: %d\n",  in load_one_timing_from_dt()
915 	timing->prop = of_property_read_bool(node, dtprop);  in load_one_timing_from_dt()
918 	err = of_property_read_u32(node, dtprop, &timing->prop); \  in load_one_timing_from_dt()
921 			"timing %pOFn: failed to read " #prop ": %d\n", \  in load_one_timing_from_dt()
937 	dev_dbg(emc->dev, "%s: %pOF: rate %lu\n", __func__, node, timing->rate);  in load_one_timing_from_dt()
970 				"emc/mc timing rate mismatch: %lu %lu\n",  in emc_check_mc_timings()
982 	struct emc_timing *timing;  in emc_load_timings_from_dt()  local
992 	emc->timings = devm_kcalloc(emc->dev, child_count, sizeof(*timing),  in emc_load_timings_from_dt()
998 	timing = emc->timings;  in emc_load_timings_from_dt()
1001 		err = load_one_timing_from_dt(emc, timing++, child);  in emc_load_timings_from_dt()
1006 	sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings,  in emc_load_timings_from_dt()
1195 	struct emc_timing *timing = NULL;  in emc_round_rate()  local
1218 		timing = &emc->timings[i];  in emc_round_rate()
1222 	if (!timing) {  in emc_round_rate()
1223 		dev_err(emc->dev, "no timing for rate %lu min %lu max %lu\n",  in emc_round_rate()
1228 	return timing->rate;  in emc_round_rate()