Lines Matching full:emc_cfg
245 u32 emc_cfg, emc_cfg_o, emc_cfg_update, value; in tegra210_emc_r21021_periodic_compensation() local
265 emc_cfg_o = emc_readl(emc, EMC_CFG); in tegra210_emc_r21021_periodic_compensation()
266 emc_cfg = emc_cfg_o & ~(EMC_CFG_DYN_SELF_REF | in tegra210_emc_r21021_periodic_compensation()
274 emc_writel(emc, emc_cfg, EMC_CFG); in tegra210_emc_r21021_periodic_compensation()
317 emc_writel(emc, emc_cfg_o, EMC_CFG); in tegra210_emc_r21021_periodic_compensation()
363 u32 emc_auto_cal_config, auto_cal_en, emc_cfg, emc_sel_dpd_ctrl; in tegra210_emc_r21021_set_clock() local
400 emc_readl(emc, EMC_CFG); in tegra210_emc_r21021_set_clock()
417 emc_cfg = next->burst_regs[EMC_CFG_INDEX]; in tegra210_emc_r21021_set_clock()
418 emc_cfg &= ~(EMC_CFG_DYN_SELF_REF | EMC_CFG_DRAM_ACPD | in tegra210_emc_r21021_set_clock()
472 emc_writel(emc, emc_cfg, EMC_CFG); in tegra210_emc_r21021_set_clock()
495 emc_writel(emc, emc_cfg, EMC_CFG); in tegra210_emc_r21021_set_clock()
602 * Update EMC_CFG. (??) in tegra210_emc_r21021_set_clock()
768 if (offset == EMC_CFG) { in tegra210_emc_r21021_set_clock()
1355 EMC_CFG, 0); in tegra210_emc_r21021_set_clock()
1446 * Restore EMC_CFG, FDPD registers. in tegra210_emc_r21021_set_clock()
1451 emc_writel(emc, next->burst_regs[EMC_CFG_INDEX], EMC_CFG); in tegra210_emc_r21021_set_clock()