Lines Matching refs:TEGRA20_MC_RESET
251 #define TEGRA20_MC_RESET(_name, _control, _status, _reset, _bit) \ macro
262 TEGRA20_MC_RESET(AVPC, 0x100, 0x140, 0x104, 0),
263 TEGRA20_MC_RESET(DC, 0x100, 0x144, 0x104, 1),
264 TEGRA20_MC_RESET(DCB, 0x100, 0x148, 0x104, 2),
265 TEGRA20_MC_RESET(EPP, 0x100, 0x14c, 0x104, 3),
266 TEGRA20_MC_RESET(2D, 0x100, 0x150, 0x104, 4),
267 TEGRA20_MC_RESET(HC, 0x100, 0x154, 0x104, 5),
268 TEGRA20_MC_RESET(ISP, 0x100, 0x158, 0x104, 6),
269 TEGRA20_MC_RESET(MPCORE, 0x100, 0x15c, 0x104, 7),
270 TEGRA20_MC_RESET(MPEA, 0x100, 0x160, 0x104, 8),
271 TEGRA20_MC_RESET(MPEB, 0x100, 0x164, 0x104, 9),
272 TEGRA20_MC_RESET(MPEC, 0x100, 0x168, 0x104, 10),
273 TEGRA20_MC_RESET(3D, 0x100, 0x16c, 0x104, 11),
274 TEGRA20_MC_RESET(PPCS, 0x100, 0x170, 0x104, 12),
275 TEGRA20_MC_RESET(VDE, 0x100, 0x174, 0x104, 13),
276 TEGRA20_MC_RESET(VI, 0x100, 0x178, 0x104, 14),