Lines Matching +full:cs +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
19 #define FMC2_BCR1 0x0
20 #define FMC2_BTR1 0x4
21 #define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1)
22 #define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1)
23 #define FMC2_PCSCNTR 0x20
24 #define FMC2_CFGR 0x20
25 #define FMC2_SR 0x84
26 #define FMC2_BWTR1 0x104
27 #define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1)
28 #define FMC2_SECCFGR 0x300
29 #define FMC2_CIDCFGR0 0x30c
30 #define FMC2_CIDCFGR(x) ((x) * 0x8 + FMC2_CIDCFGR0)
31 #define FMC2_SEMCR0 0x310
32 #define FMC2_SEMCR(x) ((x) * 0x8 + FMC2_SEMCR0)
39 #define FMC2_BCR_MBKEN BIT(0)
57 #define FMC2_BXTR_ADDSET GENMASK(3, 0)
67 #define FMC2_PCSCNTR_CSCOUNT GENMASK(15, 0)
76 #define FMC2_SR_ISOST GENMASK(1, 0)
79 #define FMC2_CIDCFGR_CFEN BIT(0)
85 #define FMC2_SEMCR_SEM_MUTEX BIT(0)
93 #define FMC2_BCR_CPSIZE_0 0x0
94 #define FMC2_BCR_CPSIZE_128 0x1
95 #define FMC2_BCR_CPSIZE_256 0x2
96 #define FMC2_BCR_CPSIZE_512 0x3
97 #define FMC2_BCR_CPSIZE_1024 0x4
99 #define FMC2_BCR_MWID_8 0x0
100 #define FMC2_BCR_MWID_16 0x1
102 #define FMC2_BCR_MTYP_SRAM 0x0
103 #define FMC2_BCR_MTYP_PSRAM 0x1
104 #define FMC2_BCR_MTYP_NOR 0x2
106 #define FMC2_BCR_CSCOUNT_0 0x0
107 #define FMC2_BCR_CSCOUNT_1 0x1
108 #define FMC2_BCR_CSCOUNT_64 0x2
109 #define FMC2_BCR_CSCOUNT_256 0x3
111 #define FMC2_BXTR_EXTMOD_A 0x0
112 #define FMC2_BXTR_EXTMOD_B 0x1
113 #define FMC2_BXTR_EXTMOD_C 0x2
114 #define FMC2_BXTR_EXTMOD_D 0x3
116 #define FMC2_BCR_NBLSET_MAX 0x3
117 #define FMC2_BXTR_ADDSET_MAX 0xf
118 #define FMC2_BXTR_ADDHLD_MAX 0xf
119 #define FMC2_BXTR_DATAST_MAX 0xff
120 #define FMC2_BXTR_BUSTURN_MAX 0xf
121 #define FMC2_BXTR_DATAHLD_MAX 0x3
122 #define FMC2_BTR_CLKDIV_MAX 0xf
123 #define FMC2_BTR_DATLAT_MAX 0xf
124 #define FMC2_PCSCNTR_CSCOUNT_MAX 0xff
125 #define FMC2_CFGR_CLKDIV_MAX 0xf
128 FMC2_EBI1 = 0,
144 FMC2_ASYNC_MODE_1_SRAM = 0,
164 FMC2_CPSIZE_0 = 0,
172 FMC2_CSCOUNT_0 = 0,
210 * struct stm32_fmc2_prop - STM32 FMC2 EBI property
234 const struct stm32_fmc2_prop *prop, int cs);
235 u32 (*calculate)(struct stm32_fmc2_ebi *ebi, int cs, u32 setup);
238 int cs, u32 setup);
243 int cs) in stm32_fmc2_ebi_check_mux() argument
248 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_mux()
253 return 0; in stm32_fmc2_ebi_check_mux()
255 return -EINVAL; in stm32_fmc2_ebi_check_mux()
260 int cs) in stm32_fmc2_ebi_check_waitcfg() argument
265 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_waitcfg()
270 return 0; in stm32_fmc2_ebi_check_waitcfg()
272 return -EINVAL; in stm32_fmc2_ebi_check_waitcfg()
277 int cs) in stm32_fmc2_ebi_check_sync_trans() argument
282 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_sync_trans()
287 return 0; in stm32_fmc2_ebi_check_sync_trans()
289 return -EINVAL; in stm32_fmc2_ebi_check_sync_trans()
294 int cs) in stm32_fmc2_ebi_mp25_check_cclk() argument
296 if (!ebi->access_granted) in stm32_fmc2_ebi_mp25_check_cclk()
297 return -EACCES; in stm32_fmc2_ebi_mp25_check_cclk()
299 return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); in stm32_fmc2_ebi_mp25_check_cclk()
304 int cs) in stm32_fmc2_ebi_mp25_check_clk_period() argument
309 ret = regmap_read(ebi->regmap, FMC2_CFGR, &cfgr); in stm32_fmc2_ebi_mp25_check_clk_period()
313 if (cfgr & FMC2_CFGR_CCLKEN && !ebi->access_granted) in stm32_fmc2_ebi_mp25_check_clk_period()
314 return -EACCES; in stm32_fmc2_ebi_mp25_check_clk_period()
316 return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); in stm32_fmc2_ebi_mp25_check_clk_period()
321 int cs) in stm32_fmc2_ebi_check_async_trans() argument
326 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_async_trans()
331 return 0; in stm32_fmc2_ebi_check_async_trans()
333 return -EINVAL; in stm32_fmc2_ebi_check_async_trans()
338 int cs) in stm32_fmc2_ebi_check_cpsize() argument
343 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_cpsize()
348 return 0; in stm32_fmc2_ebi_check_cpsize()
350 return -EINVAL; in stm32_fmc2_ebi_check_cpsize()
355 int cs) in stm32_fmc2_ebi_check_address_hold() argument
360 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_address_hold()
364 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_check_address_hold()
365 ret = regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
367 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
373 return 0; in stm32_fmc2_ebi_check_address_hold()
375 return -EINVAL; in stm32_fmc2_ebi_check_address_hold()
380 int cs) in stm32_fmc2_ebi_check_clk_period() argument
385 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_clk_period()
389 if (cs) { in stm32_fmc2_ebi_check_clk_period()
390 ret = regmap_read(ebi->regmap, FMC2_BCR1, &bcr1); in stm32_fmc2_ebi_check_clk_period()
397 if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN))) in stm32_fmc2_ebi_check_clk_period()
398 return 0; in stm32_fmc2_ebi_check_clk_period()
400 return -EINVAL; in stm32_fmc2_ebi_check_clk_period()
405 int cs) in stm32_fmc2_ebi_check_cclk() argument
407 if (cs) in stm32_fmc2_ebi_check_cclk()
408 return -EINVAL; in stm32_fmc2_ebi_check_cclk()
410 return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); in stm32_fmc2_ebi_check_cclk()
414 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clock_cycles() argument
416 unsigned long hclk = clk_get_rate(ebi->clk); in stm32_fmc2_ebi_ns_to_clock_cycles()
423 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clk_period() argument
425 u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup); in stm32_fmc2_ebi_ns_to_clk_period()
429 ret = regmap_read(ebi->regmap, FMC2_BCR1, &bcr); in stm32_fmc2_ebi_ns_to_clk_period()
433 if (bcr & FMC2_BCR1_CCLKEN || !cs) in stm32_fmc2_ebi_ns_to_clk_period()
434 ret = regmap_read(ebi->regmap, FMC2_BTR1, &btr); in stm32_fmc2_ebi_ns_to_clk_period()
436 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_ns_to_clk_period()
446 int cs, u32 setup) in stm32_fmc2_ebi_mp25_ns_to_clk_period() argument
448 u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup); in stm32_fmc2_ebi_mp25_ns_to_clk_period()
452 ret = regmap_read(ebi->regmap, FMC2_CFGR, &cfgr); in stm32_fmc2_ebi_mp25_ns_to_clk_period()
459 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_mp25_ns_to_clk_period()
469 static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) in stm32_fmc2_ebi_get_reg() argument
473 *reg = FMC2_BCR(cs); in stm32_fmc2_ebi_get_reg()
476 *reg = FMC2_BTR(cs); in stm32_fmc2_ebi_get_reg()
479 *reg = FMC2_BWTR(cs); in stm32_fmc2_ebi_get_reg()
488 return -EINVAL; in stm32_fmc2_ebi_get_reg()
491 return 0; in stm32_fmc2_ebi_get_reg()
496 int cs, u32 setup) in stm32_fmc2_ebi_set_bit_field() argument
501 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bit_field()
505 regmap_update_bits(ebi->regmap, reg, prop->reg_mask, in stm32_fmc2_ebi_set_bit_field()
506 setup ? prop->reg_mask : 0); in stm32_fmc2_ebi_set_bit_field()
508 return 0; in stm32_fmc2_ebi_set_bit_field()
513 int cs, u32 setup) in stm32_fmc2_ebi_set_trans_type() argument
516 u32 btr_mask, btr = 0; in stm32_fmc2_ebi_set_trans_type()
517 u32 bwtr_mask, bwtr = 0; in stm32_fmc2_ebi_set_trans_type()
529 * MUXEN = 0, MTYP = 0, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
530 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
535 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
536 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
542 * MUXEN = 0, MTYP = 0, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
543 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
552 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
553 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
562 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
563 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
570 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
571 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 1 in stm32_fmc2_ebi_set_trans_type()
580 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
581 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 2 in stm32_fmc2_ebi_set_trans_type()
590 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
591 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 3 in stm32_fmc2_ebi_set_trans_type()
600 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
601 * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
608 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
609 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
616 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
617 * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
624 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
625 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
632 return -EINVAL; in stm32_fmc2_ebi_set_trans_type()
636 regmap_update_bits(ebi->regmap, FMC2_BWTR(cs), in stm32_fmc2_ebi_set_trans_type()
638 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), btr_mask, btr); in stm32_fmc2_ebi_set_trans_type()
639 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), bcr_mask, bcr); in stm32_fmc2_ebi_set_trans_type()
641 return 0; in stm32_fmc2_ebi_set_trans_type()
646 int cs, u32 setup) in stm32_fmc2_ebi_set_buswidth() argument
659 return -EINVAL; in stm32_fmc2_ebi_set_buswidth()
662 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MWID, val); in stm32_fmc2_ebi_set_buswidth()
664 return 0; in stm32_fmc2_ebi_set_buswidth()
669 int cs, u32 setup) in stm32_fmc2_ebi_set_cpsize() argument
691 return -EINVAL; in stm32_fmc2_ebi_set_cpsize()
694 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_CPSIZE, val); in stm32_fmc2_ebi_set_cpsize()
696 return 0; in stm32_fmc2_ebi_set_cpsize()
701 int cs, u32 setup) in stm32_fmc2_ebi_set_bl_setup() argument
707 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_NBLSET, val); in stm32_fmc2_ebi_set_bl_setup()
709 return 0; in stm32_fmc2_ebi_set_bl_setup()
714 int cs, u32 setup) in stm32_fmc2_ebi_set_address_setup() argument
720 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_setup()
724 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_set_address_setup()
728 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_address_setup()
729 ret = regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
731 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
740 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDSET, val); in stm32_fmc2_ebi_set_address_setup()
742 return 0; in stm32_fmc2_ebi_set_address_setup()
747 int cs, u32 setup) in stm32_fmc2_ebi_set_address_hold() argument
752 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_hold()
758 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDHLD, val); in stm32_fmc2_ebi_set_address_hold()
760 return 0; in stm32_fmc2_ebi_set_address_hold()
765 int cs, u32 setup) in stm32_fmc2_ebi_set_data_setup() argument
770 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_setup()
776 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAST, val); in stm32_fmc2_ebi_set_data_setup()
778 return 0; in stm32_fmc2_ebi_set_data_setup()
783 int cs, u32 setup) in stm32_fmc2_ebi_set_bus_turnaround() argument
788 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bus_turnaround()
792 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_BUSTURN_MAX) : 0; in stm32_fmc2_ebi_set_bus_turnaround()
794 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_BUSTURN, val); in stm32_fmc2_ebi_set_bus_turnaround()
796 return 0; in stm32_fmc2_ebi_set_bus_turnaround()
801 int cs, u32 setup) in stm32_fmc2_ebi_set_data_hold() argument
806 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_hold()
810 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_data_hold()
811 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_DATAHLD_MAX) : 0; in stm32_fmc2_ebi_set_data_hold()
815 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAHLD, val); in stm32_fmc2_ebi_set_data_hold()
817 return 0; in stm32_fmc2_ebi_set_data_hold()
822 int cs, u32 setup) in stm32_fmc2_ebi_set_clk_period() argument
826 val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1; in stm32_fmc2_ebi_set_clk_period()
828 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_CLKDIV, val); in stm32_fmc2_ebi_set_clk_period()
830 return 0; in stm32_fmc2_ebi_set_clk_period()
835 int cs, u32 setup) in stm32_fmc2_ebi_mp25_set_clk_period() argument
840 ret = regmap_read(ebi->regmap, FMC2_CFGR, &cfgr); in stm32_fmc2_ebi_mp25_set_clk_period()
845 val = setup ? clamp_val(setup - 1, 1, FMC2_CFGR_CLKDIV_MAX) : 1; in stm32_fmc2_ebi_mp25_set_clk_period()
847 regmap_update_bits(ebi->regmap, FMC2_CFGR, FMC2_CFGR_CLKDIV, val); in stm32_fmc2_ebi_mp25_set_clk_period()
849 val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1; in stm32_fmc2_ebi_mp25_set_clk_period()
851 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_CLKDIV, val); in stm32_fmc2_ebi_mp25_set_clk_period()
854 return 0; in stm32_fmc2_ebi_mp25_set_clk_period()
859 int cs, u32 setup) in stm32_fmc2_ebi_set_data_latency() argument
863 val = setup > 1 ? min_t(u32, setup - 2, FMC2_BTR_DATLAT_MAX) : 0; in stm32_fmc2_ebi_set_data_latency()
865 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_DATLAT, val); in stm32_fmc2_ebi_set_data_latency()
867 return 0; in stm32_fmc2_ebi_set_data_latency()
872 int cs, u32 setup) in stm32_fmc2_ebi_set_max_low_pulse() argument
878 return 0; in stm32_fmc2_ebi_set_max_low_pulse()
880 ret = regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr); in stm32_fmc2_ebi_set_max_low_pulse()
885 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
886 FMC2_PCSCNTR_CNTBEN(cs), in stm32_fmc2_ebi_set_max_low_pulse()
887 FMC2_PCSCNTR_CNTBEN(cs)); in stm32_fmc2_ebi_set_max_low_pulse()
889 new_val = min_t(u32, setup - 1, FMC2_PCSCNTR_CSCOUNT_MAX); in stm32_fmc2_ebi_set_max_low_pulse()
893 return 0; in stm32_fmc2_ebi_set_max_low_pulse()
896 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
899 return 0; in stm32_fmc2_ebi_set_max_low_pulse()
904 int cs, u32 setup) in stm32_fmc2_ebi_mp25_set_max_low_pulse() argument
917 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), in stm32_fmc2_ebi_mp25_set_max_low_pulse()
920 return 0; in stm32_fmc2_ebi_mp25_set_max_low_pulse()
924 /* st,fmc2-ebi-cs-trans-type must be the first property */
926 .name = "st,fmc2-ebi-cs-transaction-type",
931 .name = "st,fmc2-ebi-cs-cclk-enable",
939 .name = "st,fmc2-ebi-cs-mux-enable",
947 .name = "st,fmc2-ebi-cs-buswidth",
952 .name = "st,fmc2-ebi-cs-waitpol-high",
959 .name = "st,fmc2-ebi-cs-waitcfg-enable",
967 .name = "st,fmc2-ebi-cs-wait-enable",
975 .name = "st,fmc2-ebi-cs-asyncwait-enable",
983 .name = "st,fmc2-ebi-cs-cpsize",
988 .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
993 .name = "st,fmc2-ebi-cs-address-setup-ns",
1001 .name = "st,fmc2-ebi-cs-address-hold-ns",
1009 .name = "st,fmc2-ebi-cs-data-setup-ns",
1017 .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
1024 .name = "st,fmc2-ebi-cs-data-hold-ns",
1031 .name = "st,fmc2-ebi-cs-clk-period-ns",
1038 .name = "st,fmc2-ebi-cs-data-latency-ns",
1044 .name = "st,fmc2-ebi-cs-write-address-setup-ns",
1052 .name = "st,fmc2-ebi-cs-write-address-hold-ns",
1060 .name = "st,fmc2-ebi-cs-write-data-setup-ns",
1068 .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
1075 .name = "st,fmc2-ebi-cs-write-data-hold-ns",
1082 .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
1089 /* st,fmc2-ebi-cs-trans-type must be the first property */
1091 .name = "st,fmc2-ebi-cs-transaction-type",
1096 .name = "st,fmc2-ebi-cs-cclk-enable",
1104 .name = "st,fmc2-ebi-cs-mux-enable",
1112 .name = "st,fmc2-ebi-cs-buswidth",
1117 .name = "st,fmc2-ebi-cs-waitpol-high",
1124 .name = "st,fmc2-ebi-cs-waitcfg-enable",
1132 .name = "st,fmc2-ebi-cs-wait-enable",
1140 .name = "st,fmc2-ebi-cs-asyncwait-enable",
1148 .name = "st,fmc2-ebi-cs-cpsize",
1153 .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
1158 .name = "st,fmc2-ebi-cs-address-setup-ns",
1166 .name = "st,fmc2-ebi-cs-address-hold-ns",
1174 .name = "st,fmc2-ebi-cs-data-setup-ns",
1182 .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
1189 .name = "st,fmc2-ebi-cs-data-hold-ns",
1196 .name = "st,fmc2-ebi-cs-clk-period-ns",
1203 .name = "st,fmc2-ebi-cs-data-latency-ns",
1209 .name = "st,fmc2-ebi-cs-write-address-setup-ns",
1217 .name = "st,fmc2-ebi-cs-write-address-hold-ns",
1225 .name = "st,fmc2-ebi-cs-write-data-setup-ns",
1233 .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
1240 .name = "st,fmc2-ebi-cs-write-data-hold-ns",
1247 .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
1259 return -EINVAL; in stm32_fmc2_ebi_mp25_check_rif()
1261 ret = regmap_read(ebi->regmap, FMC2_SECCFGR, &seccfgr); in stm32_fmc2_ebi_mp25_check_rif()
1267 dev_err(ebi->dev, "resource %d is configured as secure\n", in stm32_fmc2_ebi_mp25_check_rif()
1270 return -EACCES; in stm32_fmc2_ebi_mp25_check_rif()
1273 ret = regmap_read(ebi->regmap, FMC2_CIDCFGR(resource), &cidcfgr); in stm32_fmc2_ebi_mp25_check_rif()
1279 return 0; in stm32_fmc2_ebi_mp25_check_rif()
1286 dev_err(ebi->dev, "static CID%d set for resource %d\n", in stm32_fmc2_ebi_mp25_check_rif()
1289 return -EACCES; in stm32_fmc2_ebi_mp25_check_rif()
1292 return 0; in stm32_fmc2_ebi_mp25_check_rif()
1295 /* Pass-list with semaphore mode */ in stm32_fmc2_ebi_mp25_check_rif()
1298 dev_err(ebi->dev, "CID1 is block-listed for resource %d\n", in stm32_fmc2_ebi_mp25_check_rif()
1301 return -EACCES; in stm32_fmc2_ebi_mp25_check_rif()
1304 ret = regmap_read(ebi->regmap, FMC2_SEMCR(resource), &semcr); in stm32_fmc2_ebi_mp25_check_rif()
1309 regmap_update_bits(ebi->regmap, FMC2_SEMCR(resource), in stm32_fmc2_ebi_mp25_check_rif()
1312 ret = regmap_read(ebi->regmap, FMC2_SEMCR(resource), &semcr); in stm32_fmc2_ebi_mp25_check_rif()
1320 dev_err(ebi->dev, "resource %d is already used by CID%d\n", in stm32_fmc2_ebi_mp25_check_rif()
1323 return -EACCES; in stm32_fmc2_ebi_mp25_check_rif()
1326 ebi->sem_taken |= BIT(resource); in stm32_fmc2_ebi_mp25_check_rif()
1328 return 0; in stm32_fmc2_ebi_mp25_check_rif()
1335 for (resource = 0; resource < FMC2_MAX_RESOURCES; resource++) { in stm32_fmc2_ebi_mp25_put_sems()
1336 if (!(ebi->sem_taken & BIT(resource))) in stm32_fmc2_ebi_mp25_put_sems()
1339 regmap_update_bits(ebi->regmap, FMC2_SEMCR(resource), in stm32_fmc2_ebi_mp25_put_sems()
1340 FMC2_SEMCR_SEM_MUTEX, 0); in stm32_fmc2_ebi_mp25_put_sems()
1348 for (resource = 0; resource < FMC2_MAX_RESOURCES; resource++) { in stm32_fmc2_ebi_mp25_get_sems()
1349 if (!(ebi->sem_taken & BIT(resource))) in stm32_fmc2_ebi_mp25_get_sems()
1352 regmap_update_bits(ebi->regmap, FMC2_SEMCR(resource), in stm32_fmc2_ebi_mp25_get_sems()
1360 int cs) in stm32_fmc2_ebi_parse_prop() argument
1362 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_prop()
1363 u32 setup = 0; in stm32_fmc2_ebi_parse_prop()
1365 if (!prop->set) { in stm32_fmc2_ebi_parse_prop()
1366 dev_err(dev, "property %s is not well defined\n", prop->name); in stm32_fmc2_ebi_parse_prop()
1367 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
1370 if (prop->check && prop->check(ebi, prop, cs)) in stm32_fmc2_ebi_parse_prop()
1372 return 0; in stm32_fmc2_ebi_parse_prop()
1374 if (prop->bprop) { in stm32_fmc2_ebi_parse_prop()
1377 bprop = of_property_read_bool(dev_node, prop->name); in stm32_fmc2_ebi_parse_prop()
1378 if (prop->mprop && !bprop) { in stm32_fmc2_ebi_parse_prop()
1380 prop->name); in stm32_fmc2_ebi_parse_prop()
1381 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
1390 ret = of_property_read_u32(dev_node, prop->name, &val); in stm32_fmc2_ebi_parse_prop()
1391 if (prop->mprop && ret) { in stm32_fmc2_ebi_parse_prop()
1393 prop->name); in stm32_fmc2_ebi_parse_prop()
1398 setup = prop->reset_val; in stm32_fmc2_ebi_parse_prop()
1399 else if (prop->calculate) in stm32_fmc2_ebi_parse_prop()
1400 setup = prop->calculate(ebi, cs, val); in stm32_fmc2_ebi_parse_prop()
1405 return prop->set(ebi, prop, cs, setup); in stm32_fmc2_ebi_parse_prop()
1408 static void stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_enable_bank() argument
1410 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), in stm32_fmc2_ebi_enable_bank()
1414 static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_disable_bank() argument
1416 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0); in stm32_fmc2_ebi_disable_bank()
1421 unsigned int cs; in stm32_fmc2_ebi_save_setup() local
1424 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_save_setup()
1425 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_save_setup()
1428 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]); in stm32_fmc2_ebi_save_setup()
1429 ret |= regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]); in stm32_fmc2_ebi_save_setup()
1430 ret |= regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]); in stm32_fmc2_ebi_save_setup()
1435 return 0; in stm32_fmc2_ebi_save_setup()
1446 return regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr); in stm32_fmc2_ebi_mp1_save_setup()
1457 if (ebi->access_granted) in stm32_fmc2_ebi_mp25_save_setup()
1458 ret = regmap_read(ebi->regmap, FMC2_CFGR, &ebi->cfgr); in stm32_fmc2_ebi_mp25_save_setup()
1465 unsigned int cs; in stm32_fmc2_ebi_set_setup() local
1467 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_set_setup()
1468 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_set_setup()
1471 regmap_write(ebi->regmap, FMC2_BCR(cs), ebi->bcr[cs]); in stm32_fmc2_ebi_set_setup()
1472 regmap_write(ebi->regmap, FMC2_BTR(cs), ebi->btr[cs]); in stm32_fmc2_ebi_set_setup()
1473 regmap_write(ebi->regmap, FMC2_BWTR(cs), ebi->bwtr[cs]); in stm32_fmc2_ebi_set_setup()
1480 regmap_write(ebi->regmap, FMC2_PCSCNTR, ebi->pcscntr); in stm32_fmc2_ebi_mp1_set_setup()
1487 if (ebi->access_granted) in stm32_fmc2_ebi_mp25_set_setup()
1488 regmap_write(ebi->regmap, FMC2_CFGR, ebi->cfgr); in stm32_fmc2_ebi_mp25_set_setup()
1493 unsigned int cs; in stm32_fmc2_ebi_disable_banks() local
1495 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_disable_banks()
1496 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_disable_banks()
1499 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_disable_banks()
1506 struct device *dev = ebi->dev; in stm32_fmc2_ebi_nwait_used_by_ctrls()
1507 unsigned int cs; in stm32_fmc2_ebi_nwait_used_by_ctrls() local
1511 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_nwait_used_by_ctrls()
1512 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_nwait_used_by_ctrls()
1515 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_nwait_used_by_ctrls()
1520 ebi->bank_assigned & BIT(FMC2_NAND)) { in stm32_fmc2_ebi_nwait_used_by_ctrls()
1522 return -EINVAL; in stm32_fmc2_ebi_nwait_used_by_ctrls()
1526 return 0; in stm32_fmc2_ebi_nwait_used_by_ctrls()
1531 if (!ebi->access_granted) in stm32_fmc2_ebi_enable()
1534 regmap_update_bits(ebi->regmap, ebi->data->fmc2_enable_reg, in stm32_fmc2_ebi_enable()
1535 ebi->data->fmc2_enable_bit, in stm32_fmc2_ebi_enable()
1536 ebi->data->fmc2_enable_bit); in stm32_fmc2_ebi_enable()
1541 if (!ebi->access_granted) in stm32_fmc2_ebi_disable()
1544 regmap_update_bits(ebi->regmap, ebi->data->fmc2_enable_reg, in stm32_fmc2_ebi_disable()
1545 ebi->data->fmc2_enable_bit, 0); in stm32_fmc2_ebi_disable()
1550 u32 cs) in stm32_fmc2_ebi_setup_cs() argument
1555 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1557 for (i = 0; i < ebi->data->nb_child_props; i++) { in stm32_fmc2_ebi_setup_cs()
1558 const struct stm32_fmc2_prop *p = &ebi->data->child_props[i]; in stm32_fmc2_ebi_setup_cs()
1560 ret = stm32_fmc2_ebi_parse_prop(ebi, dev_node, p, cs); in stm32_fmc2_ebi_setup_cs()
1562 dev_err(ebi->dev, "property %s could not be set: %d\n", in stm32_fmc2_ebi_setup_cs()
1563 p->name, ret); in stm32_fmc2_ebi_setup_cs()
1568 stm32_fmc2_ebi_enable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1570 return 0; in stm32_fmc2_ebi_setup_cs()
1575 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_dt()
1580 for_each_available_child_of_node_scoped(dev->of_node, child) { in stm32_fmc2_ebi_parse_dt()
1587 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1590 if (ebi->bank_assigned & BIT(bank)) { in stm32_fmc2_ebi_parse_dt()
1592 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1595 if (ebi->data->check_rif) { in stm32_fmc2_ebi_parse_dt()
1596 ret = ebi->data->check_rif(ebi, bank + 1); in stm32_fmc2_ebi_parse_dt()
1610 ebi->bank_assigned |= BIT(bank); in stm32_fmc2_ebi_parse_dt()
1616 return -ENODEV; in stm32_fmc2_ebi_parse_dt()
1619 if (ebi->data->nwait_used_by_ctrls) { in stm32_fmc2_ebi_parse_dt()
1620 ret = ebi->data->nwait_used_by_ctrls(ebi); in stm32_fmc2_ebi_parse_dt()
1627 return of_platform_populate(dev->of_node, NULL, NULL, dev); in stm32_fmc2_ebi_parse_dt()
1632 struct device *dev = &pdev->dev; in stm32_fmc2_ebi_probe()
1637 ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL); in stm32_fmc2_ebi_probe()
1639 return -ENOMEM; in stm32_fmc2_ebi_probe()
1641 ebi->dev = dev; in stm32_fmc2_ebi_probe()
1644 ebi->data = of_device_get_match_data(dev); in stm32_fmc2_ebi_probe()
1645 if (!ebi->data) in stm32_fmc2_ebi_probe()
1646 return -EINVAL; in stm32_fmc2_ebi_probe()
1648 ebi->regmap = device_node_to_regmap(dev->of_node); in stm32_fmc2_ebi_probe()
1649 if (IS_ERR(ebi->regmap)) in stm32_fmc2_ebi_probe()
1650 return PTR_ERR(ebi->regmap); in stm32_fmc2_ebi_probe()
1652 ebi->clk = devm_clk_get(dev, NULL); in stm32_fmc2_ebi_probe()
1653 if (IS_ERR(ebi->clk)) in stm32_fmc2_ebi_probe()
1654 return PTR_ERR(ebi->clk); in stm32_fmc2_ebi_probe()
1657 if (PTR_ERR(rstc) == -EPROBE_DEFER) in stm32_fmc2_ebi_probe()
1658 return -EPROBE_DEFER; in stm32_fmc2_ebi_probe()
1665 if (ret < 0) in stm32_fmc2_ebi_probe()
1674 ebi->access_granted = true; in stm32_fmc2_ebi_probe()
1675 if (ebi->data->check_rif) { in stm32_fmc2_ebi_probe()
1676 ret = ebi->data->check_rif(ebi, 0); in stm32_fmc2_ebi_probe()
1680 ebi->access_granted = false; in stm32_fmc2_ebi_probe()
1682 ret = regmap_read(ebi->regmap, FMC2_SR, &sr); in stm32_fmc2_ebi_probe()
1689 ret = -EACCES; in stm32_fmc2_ebi_probe()
1699 ret = ebi->data->save_setup(ebi); in stm32_fmc2_ebi_probe()
1703 return 0; in stm32_fmc2_ebi_probe()
1708 if (ebi->data->put_sems) in stm32_fmc2_ebi_probe()
1709 ebi->data->put_sems(ebi); in stm32_fmc2_ebi_probe()
1719 of_platform_depopulate(&pdev->dev); in stm32_fmc2_ebi_remove()
1722 if (ebi->data->put_sems) in stm32_fmc2_ebi_remove()
1723 ebi->data->put_sems(ebi); in stm32_fmc2_ebi_remove()
1724 pm_runtime_put_sync_suspend(&pdev->dev); in stm32_fmc2_ebi_remove()
1731 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_runtime_suspend()
1733 return 0; in stm32_fmc2_ebi_runtime_suspend()
1740 return clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_runtime_resume()
1748 if (ebi->data->put_sems) in stm32_fmc2_ebi_suspend()
1749 ebi->data->put_sems(ebi); in stm32_fmc2_ebi_suspend()
1753 return 0; in stm32_fmc2_ebi_suspend()
1764 if (ret < 0) in stm32_fmc2_ebi_resume()
1767 if (ebi->data->get_sems) in stm32_fmc2_ebi_resume()
1768 ebi->data->get_sems(ebi); in stm32_fmc2_ebi_resume()
1769 ebi->data->set_setup(ebi); in stm32_fmc2_ebi_resume()
1772 return 0; in stm32_fmc2_ebi_resume()
1805 .compatible = "st,stm32mp1-fmc2-ebi",
1809 .compatible = "st,stm32mp25-fmc2-ebi",