225 	.pll_ratio = 8,
391 	.pll_ratio = 8,
660 	.pll_ratio = 8,
952 	.pll_ratio = 20,
1178 	.pll_ratio = 20,
1517 	.pll_ratio = 18,
1630 	u8 pll_ratio;  in dib8090_compute_pll_parameters()  local
1632 	for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {  in dib8090_compute_pll_parameters()
1633 		freq_adc = 12 * pll_ratio * (1 << 8) / 16;  in dib8090_compute_pll_parameters()
1639 		deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);  in dib8090_compute_pll_parameters()
1641 			optimal_pll_ratio = pll_ratio;  in dib8090_compute_pll_parameters()
1654 	u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);  in dib8096_set_param_override()  local
1685 	pll_ratio = dib8090_compute_pll_parameters(fe);  in dib8096_set_param_override()
1686 	if (pll_ratio == 17)  in dib8096_set_param_override()
1688 	else if (pll_ratio == 18)  in dib8096_set_param_override()
1690 	else if (pll_ratio == 19)  in dib8096_set_param_override()
1696 …s.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);  in dib8096_set_param_override()
1954 	.pll_ratio = 9,
2126 		pll.pll_ratio  = adc.pll_loopdiv;  in dib8096p_agc_startup()
2650 		pll.pll_ratio  = adc.pll_loopdiv;  in dib7090_agc_startup()
2779 	.pll_ratio = 5,
3562 	.pll_ratio = 8,