usb/dvb-usb/af9005.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* Common header-file of the Linux driver for the Afatech 9005
3  * USB1.1 DVB-T receiver.
9  * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
15 #include "dvb-usb.h"
74 #define	reg_aagc_slow_adc_scale_len 5
89 #define	reg_aagc_out_inv_pos 5
102 #define	reg_aagc_rf_loop_bw_scale_acquire_len 5
106 #define	reg_aagc_rf_loop_bw_scale_track_len 5
110 #define	reg_aagc_if_loop_bw_scale_acquire_len 5
114 #define	reg_aagc_if_loop_bw_scale_track_len 5
118 #define	reg_aagc_max_rf_agc_7_0_len 8
123 #define	reg_aagc_max_rf_agc_9_8_lsb 8
126 #define	reg_aagc_min_rf_agc_7_0_len 8
131 #define	reg_aagc_min_rf_agc_9_8_lsb 8
134 #define	reg_aagc_max_if_agc_7_0_len 8
139 #define	reg_aagc_max_if_agc_9_8_lsb 8
142 #define	reg_aagc_min_if_agc_7_0_len 8
147 #define	reg_aagc_min_if_agc_9_8_lsb 8
150 #define	reg_aagc_lock_sample_scale_len 5
170 #define	reg_aagc_rf_top_numerator_7_0_len 8
175 #define	reg_aagc_rf_top_numerator_9_8_lsb 8
178 #define	reg_aagc_if_top_numerator_7_0_len 8
183 #define	reg_aagc_if_top_numerator_9_8_lsb 8
186 #define	reg_aagc_adc_out_desired_7_0_len 8
202 #define	reg_aagc_fixed_rf_agc_control_7_0_len 8
206 #define	reg_aagc_fixed_rf_agc_control_15_8_len 8
207 #define	reg_aagc_fixed_rf_agc_control_15_8_lsb 8
210 #define	reg_aagc_fixed_rf_agc_control_23_16_len 8
218 #define	reg_aagc_fixed_if_agc_control_7_0_len 8
222 #define	reg_aagc_fixed_if_agc_control_15_8_len 8
223 #define	reg_aagc_fixed_if_agc_control_15_8_lsb 8
226 #define	reg_aagc_fixed_if_agc_control_23_16_len 8
242 #define	reg_unplug_th_len 8
246 #define	reg_weak_signal_rfagc_thr_len 8
250 #define	reg_unplug_rf_gain_th_len 8
254 #define	reg_unplug_dtop_rf_gain_th_len 8
258 #define	reg_unplug_dtop_if_gain_th_len 8
266 #define	reg_aagc_rf_x6_len 8
270 #define	reg_aagc_rf_x7_len 8
274 #define	reg_aagc_rf_x8_len 8
278 #define	reg_aagc_rf_x9_len 8
282 #define	reg_aagc_rf_x10_len 8
286 #define	reg_aagc_rf_x11_len 8
290 #define	reg_aagc_rf_x12_len 8
294 #define	reg_aagc_rf_x13_len 8
298 #define	reg_aagc_if_x0_len 8
302 #define	reg_aagc_if_x1_len 8
306 #define	reg_aagc_if_x2_len 8
310 #define	reg_aagc_if_x3_len 8
314 #define	reg_aagc_if_x4_len 8
318 #define	reg_aagc_if_x5_len 8
322 #define	reg_aagc_if_x6_len 8
326 #define	reg_aagc_if_x7_len 8
330 #define	reg_aagc_if_x8_len 8
334 #define	reg_aagc_if_x9_len 8
338 #define	reg_aagc_if_x10_len 8
342 #define	reg_aagc_if_x11_len 8
346 #define	reg_aagc_if_x12_len 8
350 #define	reg_aagc_if_x13_len 8
354 #define	reg_aagc_min_rf_ctl_8bit_for_dca_len 8
358 #define	reg_aagc_min_if_ctl_8bit_for_dca_len 8
362 #define	reg_aagc_total_gain_7_0_len 8
366 #define	reg_aagc_total_gain_15_8_len 8
367 #define	reg_aagc_total_gain_15_8_lsb 8
370 #define	reg_aagc_in_sat_cnt_7_0_len 8
374 #define	reg_aagc_in_sat_cnt_15_8_len 8
375 #define	reg_aagc_in_sat_cnt_15_8_lsb 8
378 #define	reg_aagc_in_sat_cnt_23_16_len 8
382 #define	reg_aagc_in_sat_cnt_31_24_len 8
386 #define	reg_aagc_digital_rf_volt_7_0_len 8
391 #define	reg_aagc_digital_rf_volt_9_8_lsb 8
394 #define	reg_aagc_digital_if_volt_7_0_len 8
399 #define	reg_aagc_digital_if_volt_9_8_lsb 8
402 #define	reg_aagc_rf_gain_len 8
406 #define	reg_aagc_if_gain_len 8
414 #define	reg_tinr_fifo_size_len 5
426 #define	reg_tinr_saturation_th_8_4_len 5
430 #define	reg_tinr_imp_duration_th_2k_7_0_len 8
438 #define	reg_tinr_imp_duration_th_8k_7_0_len 8
443 #define	reg_tinr_imp_duration_th_8k_10_8_lsb 8
446 #define	reg_tinr_freq_ratio_6m_7_0_len 8
450 #define	reg_tinr_freq_ratio_6m_12_8_len 5
451 #define	reg_tinr_freq_ratio_6m_12_8_lsb 8
454 #define	reg_tinr_freq_ratio_7m_7_0_len 8
458 #define	reg_tinr_freq_ratio_7m_12_8_len 5
459 #define	reg_tinr_freq_ratio_7m_12_8_lsb 8
462 #define	reg_tinr_freq_ratio_8m_7_0_len 8
466 #define	reg_tinr_freq_ratio_8m_12_8_len 5
467 #define	reg_tinr_freq_ratio_8m_12_8_lsb 8
470 #define	reg_tinr_imp_duration_th_low_2k_len 8
474 #define	reg_tinr_imp_duration_th_low_8k_len 8
478 #define	reg_tinr_counter_7_0_len 8
482 #define	reg_tinr_counter_15_8_len 8
483 #define	reg_tinr_counter_15_8_lsb 8
490 #define	reg_tinr_peak_fifo_size_len 5
498 #define	reg_tinr_search_period_7_0_len 8
502 #define	reg_tinr_search_period_15_8_len 8
503 #define	reg_tinr_search_period_15_8_lsb 8
506 #define	reg_ccifs_fcw_7_0_len 8
510 #define	reg_ccifs_fcw_12_8_len 5
511 #define	reg_ccifs_fcw_12_8_lsb 8
513 #define	reg_ccifs_spec_inv_pos 5
562 #define	reg_acif_saturate_len 8
566 #define	reg_tmr_timer0_threshold_7_0_len 8
570 #define	reg_tmr_timer0_threshold_15_8_len 8
571 #define	reg_tmr_timer0_threshold_15_8_lsb 8
590 #define	reg_tmr_timer0_count_7_0_len 8
594 #define	reg_tmr_timer0_count_15_8_len 8
595 #define	reg_tmr_timer0_count_15_8_lsb 8
614 #define	reg_fmf_len 8
618 #define	ccid_accumulate_num_2k_7_0_len 8
622 #define	ccid_accumulate_num_2k_12_8_len 5
623 #define	ccid_accumulate_num_2k_12_8_lsb 8
626 #define	ccid_accumulate_num_8k_7_0_len 8
631 #define	ccid_accumulate_num_8k_14_8_lsb 8
638 #define	ccid_desired_level_8_1_len 8
646 #define	ccid_CCID_Threshold1_len 8
650 #define	ccid_CCID_Threshold2_len 8
662 #define	ccid_multiplier_7_0_len 8
666 #define	ccid_multiplier_15_8_len 8
667 #define	ccid_multiplier_15_8_lsb 8
674 #define	reg_ccid_sx_7_0_len 8
678 #define	reg_ccid_sx_15_8_len 8
679 #define	reg_ccid_sx_15_8_lsb 8
686 #define	reg_ccid_sy_7_0_len 8
690 #define	reg_ccid_sy_15_8_len 8
691 #define	reg_ccid_sy_15_8_lsb 8
694 #define	reg_ccid_sy_23_16_len 8
698 #define	reg_ccid2_sz_7_0_len 8
702 #define	reg_ccid2_sz_15_8_len 8
703 #define	reg_ccid2_sz_15_8_lsb 8
706 #define	reg_ccid2_sz_23_16_len 8
714 #define	reg_ccid2_sy_7_0_len 8
718 #define	reg_ccid2_sy_15_8_len 8
719 #define	reg_ccid2_sy_15_8_lsb 8
722 #define	reg_ccid2_sy_23_16_len 8
730 #define	dagc1_accumulate_num_2k_7_0_len 8
734 #define	dagc1_accumulate_num_2k_12_8_len 5
735 #define	dagc1_accumulate_num_2k_12_8_lsb 8
738 #define	dagc1_accumulate_num_8k_7_0_len 8
743 #define	dagc1_accumulate_num_8k_14_8_lsb 8
750 #define	dagc1_desired_level_8_1_len 8
762 #define	reg_dagc1_in_sat_cnt_7_0_len 8
766 #define	reg_dagc1_in_sat_cnt_15_8_len 8
767 #define	reg_dagc1_in_sat_cnt_15_8_lsb 8
770 #define	reg_dagc1_in_sat_cnt_23_16_len 8
774 #define	reg_dagc1_in_sat_cnt_31_24_len 8
778 #define	reg_dagc1_out_sat_cnt_7_0_len 8
782 #define	reg_dagc1_out_sat_cnt_15_8_len 8
783 #define	reg_dagc1_out_sat_cnt_15_8_lsb 8
786 #define	reg_dagc1_out_sat_cnt_23_16_len 8
790 #define	reg_dagc1_out_sat_cnt_31_24_len 8
794 #define	dagc1_multiplier_7_0_len 8
798 #define	dagc1_multiplier_15_8_len 8
799 #define	dagc1_multiplier_15_8_lsb 8
806 #define	reg_bfs_fcw_7_0_len 8
810 #define	reg_bfs_fcw_15_8_len 8
811 #define	reg_bfs_fcw_15_8_lsb 8
818 #define	reg_antif_sf_7_0_len 8
823 #define	reg_antif_sf_11_8_lsb 8
826 #define	bfs_fcw_q_7_0_len 8
830 #define	bfs_fcw_q_15_8_len 8
831 #define	bfs_fcw_q_15_8_lsb 8
858 #define	reg_dca_th_len 5
866 #define	reg_dca_tone_7_0_len 8
870 #define	reg_dca_tone_12_8_len 5
871 #define	reg_dca_tone_12_8_lsb 8
874 #define	reg_dca_time_7_0_len 8
878 #define	reg_dca_time_15_8_len 8
879 #define	reg_dca_time_15_8_lsb 8
886 #define	reg_qnt_valuew_7_0_len 8
891 #define	reg_qnt_valuew_10_8_lsb 8
894 #define	dca_sbx_gain_diff_7_0_len 8
899 #define	dca_sbx_gain_diff_9_8_lsb 8
921 #define	reg_dca_api_tpsrdy_pos 5
930 #define	reg_qnt_nfvaluew_7_0_len 8
935 #define	reg_qnt_nfvaluew_10_8_lsb 8
938 #define	reg_qnt_flatness_thr_7_0_len 8
943 #define	reg_qnt_flatness_thr_9_8_lsb 8
966 #define	reg_dca_data_re_10_6_len 5
970 #define	reg_dca_data_im_7_0_len 8
975 #define	reg_dca_data_im_10_8_lsb 8
978 #define	reg_dca_data_h2_7_0_len 8
983 #define	reg_dca_data_h2_9_8_lsb 8
986 #define	reg_f_adc_7_0_len 8
990 #define	reg_f_adc_15_8_len 8
991 #define	reg_f_adc_15_8_lsb 8
994 #define	reg_f_adc_23_16_len 8
998 #define	intp_mu_7_0_len 8
1002 #define	intp_mu_15_8_len 8
1003 #define	intp_mu_15_8_lsb 8
1029 #define	if_agc_dis_pos 5
1109 #define	ccid_deted_pos 5
1210 #define	dagc2_accumulate_num_2k_7_0_len 8
1214 #define	dagc2_accumulate_num_2k_12_8_len 5
1215 #define	dagc2_accumulate_num_2k_12_8_lsb 8
1218 #define	dagc2_accumulate_num_8k_7_0_len 8
1222 #define	dagc2_accumulate_num_8k_12_8_len 5
1223 #define	dagc2_accumulate_num_8k_12_8_lsb 8
1225 #define	dagc2_desired_level_2_0_pos 5
1242 #define	dagc2_programmable_shift1_len 8
1246 #define	dagc2_programmable_shift2_len 8
1250 #define	reg_dagc2_in_sat_cnt_7_0_len 8
1254 #define	reg_dagc2_in_sat_cnt_15_8_len 8
1255 #define	reg_dagc2_in_sat_cnt_15_8_lsb 8
1258 #define	reg_dagc2_in_sat_cnt_23_16_len 8
1262 #define	reg_dagc2_in_sat_cnt_31_24_len 8
1266 #define	reg_dagc2_out_sat_cnt_7_0_len 8
1270 #define	reg_dagc2_out_sat_cnt_15_8_len 8
1271 #define	reg_dagc2_out_sat_cnt_15_8_lsb 8
1274 #define	reg_dagc2_out_sat_cnt_23_16_len 8
1278 #define	reg_dagc2_out_sat_cnt_31_24_len 8
1282 #define	dagc2_multiplier_7_0_len 8
1286 #define	dagc2_multiplier_15_8_len 8
1287 #define	dagc2_multiplier_15_8_lsb 8
1294 #define	cfoe_NS_coeff1_7_0_len 8
1298 #define	cfoe_NS_coeff1_15_8_len 8
1299 #define	cfoe_NS_coeff1_15_8_lsb 8
1302 #define	cfoe_NS_coeff1_23_16_len 8
1314 #define	cfoe_NS_coeff2_13_6_len 8
1318 #define	cfoe_NS_coeff2_21_14_len 8
1326 #define	cfoe_lf_c1_4_0_len 5
1330 #define	cfoe_lf_c1_12_5_len 8
1331 #define	cfoe_lf_c1_12_5_lsb 5
1334 #define	cfoe_lf_c1_20_13_len 8
1338 #define	cfoe_lf_c1_25_21_len 5
1341 #define	cfoe_lf_c2_2_0_pos 5
1346 #define	cfoe_lf_c2_10_3_len 8
1350 #define	cfoe_lf_c2_18_11_len 8
1358 #define	cfoe_ifod_7_0_len 8
1363 #define	cfoe_ifod_10_8_lsb 8
1370 #define	cfoe_FOT_divg_th_len 8
1374 #define	cfoe_FOT_cnvg_th_len 8
1378 #define	reg_cfoe_offset_7_0_len 8
1383 #define	reg_cfoe_offset_9_8_lsb 8
1390 #define	cfoe_fot_LF_output_7_0_len 8
1394 #define	cfoe_fot_LF_output_15_8_len 8
1395 #define	cfoe_fot_LF_output_15_8_lsb 8
1398 #define	cfoe_ifo_metric_7_0_len 8
1402 #define	cfoe_ifo_metric_15_8_len 8
1403 #define	cfoe_ifo_metric_15_8_lsb 8
1406 #define	cfoe_ifo_metric_23_16_len 8
1430 #define	ste_FFT_offset_7_0_len 8
1435 #define	ste_FFT_offset_11_8_lsb 8
1437 #define	reg_ste_tstmod_pos 5
1442 #define	ste_adv_start_7_0_len 8
1447 #define	ste_adv_start_10_8_lsb 8
1450 #define	ste_adv_stop_len 8
1454 #define	ste_P_value_7_0_len 8
1459 #define	ste_P_value_10_8_lsb 8
1462 #define	ste_M_value_7_0_len 8
1467 #define	ste_M_value_10_8_lsb 8
1486 #define	ste_Corr_value_I_7_0_len 8
1490 #define	ste_Corr_value_I_15_8_len 8
1491 #define	ste_Corr_value_I_15_8_lsb 8
1494 #define	ste_Corr_value_I_23_16_len 8
1502 #define	ste_Corr_value_Q_7_0_len 8
1506 #define	ste_Corr_value_Q_15_8_len 8
1507 #define	ste_Corr_value_Q_15_8_lsb 8
1510 #define	ste_Corr_value_Q_23_16_len 8
1518 #define	ste_J_num_7_0_len 8
1522 #define	ste_J_num_15_8_len 8
1523 #define	ste_J_num_15_8_lsb 8
1526 #define	ste_J_num_23_16_len 8
1530 #define	ste_J_num_31_24_len 8
1534 #define	ste_J_den_7_0_len 8
1538 #define	ste_J_den_15_8_len 8
1539 #define	ste_J_den_15_8_lsb 8
1578 #define	tpsd_Res_Bits_len 5
1590 #define	tpsd_Cell_Id_7_0_len 8
1594 #define	tpsd_Cell_Id_15_8_len 8
1598 #define	reg_fft_mask_tone0_7_0_len 8
1602 #define	reg_fft_mask_tone0_12_8_len 5
1603 #define	reg_fft_mask_tone0_12_8_lsb 8
1606 #define	reg_fft_mask_tone1_7_0_len 8
1610 #define	reg_fft_mask_tone1_12_8_len 5
1611 #define	reg_fft_mask_tone1_12_8_lsb 8
1614 #define	reg_fft_mask_tone2_7_0_len 8
1618 #define	reg_fft_mask_tone2_12_8_len 5
1619 #define	reg_fft_mask_tone2_12_8_lsb 8
1622 #define	reg_fft_mask_tone3_7_0_len 8
1626 #define	reg_fft_mask_tone3_12_8_len 5
1627 #define	reg_fft_mask_tone3_12_8_lsb 8
1630 #define	reg_fft_mask_from0_7_0_len 8
1634 #define	reg_fft_mask_from0_12_8_len 5
1635 #define	reg_fft_mask_from0_12_8_lsb 8
1638 #define	reg_fft_mask_to0_7_0_len 8
1642 #define	reg_fft_mask_to0_12_8_len 5
1643 #define	reg_fft_mask_to0_12_8_lsb 8
1646 #define	reg_fft_mask_from1_7_0_len 8
1650 #define	reg_fft_mask_from1_12_8_len 5
1651 #define	reg_fft_mask_from1_12_8_lsb 8
1654 #define	reg_fft_mask_to1_7_0_len 8
1658 #define	reg_fft_mask_to1_12_8_len 5
1659 #define	reg_fft_mask_to1_12_8_lsb 8
1662 #define	reg_cge_idx0_7_0_len 8
1666 #define	reg_cge_idx0_12_8_len 5
1667 #define	reg_cge_idx0_12_8_lsb 8
1670 #define	reg_cge_idx1_7_0_len 8
1674 #define	reg_cge_idx1_12_8_len 5
1675 #define	reg_cge_idx1_12_8_lsb 8
1678 #define	reg_cge_idx2_7_0_len 8
1682 #define	reg_cge_idx2_12_8_len 5
1683 #define	reg_cge_idx2_12_8_lsb 8
1686 #define	reg_cge_idx3_7_0_len 8
1690 #define	reg_cge_idx3_12_8_len 5
1691 #define	reg_cge_idx3_12_8_lsb 8
1694 #define	reg_cge_idx4_7_0_len 8
1698 #define	reg_cge_idx4_12_8_len 5
1699 #define	reg_cge_idx4_12_8_lsb 8
1702 #define	reg_cge_idx5_7_0_len 8
1706 #define	reg_cge_idx5_12_8_len 5
1707 #define	reg_cge_idx5_12_8_lsb 8
1710 #define	reg_cge_idx6_7_0_len 8
1714 #define	reg_cge_idx6_12_8_len 5
1715 #define	reg_cge_idx6_12_8_lsb 8
1718 #define	reg_cge_idx7_7_0_len 8
1722 #define	reg_cge_idx7_12_8_len 5
1723 #define	reg_cge_idx7_12_8_lsb 8
1726 #define	reg_cge_idx8_7_0_len 8
1730 #define	reg_cge_idx8_12_8_len 5
1731 #define	reg_cge_idx8_12_8_lsb 8
1734 #define	reg_cge_idx9_7_0_len 8
1738 #define	reg_cge_idx9_12_8_len 5
1739 #define	reg_cge_idx9_12_8_lsb 8
1742 #define	reg_cge_idx10_7_0_len 8
1746 #define	reg_cge_idx10_12_8_len 5
1747 #define	reg_cge_idx10_12_8_lsb 8
1750 #define	reg_cge_idx11_7_0_len 8
1754 #define	reg_cge_idx11_12_8_len 5
1755 #define	reg_cge_idx11_12_8_lsb 8
1758 #define	reg_cge_idx12_7_0_len 8
1762 #define	reg_cge_idx12_12_8_len 5
1763 #define	reg_cge_idx12_12_8_lsb 8
1766 #define	reg_cge_idx13_7_0_len 8
1770 #define	reg_cge_idx13_12_8_len 5
1771 #define	reg_cge_idx13_12_8_lsb 8
1774 #define	reg_cge_idx14_7_0_len 8
1778 #define	reg_cge_idx14_12_8_len 5
1779 #define	reg_cge_idx14_12_8_lsb 8
1782 #define	reg_cge_idx15_7_0_len 8
1786 #define	reg_cge_idx15_12_8_len 5
1787 #define	reg_cge_idx15_12_8_lsb 8
1790 #define	reg_fft_crc_len 8
1810 #define	reg_fft_idx_max_7_0_len 8
1814 #define	reg_fft_idx_max_12_8_len 5
1815 #define	reg_fft_idx_max_12_8_lsb 8
1830 #define	reg_fft_rotate_base_4_0_len 5
1834 #define	reg_fft_rotate_base_12_5_len 8
1835 #define	reg_fft_rotate_base_12_5_lsb 5
1854 #define	reg_fd_noname_7_0_len 8
1858 #define	reg_fd_noname_15_8_len 8
1859 #define	reg_fd_noname_15_8_lsb 8
1862 #define	reg_fd_noname_23_16_len 8
1866 #define	reg_fd_noname_31_24_len 8
1870 #define	fd_fpcc_cp_corr_signn_len 8
1874 #define	reg_feq_s1_len 5
1890 #define	reg_sfoe_ns_7_0_len 8
1895 #define	reg_sfoe_ns_14_8_lsb 8
1898 #define	reg_sfoe_c1_7_0_len 8
1902 #define	reg_sfoe_c1_15_8_len 8
1903 #define	reg_sfoe_c1_15_8_lsb 8
1910 #define	reg_sfoe_c2_7_0_len 8
1914 #define	reg_sfoe_c2_15_8_len 8
1915 #define	reg_sfoe_c2_15_8_lsb 8
1922 #define	reg_sfoe_out_9_2_len 8
1934 #define	reg_sfoe_convg_th_len 8
1938 #define	reg_sfoe_divg_th_len 8
1961 #define	fd_tpsd_s17_pos 5
2005 #define	reg_cfoe_ifoe_rst_pos 5
2037 #define	fd_cfoe_fot_valid_pos 5
2069 #define	reg_sfoe_divg_int_pos 5
2106 #define	fd_sqi_tps_level_shift_len 8
2118 #define	fd_sqi_s3_len 8
2130 #define	fd_sqi_s2_len 5
2154 #define	reg_fste_ehw_7_0_len 8
2159 #define	reg_fste_ehw_9_8_lsb 8
2166 #define	reg_fste_phase_ini_7_0_len 8
2171 #define	reg_fste_phase_ini_11_8_lsb 8
2178 #define	reg_fste_phase_inc_11_4_len 8
2198 #define	reg_fste_frac_step_size_7_0_len 8
2202 #define	reg_fste_frac_step_size_15_8_len 8
2203 #define	reg_fste_frac_step_size_15_8_lsb 8
2226 #define	reg_fste_w0_7_0_len 8
2231 #define	reg_fste_w0_11_8_lsb 8
2238 #define	reg_fste_w1_11_4_len 8
2242 #define	reg_fste_w2_7_0_len 8
2247 #define	reg_fste_w2_11_8_lsb 8
2254 #define	reg_fste_w3_11_4_len 8
2258 #define	reg_fste_w4_7_0_len 8
2263 #define	reg_fste_w4_11_8_lsb 8
2270 #define	reg_fste_w5_11_4_len 8
2274 #define	reg_fste_w6_7_0_len 8
2279 #define	reg_fste_w6_11_8_lsb 8
2286 #define	reg_fste_w7_11_4_len 8
2290 #define	reg_fste_w8_7_0_len 8
2295 #define	reg_fste_w8_11_8_lsb 8
2302 #define	reg_fste_w9_11_4_len 8
2306 #define	reg_fste_wa_7_0_len 8
2311 #define	reg_fste_wa_11_8_lsb 8
2318 #define	reg_fste_wb_11_4_len 8
2322 #define	fd_fste_i_adj_len 5
2326 #define	fd_fste_f_adj_7_0_len 8
2330 #define	fd_fste_f_adj_15_8_len 8
2331 #define	fd_fste_f_adj_15_8_lsb 8
2350 #define	reg_feq_Leak_B_Float0_len 8
2354 #define	reg_feq_Leak_B_Float1_len 8
2358 #define	reg_feq_Leak_B_Float2_len 8
2362 #define	reg_feq_Leak_B_Float3_len 8
2366 #define	reg_feq_Leak_B_Float4_len 8
2370 #define	reg_feq_Leak_B_Float5_len 8
2374 #define	reg_feq_Leak_B_Float6_len 8
2378 #define	reg_feq_Leak_B_Float7_len 8
2382 #define	reg_feq_data_h2_7_0_len 8
2387 #define	reg_feq_data_h2_9_8_lsb 8
2402 #define	reg_feq_tone_idx_4_0_len 5
2406 #define	reg_feq_tone_idx_12_5_len 8
2407 #define	reg_feq_tone_idx_12_5_lsb 5
2410 #define	reg_feq_data_re_7_0_len 8
2415 #define	reg_feq_data_re_10_8_lsb 8
2418 #define	reg_feq_data_im_7_0_len 8
2423 #define	reg_feq_data_im_10_8_lsb 8
2426 #define	reg_feq_y_re_len 8
2430 #define	reg_feq_y_im_len 8
2434 #define	reg_feq_h_re_7_0_len 8
2442 #define	reg_feq_h_im_7_0_len 8
2450 #define	fec_super_frm_unit_7_0_len 8
2454 #define	fec_super_frm_unit_15_8_len 8
2455 #define	fec_super_frm_unit_15_8_lsb 8
2458 #define	fec_vtb_err_bit_cnt_7_0_len 8
2462 #define	fec_vtb_err_bit_cnt_15_8_len 8
2463 #define	fec_vtb_err_bit_cnt_15_8_lsb 8
2466 #define	fec_vtb_err_bit_cnt_23_16_len 8
2470 #define	fec_rsd_packet_unit_7_0_len 8
2474 #define	fec_rsd_packet_unit_15_8_len 8
2475 #define	fec_rsd_packet_unit_15_8_lsb 8
2478 #define	fec_rsd_bit_err_cnt_7_0_len 8
2482 #define	fec_rsd_bit_err_cnt_15_8_len 8
2483 #define	fec_rsd_bit_err_cnt_15_8_lsb 8
2486 #define	fec_rsd_bit_err_cnt_23_16_len 8
2490 #define	fec_rsd_abort_packet_cnt_7_0_len 8
2494 #define	fec_rsd_abort_packet_cnt_15_8_len 8
2495 #define	fec_rsd_abort_packet_cnt_15_8_lsb 8
2498 #define	fec_RSD_PKT_NUM_PER_UNIT_7_0_len 8
2502 #define	fec_RSD_PKT_NUM_PER_UNIT_15_8_len 8
2503 #define	fec_RSD_PKT_NUM_PER_UNIT_15_8_lsb 8
2506 #define	fec_RS_TH_1_7_0_len 8
2510 #define	fec_RS_TH_1_15_8_len 8
2511 #define	fec_RS_TH_1_15_8_lsb 8
2514 #define	fec_RS_TH_2_len 8
2537 #define	fec_rsd_ber_rst_pos 5
2578 #define	fec_vtb_pm_crc_len 8
2582 #define	fec_vtb_tb_7_crc_len 8
2586 #define	fec_vtb_tb_6_crc_len 8
2590 #define	fec_vtb_tb_5_crc_len 8
2594 #define	fec_vtb_tb_4_crc_len 8
2598 #define	fec_vtb_tb_3_crc_len 8
2602 #define	fec_vtb_tb_2_crc_len 8
2606 #define	fec_vtb_tb_1_crc_len 8
2610 #define	fec_vtb_tb_0_crc_len 8
2614 #define	fec_rsd_bank0_crc_len 8
2618 #define	fec_rsd_bank1_crc_len 8
2622 #define	fec_idi_vtb_crc_len 8
2681 #define	reg_fclk_cste_pos 5
2690 #define	i2c_m_slave_addr_len 8
2694 #define	i2c_m_data1_len 8
2698 #define	i2c_m_data2_len 8
2702 #define	i2c_m_data3_len 8
2706 #define	i2c_m_data4_len 8
2710 #define	i2c_m_data5_len 8
2714 #define	i2c_m_data6_len 8
2718 #define	i2c_m_data7_len 8
2722 #define	i2c_m_data8_len 8
2726 #define	i2c_m_data9_len 8
2730 #define	i2c_m_data10_len 8
2734 #define	i2c_m_data11_len 8
2758 #define	i2c_m_period_len 8
2781 #define	reg_tuner_sda_sync_on_pos 5
2805 #define	mp2if_psb_empty_pos 5
2830 #define	reg_sw_mon51_len 8
2889 #define	reg_top_lockon2_pos 5
2913 #define	reg_top_lock2_pos 5
2937 #define	reg_top_locken2_pos 5
2961 #define	reg_top_locki2_pos 5
2966 #define	reg_dummy_7_0_len 8
2970 #define	reg_dummy_15_8_len 8
2971 #define	reg_dummy_15_8_lsb 8
2974 #define	reg_dummy_23_16_len 8
2978 #define	reg_dummy_31_24_len 8
2982 #define	reg_dummy_39_32_len 8
2986 #define	reg_dummy_47_40_len 8
2990 #define	reg_dummy_55_48_len 8
2994 #define	reg_dummy_63_56_len 8
2998 #define	reg_dummy_71_64_len 8
3002 #define	reg_dummy_79_72_len 8
3006 #define	reg_dummy_87_80_len 8
3010 #define	reg_dummy_95_88_len 8
3014 #define	reg_dummy_103_96_len 8
3049 #define	reg_dummy_111_104_len 8
3053 #define	reg_dummy_119_112_len 8
3057 #define	reg_dummy_127_120_len 8
3061 #define	reg_dummy_135_128_len 8
3066 #define	reg_dummy_143_136_len 8
3076 #define	reg_dummy_151_144_len 8
3081 #define	reg_dummy_159_152_len 8
3086 #define	reg_dummy_167_160_len 8
3091 #define	reg_dummy_175_168_len 8
3096 #define	reg_dummy_183_176_len 8
3111 #define reg_OFSM_version_control_7_0_len 8
3116 #define reg_OFSM_version_control_15_8_len 8
3121 #define reg_OFSM_version_control_23_16_len 8
3126 #define	reg_dummy_191_184_len 8
3131 #define	reg_dummy_199_192_len 8
3164 #define	reg_ce_dynamic_th_7_0_len 8
3168 #define	reg_ce_dynamic_th_15_8_len 8
3169 #define	reg_ce_dynamic_th_15_8_lsb 8
3172 #define	reg_ce_s1_len 5
3175 #define	reg_ce_var_forced_value_pos 5
3180 #define	reg_ce_data_im_7_0_len 8
3204 #define	reg_ce_centroid_drift_th_len 8
3212 #define	reg_ce_centroid_bias_inc_7_0_len 8
3220 #define	reg_ce_var_th0_7_0_len 8
3224 #define	reg_ce_var_th0_15_8_len 8
3225 #define	reg_ce_var_th0_15_8_lsb 8
3228 #define	reg_ce_var_th1_7_0_len 8
3232 #define	reg_ce_var_th1_15_8_len 8
3233 #define	reg_ce_var_th1_15_8_lsb 8
3236 #define	reg_ce_var_th2_7_0_len 8
3240 #define	reg_ce_var_th2_15_8_len 8
3241 #define	reg_ce_var_th2_15_8_lsb 8
3244 #define	reg_ce_var_th3_7_0_len 8
3248 #define	reg_ce_var_th3_15_8_len 8
3249 #define	reg_ce_var_th3_15_8_lsb 8
3252 #define	reg_ce_var_th4_7_0_len 8
3256 #define	reg_ce_var_th4_15_8_len 8
3257 #define	reg_ce_var_th4_15_8_lsb 8
3260 #define	reg_ce_var_th5_7_0_len 8
3264 #define	reg_ce_var_th5_15_8_len 8
3265 #define	reg_ce_var_th5_15_8_lsb 8
3268 #define	reg_ce_var_th6_7_0_len 8
3272 #define	reg_ce_var_th6_15_8_len 8
3273 #define	reg_ce_var_th6_15_8_lsb 8
3295 #define	reg_ce_var_max_pos 5
3300 #define	reg_ce_cent_forced_value_7_0_len 8
3305 #define	reg_ce_cent_forced_value_11_8_lsb 8
3316 #define	reg_ce_centroid_max_11_7_len 5
3332 #define	reg_ce_centroid_out_11_4_len 8
3336 #define	reg_ce_bias_7_0_len 8
3341 #define	reg_ce_bias_11_8_lsb 8
3348 #define	reg_ce_m1_11_4_len 8
3352 #define	reg_ce_rh0_7_0_len 8
3356 #define	reg_ce_rh0_15_8_len 8
3357 #define	reg_ce_rh0_15_8_lsb 8
3360 #define	reg_ce_rh0_23_16_len 8
3364 #define	reg_ce_rh0_31_24_len 8
3368 #define	reg_ce_rh3_real_7_0_len 8
3372 #define	reg_ce_rh3_real_15_8_len 8
3373 #define	reg_ce_rh3_real_15_8_lsb 8
3376 #define	reg_ce_rh3_real_23_16_len 8
3380 #define	reg_ce_rh3_real_31_24_len 8
3384 #define	reg_ce_rh3_imag_7_0_len 8
3388 #define	reg_ce_rh3_imag_15_8_len 8
3389 #define	reg_ce_rh3_imag_15_8_lsb 8
3392 #define	reg_ce_rh3_imag_23_16_len 8
3396 #define	reg_ce_rh3_imag_31_24_len 8
3400 #define	reg_feq_fix_eh2_7_0_len 8
3404 #define	reg_feq_fix_eh2_15_8_len 8
3405 #define	reg_feq_fix_eh2_15_8_lsb 8
3408 #define	reg_feq_fix_eh2_23_16_len 8
3412 #define	reg_feq_fix_eh2_31_24_len 8
3416 #define	reg_ce_m2_central_7_0_len 8
3420 #define	reg_ce_m2_central_15_8_len 8
3421 #define	reg_ce_m2_central_15_8_lsb 8
3475 extern u8 regmask[8];