Lines Matching +full:4 +full:- +full:temp
1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * - CX23885/7/8 support
25 #include <media/v4l2-common.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/v4l2-event.h>
28 #include <media/drv-intf/cx2341x.h>
32 #define CX231xx_FIRM_IMAGE_NAME "v4l-cx23885-enc.fw"
65 MODULE_PARM_DESC(mpeglines, "number of lines in an MPEG buffer, range 2-32");
70 "number of bytes in each line of an MPEG buffer, range 512-1024");
84 .name = "NTSC-M",
87 .name = "NTSC-JP",
90 .name = "PAL-BG",
93 .name = "PAL-DK",
96 .name = "PAL-I",
99 .name = "PAL-M",
102 .name = "PAL-N",
105 .name = "PAL-Nc",
108 .name = "PAL-60",
111 .name = "SECAM-L",
114 .name = "SECAM-DK",
119 /* ------------------------------------------------------------------ */
208 CX231xx_NOTIFICATION_NO_MAILBOX = -1,
245 /* defines below are from ivtv-driver.h */
263 * bits 31-16
264 *+-----------+
266 *|+-----------+
268 *|+-------+-------+-------+-------+-------+-------+-------+-------+
270 *|+-------+-------+-------+-------+-------+-------+-------+-------+
271 *| bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
272 *|+-------+-------+-------+-------+-------+-------+-------+-------+
274 *|+-------+-------+-------+-------+-------+-------+-------+-------+
285 *bits 31-6 bits 5-4 bit 3 bits 2-1 Bit 0
286 *+--------+-------------+--------+--------------+------------+
288 *+--------+-------------+--------+--------------+------------+
290 #define MC417_SPD_CTL(x) (((x) << 4) & 0x00000030)
316 (u8 *)&value, 4, 0, 0); in set_itvc_reg()
329 (u8 *)val_ptr, 4, 0, 1); in get_itvc_reg()
346 dprintk(3, "ERROR: Timeout - gpio=%x\n", gpio); in wait_for_mci_complete()
347 return -EIO; in wait_for_mci_complete()
355 u32 temp; in mc417_register_write() local
358 temp = 0x82 | MCI_REGISTER_DATA_BYTE0 | ((value & 0x000000FF) << 8); in mc417_register_write()
359 temp = temp << 10; in mc417_register_write()
360 status = set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
363 temp = temp | (0x05 << 10); in mc417_register_write()
364 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
367 temp = 0x82 | MCI_REGISTER_DATA_BYTE1 | (value & 0x0000FF00); in mc417_register_write()
368 temp = temp << 10; in mc417_register_write()
369 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
370 temp = temp | (0x05 << 10); in mc417_register_write()
371 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
374 temp = 0x82 | MCI_REGISTER_DATA_BYTE2 | ((value & 0x00FF0000) >> 8); in mc417_register_write()
375 temp = temp << 10; in mc417_register_write()
376 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
377 temp = temp | (0x05 << 10); in mc417_register_write()
378 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
381 temp = 0x82 | MCI_REGISTER_DATA_BYTE3 | ((value & 0xFF000000) >> 16); in mc417_register_write()
382 temp = temp << 10; in mc417_register_write()
383 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
384 temp = temp | (0x05 << 10); in mc417_register_write()
385 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
388 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE0 | ((address & 0x000000FF) << 8); in mc417_register_write()
389 temp = temp << 10; in mc417_register_write()
390 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
391 temp = temp | (0x05 << 10); in mc417_register_write()
392 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
395 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE1 | (address & 0x0000FF00); in mc417_register_write()
396 temp = temp << 10; in mc417_register_write()
397 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
398 temp = temp | (0x05 << 10); in mc417_register_write()
399 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
402 temp = 0x82 | MCI_REGISTER_MODE | MCI_MODE_REGISTER_WRITE; in mc417_register_write()
403 temp = temp << 10; in mc417_register_write()
404 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
405 temp = temp | (0x05 << 10); in mc417_register_write()
406 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_write()
414 u32 temp; in mc417_register_read() local
418 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); in mc417_register_read()
419 temp = temp << 10; in mc417_register_read()
420 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_read()
421 temp = temp | ((0x05) << 10); in mc417_register_read()
422 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_read()
425 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE1 | (address & 0xFF00); in mc417_register_read()
426 temp = temp << 10; in mc417_register_read()
427 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_read()
428 temp = temp | ((0x05) << 10); in mc417_register_read()
429 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_read()
432 temp = 0x82 | MCI_REGISTER_MODE | MCI_MODE_REGISTER_READ; in mc417_register_read()
433 temp = temp << 10; in mc417_register_read()
434 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_read()
435 temp = temp | ((0x05) << 10); in mc417_register_read()
436 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_register_read()
442 /*switch the DATA- GPIO to input mode;*/ in mc417_register_read()
445 temp = (0x82 | MCI_REGISTER_DATA_BYTE0) << 10; in mc417_register_read()
446 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
447 temp = ((0x81 | MCI_REGISTER_DATA_BYTE0) << 10); in mc417_register_read()
448 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
449 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_register_read()
450 return_value |= ((temp & 0x03FC0000) >> 18); in mc417_register_read()
454 temp = (0x82 | MCI_REGISTER_DATA_BYTE1) << 10; in mc417_register_read()
455 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
456 temp = ((0x81 | MCI_REGISTER_DATA_BYTE1) << 10); in mc417_register_read()
457 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
458 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_register_read()
460 return_value |= ((temp & 0x03FC0000) >> 10); in mc417_register_read()
464 temp = (0x82 | MCI_REGISTER_DATA_BYTE2) << 10; in mc417_register_read()
465 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
466 temp = ((0x81 | MCI_REGISTER_DATA_BYTE2) << 10); in mc417_register_read()
467 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
468 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_register_read()
469 return_value |= ((temp & 0x03FC0000) >> 2); in mc417_register_read()
473 temp = (0x82 | MCI_REGISTER_DATA_BYTE3) << 10; in mc417_register_read()
474 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
475 temp = ((0x81 | MCI_REGISTER_DATA_BYTE3) << 10); in mc417_register_read()
476 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_register_read()
477 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_register_read()
478 return_value |= ((temp & 0x03FC0000) << 6); in mc417_register_read()
489 u32 temp; in mc417_memory_write() local
492 temp = 0x82 | MCI_MEMORY_DATA_BYTE0 | ((value & 0x000000FF) << 8); in mc417_memory_write()
493 temp = temp << 10; in mc417_memory_write()
494 ret = set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
497 temp = temp | (0x05 << 10); in mc417_memory_write()
498 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
501 temp = 0x82 | MCI_MEMORY_DATA_BYTE1 | (value & 0x0000FF00); in mc417_memory_write()
502 temp = temp << 10; in mc417_memory_write()
503 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
504 temp = temp | (0x05 << 10); in mc417_memory_write()
505 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
508 temp = 0x82 | MCI_MEMORY_DATA_BYTE2 | ((value & 0x00FF0000) >> 8); in mc417_memory_write()
509 temp = temp << 10; in mc417_memory_write()
510 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
511 temp = temp | (0x05 << 10); in mc417_memory_write()
512 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
515 temp = 0x82 | MCI_MEMORY_DATA_BYTE3 | ((value & 0xFF000000) >> 16); in mc417_memory_write()
516 temp = temp << 10; in mc417_memory_write()
517 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
518 temp = temp | (0x05 << 10); in mc417_memory_write()
519 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
522 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_WRITE | in mc417_memory_write()
524 temp = temp << 10; in mc417_memory_write()
525 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
526 temp = temp | (0x05 << 10); in mc417_memory_write()
527 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
530 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00); in mc417_memory_write()
531 temp = temp << 10; in mc417_memory_write()
532 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
533 temp = temp | (0x05 << 10); in mc417_memory_write()
534 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
537 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); in mc417_memory_write()
538 temp = temp << 10; in mc417_memory_write()
539 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
540 temp = temp | (0x05 << 10); in mc417_memory_write()
541 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_write()
551 u32 temp = 0; in mc417_memory_read() local
556 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_READ | in mc417_memory_read()
558 temp = temp << 10; in mc417_memory_read()
559 ret = set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_read()
562 temp = temp | (0x05 << 10); in mc417_memory_read()
563 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_read()
566 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00); in mc417_memory_read()
567 temp = temp << 10; in mc417_memory_read()
568 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_read()
569 temp = temp | (0x05 << 10); in mc417_memory_read()
570 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_read()
573 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); in mc417_memory_read()
574 temp = temp << 10; in mc417_memory_read()
575 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_read()
576 temp = temp | (0x05 << 10); in mc417_memory_read()
577 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); in mc417_memory_read()
584 temp = (0x82 | MCI_MEMORY_DATA_BYTE3) << 10; in mc417_memory_read()
585 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
586 temp = ((0x81 | MCI_MEMORY_DATA_BYTE3) << 10); in mc417_memory_read()
587 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
588 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_memory_read()
589 return_value |= ((temp & 0x03FC0000) << 6); in mc417_memory_read()
593 temp = (0x82 | MCI_MEMORY_DATA_BYTE2) << 10; in mc417_memory_read()
594 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
595 temp = ((0x81 | MCI_MEMORY_DATA_BYTE2) << 10); in mc417_memory_read()
596 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
597 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_memory_read()
598 return_value |= ((temp & 0x03FC0000) >> 2); in mc417_memory_read()
602 temp = (0x82 | MCI_MEMORY_DATA_BYTE1) << 10; in mc417_memory_read()
603 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
604 temp = ((0x81 | MCI_MEMORY_DATA_BYTE1) << 10); in mc417_memory_read()
605 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
606 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_memory_read()
607 return_value |= ((temp & 0x03FC0000) >> 10); in mc417_memory_read()
611 temp = (0x82 | MCI_MEMORY_DATA_BYTE0) << 10; in mc417_memory_read()
612 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
613 temp = ((0x81 | MCI_MEMORY_DATA_BYTE0) << 10); in mc417_memory_read()
614 set_itvc_reg(dev, ITVC_READ_DIR, temp); in mc417_memory_read()
615 get_itvc_reg(dev, ITVC_READ_DIR, &temp); in mc417_memory_read()
616 return_value |= ((temp & 0x03FC0000) >> 18); in mc417_memory_read()
623 /* ------------------------------------------------------------------ */
727 mc417_memory_read(dev, dev->cx23417_mailbox - 4, &value); in cx231xx_mbox_func()
731 return -EIO; in cx231xx_mbox_func()
737 mc417_memory_read(dev, dev->cx23417_mailbox, &flag); in cx231xx_mbox_func()
741 return -EBUSY; in cx231xx_mbox_func()
745 mc417_memory_write(dev, dev->cx23417_mailbox, flag); in cx231xx_mbox_func()
749 mc417_memory_write(dev, dev->cx23417_mailbox + 1, command); in cx231xx_mbox_func()
750 mc417_memory_write(dev, dev->cx23417_mailbox + 3, in cx231xx_mbox_func()
753 mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, data[i]); in cx231xx_mbox_func()
757 mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, 0); in cx231xx_mbox_func()
760 mc417_memory_write(dev, dev->cx23417_mailbox, flag); in cx231xx_mbox_func()
765 mc417_memory_read(dev, dev->cx23417_mailbox, &flag); in cx231xx_mbox_func()
766 if (0 != (flag & 4)) in cx231xx_mbox_func()
770 return -EIO; in cx231xx_mbox_func()
777 mc417_memory_read(dev, dev->cx23417_mailbox + 4 + i, data + i); in cx231xx_mbox_func()
781 mc417_memory_read(dev, dev->cx23417_mailbox + 2, &retval); in cx231xx_mbox_func()
785 mc417_memory_write(dev, dev->cx23417_mailbox, flag); in cx231xx_mbox_func()
819 u32 signature[4] = { in cx231xx_find_mailbox()
837 if (4 == signaturecnt) { in cx231xx_find_mailbox()
843 return -EIO; in cx231xx_find_mailbox()
849 u32 temp = 0; in mci_write_memory_to_gpio() local
852 temp = 0x82 | MCI_MEMORY_DATA_BYTE0 | ((value & 0x000000FF) << 8); in mci_write_memory_to_gpio()
853 temp = temp << 10; in mci_write_memory_to_gpio()
854 *p_fw_image = temp; in mci_write_memory_to_gpio()
856 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
857 *p_fw_image = temp; in mci_write_memory_to_gpio()
861 temp = 0x82 | MCI_MEMORY_DATA_BYTE1 | (value & 0x0000FF00); in mci_write_memory_to_gpio()
862 temp = temp << 10; in mci_write_memory_to_gpio()
863 *p_fw_image = temp; in mci_write_memory_to_gpio()
865 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
866 *p_fw_image = temp; in mci_write_memory_to_gpio()
870 temp = 0x82 | MCI_MEMORY_DATA_BYTE2 | ((value & 0x00FF0000) >> 8); in mci_write_memory_to_gpio()
871 temp = temp << 10; in mci_write_memory_to_gpio()
872 *p_fw_image = temp; in mci_write_memory_to_gpio()
874 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
875 *p_fw_image = temp; in mci_write_memory_to_gpio()
879 temp = 0x82 | MCI_MEMORY_DATA_BYTE3 | ((value & 0xFF000000) >> 16); in mci_write_memory_to_gpio()
880 temp = temp << 10; in mci_write_memory_to_gpio()
881 *p_fw_image = temp; in mci_write_memory_to_gpio()
883 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
884 *p_fw_image = temp; in mci_write_memory_to_gpio()
888 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_WRITE | in mci_write_memory_to_gpio()
890 temp = temp << 10; in mci_write_memory_to_gpio()
891 *p_fw_image = temp; in mci_write_memory_to_gpio()
893 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
894 *p_fw_image = temp; in mci_write_memory_to_gpio()
898 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00); in mci_write_memory_to_gpio()
899 temp = temp << 10; in mci_write_memory_to_gpio()
900 *p_fw_image = temp; in mci_write_memory_to_gpio()
902 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
903 *p_fw_image = temp; in mci_write_memory_to_gpio()
907 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); in mci_write_memory_to_gpio()
908 temp = temp << 10; in mci_write_memory_to_gpio()
909 *p_fw_image = temp; in mci_write_memory_to_gpio()
911 temp = temp | (0x05 << 10); in mci_write_memory_to_gpio()
912 *p_fw_image = temp; in mci_write_memory_to_gpio()
942 p_current_fw = vmalloc(1884180 * 4); in cx231xx_load_firmware()
946 return -ENOMEM; in cx231xx_load_firmware()
953 return -ENOMEM; in cx231xx_load_firmware()
974 dev_err(dev->dev, in cx231xx_load_firmware()
982 dev->dev); in cx231xx_load_firmware()
985 dev_err(dev->dev, in cx231xx_load_firmware()
988 dev_err(dev->dev, in cx231xx_load_firmware()
995 if (firmware->size != CX231xx_FIRM_IMAGE_SIZE) { in cx231xx_load_firmware()
996 dev_err(dev->dev, in cx231xx_load_firmware()
998 firmware->size, CX231xx_FIRM_IMAGE_SIZE); in cx231xx_load_firmware()
1002 return -EINVAL; in cx231xx_load_firmware()
1005 if (0 != memcmp(firmware->data, magic, 8)) { in cx231xx_load_firmware()
1006 dev_err(dev->dev, in cx231xx_load_firmware()
1011 return -EINVAL; in cx231xx_load_firmware()
1018 p_fw_data = (u32 *)firmware->data; in cx231xx_load_firmware()
1019 dprintk(2, "firmware->size=%zd\n", firmware->size); in cx231xx_load_firmware()
1020 for (transfer_size = 0; transfer_size < firmware->size; in cx231xx_load_firmware()
1021 transfer_size += 4) { in cx231xx_load_firmware()
1030 /*download the firmware by ep5-out*/ in cx231xx_load_firmware()
1035 *(p_buffer + i) = (u8)(*(p_fw + (frame * 128 * 8 + (i / 4))) & 0x000000FF); in cx231xx_load_firmware()
1037 *(p_buffer + i) = (u8)((*(p_fw + (frame * 128 * 8 + (i / 4))) & 0x0000FF00) >> 8); in cx231xx_load_firmware()
1039 *(p_buffer + i) = (u8)((*(p_fw + (frame * 128 * 8 + (i / 4))) & 0x00FF0000) >> 16); in cx231xx_load_firmware()
1041 *(p_buffer + i) = (u8)((*(p_fw + (frame * 128 * 8 + (i / 4))) & 0xFF000000) >> 24); in cx231xx_load_firmware()
1057 dev_err(dev->dev, in cx231xx_load_firmware()
1070 dev_err(dev->dev, in cx231xx_load_firmware()
1084 dev->ts1.height, dev->ts1.width); in cx231xx_codec_settings()
1086 dev->mpeg_ctrl_handler.width = dev->ts1.width; in cx231xx_codec_settings()
1087 dev->mpeg_ctrl_handler.height = dev->ts1.height; in cx231xx_codec_settings()
1089 cx2341x_handler_setup(&dev->mpeg_ctrl_handler); in cx231xx_codec_settings()
1092 cx231xx_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1); in cx231xx_codec_settings()
1109 dev_err(dev->dev, in cx231xx_initialize_codec()
1115 dev_err(dev->dev, "%s: mailbox < 0, error\n", in cx231xx_initialize_codec()
1119 dev->cx23417_mailbox = retval; in cx231xx_initialize_codec()
1122 dev_err(dev->dev, in cx231xx_initialize_codec()
1129 dev_err(dev->dev, in cx231xx_initialize_codec()
1148 cx231xx_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0, 1, 3, 4); in cx231xx_initialize_codec()
1167 data[2] = 4; /* total bufs */ in cx231xx_initialize_codec()
1169 data[4] = 0x206080C0; /* stop codes */ in cx231xx_initialize_codec()
1174 data[2], data[3], data[4], data[5], data[6]); in cx231xx_initialize_codec()
1213 /* ------------------------------------------------------------------ */
1223 dev->ts1.ts_packet_size = mpeglinesize; in queue_setup()
1224 dev->ts1.ts_packet_count = mpeglines; in queue_setup()
1227 *nbuffers = CX231XX_MIN_BUF - q_num_bufs; in queue_setup()
1230 return sizes[0] < size ? -EINVAL : 0; in queue_setup()
1245 if (dma_q->mpeg_buffer_done == 0) { in buffer_copy()
1246 if (list_empty(&dma_q->active)) in buffer_copy()
1249 buf = list_entry(dma_q->active.next, in buffer_copy()
1251 dev->video_mode.isoc_ctl.buf = buf; in buffer_copy()
1252 dma_q->mpeg_buffer_done = 1; in buffer_copy()
1255 buf = dev->video_mode.isoc_ctl.buf; in buffer_copy()
1256 vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); in buffer_copy()
1258 if ((dma_q->mpeg_buffer_completed+len) < in buffer_copy()
1260 if (dma_q->add_ps_package_head == in buffer_copy()
1262 memcpy(vbuf+dma_q->mpeg_buffer_completed, in buffer_copy()
1263 dma_q->ps_head, 3); in buffer_copy()
1264 dma_q->mpeg_buffer_completed = in buffer_copy()
1265 dma_q->mpeg_buffer_completed + 3; in buffer_copy()
1266 dma_q->add_ps_package_head = in buffer_copy()
1269 memcpy(vbuf+dma_q->mpeg_buffer_completed, data, len); in buffer_copy()
1270 dma_q->mpeg_buffer_completed = in buffer_copy()
1271 dma_q->mpeg_buffer_completed + len; in buffer_copy()
1273 dma_q->mpeg_buffer_done = 0; in buffer_copy()
1276 mpeglines*mpeglinesize - dma_q->mpeg_buffer_completed; in buffer_copy()
1277 memcpy(vbuf+dma_q->mpeg_buffer_completed, in buffer_copy()
1280 buf->vb.vb2_buf.timestamp = ktime_get_ns(); in buffer_copy()
1281 buf->vb.sequence = dma_q->sequence++; in buffer_copy()
1282 list_del(&buf->list); in buffer_copy()
1283 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); in buffer_copy()
1284 dma_q->mpeg_buffer_completed = 0; in buffer_copy()
1286 if (len - tail_data > 0) { in buffer_copy()
1288 dma_q->left_data_count = len - tail_data; in buffer_copy()
1289 memcpy(dma_q->p_left_data, in buffer_copy()
1290 p_data, len - tail_data); in buffer_copy()
1301 if (list_empty(&dma_q->active)) in buffer_filled()
1304 buf = list_entry(dma_q->active.next, struct cx231xx_buffer, list); in buffer_filled()
1307 vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); in buffer_filled()
1309 buf->vb.sequence = dma_q->sequence++; in buffer_filled()
1310 buf->vb.vb2_buf.timestamp = ktime_get_ns(); in buffer_filled()
1311 list_del(&buf->list); in buffer_filled()
1312 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); in buffer_filled()
1317 struct cx231xx_dmaqueue *dma_q = urb->context; in cx231xx_isoc_copy()
1322 for (i = 0; i < urb->number_of_packets; i++) { in cx231xx_isoc_copy()
1323 if (dma_q->left_data_count > 0) { in cx231xx_isoc_copy()
1324 buffer_copy(dev, dma_q->p_left_data, in cx231xx_isoc_copy()
1325 dma_q->left_data_count, urb, dma_q); in cx231xx_isoc_copy()
1326 dma_q->mpeg_buffer_completed = dma_q->left_data_count; in cx231xx_isoc_copy()
1327 dma_q->left_data_count = 0; in cx231xx_isoc_copy()
1330 p_buffer = urb->transfer_buffer + in cx231xx_isoc_copy()
1331 urb->iso_frame_desc[i].offset; in cx231xx_isoc_copy()
1332 buffer_size = urb->iso_frame_desc[i].actual_length; in cx231xx_isoc_copy()
1343 struct cx231xx_dmaqueue *dma_q = urb->context; in cx231xx_bulk_copy()
1347 p_buffer = urb->transfer_buffer; in cx231xx_bulk_copy()
1348 buffer_size = urb->actual_length; in cx231xx_bulk_copy()
1352 return -ENOMEM; in cx231xx_bulk_copy()
1354 memcpy(buffer, dma_q->ps_head, 3); in cx231xx_bulk_copy()
1355 memcpy(buffer+3, p_buffer, buffer_size-3); in cx231xx_bulk_copy()
1356 memcpy(dma_q->ps_head, p_buffer+buffer_size-3, 3); in cx231xx_bulk_copy()
1369 struct cx231xx *dev = vb2_get_drv_priv(vb->vb2_queue); in buffer_queue()
1370 struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq; in buffer_queue()
1373 spin_lock_irqsave(&dev->video_mode.slock, flags); in buffer_queue()
1374 list_add_tail(&buf->list, &vidq->active); in buffer_queue()
1375 spin_unlock_irqrestore(&dev->video_mode.slock, flags); in buffer_queue()
1381 struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq; in return_all_buffers()
1385 spin_lock_irqsave(&dev->video_mode.slock, flags); in return_all_buffers()
1386 list_for_each_entry_safe(buf, node, &vidq->active, list) { in return_all_buffers()
1387 vb2_buffer_done(&buf->vb.vb2_buf, state); in return_all_buffers()
1388 list_del(&buf->list); in return_all_buffers()
1390 spin_unlock_irqrestore(&dev->video_mode.slock, flags); in return_all_buffers()
1396 struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq; in start_streaming()
1399 vidq->sequence = 0; in start_streaming()
1400 dev->mode_tv = 1; in start_streaming()
1411 if (dev->USE_ISO) in start_streaming()
1414 dev->ts1_mode.max_pkt_size, in start_streaming()
1418 dev->ts1_mode.max_pkt_size, in start_streaming()
1437 if (dev->USE_ISO) in stop_streaming()
1447 spin_lock_irqsave(&dev->video_mode.slock, flags); in stop_streaming()
1448 if (dev->USE_ISO) in stop_streaming()
1449 dev->video_mode.isoc_ctl.buf = NULL; in stop_streaming()
1451 dev->video_mode.bulk_ctl.buf = NULL; in stop_streaming()
1452 spin_unlock_irqrestore(&dev->video_mode.slock, flags); in stop_streaming()
1465 /* ------------------------------------------------------------------ */
1471 bool is_50hz = dev->encodernorm.id & V4L2_STD_625_50; in vidioc_g_pixelaspect()
1474 return -EINVAL; in vidioc_g_pixelaspect()
1476 f->numerator = is_50hz ? 54 : 11; in vidioc_g_pixelaspect()
1477 f->denominator = is_50hz ? 59 : 10; in vidioc_g_pixelaspect()
1487 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) in vidioc_g_selection()
1488 return -EINVAL; in vidioc_g_selection()
1490 switch (s->target) { in vidioc_g_selection()
1493 s->r.left = 0; in vidioc_g_selection()
1494 s->r.top = 0; in vidioc_g_selection()
1495 s->r.width = dev->ts1.width; in vidioc_g_selection()
1496 s->r.height = dev->ts1.height; in vidioc_g_selection()
1499 return -EINVAL; in vidioc_g_selection()
1508 *norm = dev->encodernorm.id; in vidioc_g_std()
1521 return -EINVAL; in vidioc_s_std()
1522 dev->encodernorm = cx231xx_tvnorms[i]; in vidioc_s_std()
1524 if (dev->encodernorm.id & 0xb000) { in vidioc_s_std()
1526 dev->norm = V4L2_STD_NTSC; in vidioc_s_std()
1527 dev->ts1.height = 480; in vidioc_s_std()
1528 cx2341x_handler_set_50hz(&dev->mpeg_ctrl_handler, false); in vidioc_s_std()
1531 dev->norm = V4L2_STD_PAL_B; in vidioc_s_std()
1532 dev->ts1.height = 576; in vidioc_s_std()
1533 cx2341x_handler_set_50hz(&dev->mpeg_ctrl_handler, true); in vidioc_s_std()
1535 call_all(dev, video, s_std, dev->norm); in vidioc_s_std()
1551 v4l2_device_for_each_subdev(sd, &dev->v4l2_dev) in vidioc_s_ctrl()
1552 v4l2_s_ctrl(NULL, sd->ctrl_handler, ctl); in vidioc_s_ctrl()
1560 if (f->index != 0) in vidioc_enum_fmt_vid_cap()
1561 return -EINVAL; in vidioc_enum_fmt_vid_cap()
1563 f->pixelformat = V4L2_PIX_FMT_MPEG; in vidioc_enum_fmt_vid_cap()
1574 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; in vidioc_g_fmt_vid_cap()
1575 f->fmt.pix.bytesperline = 0; in vidioc_g_fmt_vid_cap()
1576 f->fmt.pix.sizeimage = mpeglines * mpeglinesize; in vidioc_g_fmt_vid_cap()
1577 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; in vidioc_g_fmt_vid_cap()
1578 f->fmt.pix.width = dev->ts1.width; in vidioc_g_fmt_vid_cap()
1579 f->fmt.pix.height = dev->ts1.height; in vidioc_g_fmt_vid_cap()
1580 f->fmt.pix.field = V4L2_FIELD_INTERLACED; in vidioc_g_fmt_vid_cap()
1582 dev->ts1.width, dev->ts1.height); in vidioc_g_fmt_vid_cap()
1593 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; in vidioc_try_fmt_vid_cap()
1594 f->fmt.pix.bytesperline = 0; in vidioc_try_fmt_vid_cap()
1595 f->fmt.pix.sizeimage = mpeglines * mpeglinesize; in vidioc_try_fmt_vid_cap()
1596 f->fmt.pix.field = V4L2_FIELD_INTERLACED; in vidioc_try_fmt_vid_cap()
1597 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; in vidioc_try_fmt_vid_cap()
1599 dev->ts1.width, dev->ts1.height); in vidioc_try_fmt_vid_cap()
1659 .minor = -1,
1668 if (video_is_registered(&dev->v4l_device)) { in cx231xx_417_unregister()
1669 video_unregister_device(&dev->v4l_device); in cx231xx_417_unregister()
1670 v4l2_ctrl_handler_free(&dev->mpeg_ctrl_handler.hdl); in cx231xx_417_unregister()
1683 format.format.width = cxhdl->width / (is_mpeg1 ? 2 : 1); in cx231xx_s_video_encoding()
1684 format.format.height = cxhdl->height; in cx231xx_s_video_encoding()
1686 v4l2_subdev_call(dev->sd_cx25840, pad, set_fmt, NULL, &format); in cx231xx_s_video_encoding()
1718 snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", dev->name, in cx231xx_video_dev_init()
1719 type, cx231xx_boards[dev->model].name); in cx231xx_video_dev_init()
1721 vfd->v4l2_dev = &dev->v4l2_dev; in cx231xx_video_dev_init()
1722 vfd->lock = &dev->lock; in cx231xx_video_dev_init()
1723 vfd->release = video_device_release_empty; in cx231xx_video_dev_init()
1724 vfd->ctrl_handler = &dev->mpeg_ctrl_handler.hdl; in cx231xx_video_dev_init()
1726 if (dev->tuner_type == TUNER_ABSENT) { in cx231xx_video_dev_init()
1738 struct cx231xx_tsport *tsport = &dev->ts1; in cx231xx_417_register()
1744 dev->encodernorm = cx231xx_tvnorms[0]; in cx231xx_417_register()
1746 if (dev->encodernorm.id & V4L2_STD_525_60) in cx231xx_417_register()
1747 tsport->height = 480; in cx231xx_417_register()
1749 tsport->height = 576; in cx231xx_417_register()
1751 tsport->width = 720; in cx231xx_417_register()
1752 err = cx2341x_handler_init(&dev->mpeg_ctrl_handler, 50); in cx231xx_417_register()
1754 dprintk(3, "%s: can't init cx2341x controls\n", dev->name); in cx231xx_417_register()
1757 dev->mpeg_ctrl_handler.func = cx231xx_mbox_func; in cx231xx_417_register()
1758 dev->mpeg_ctrl_handler.priv = dev; in cx231xx_417_register()
1759 dev->mpeg_ctrl_handler.ops = &cx231xx_ops; in cx231xx_417_register()
1760 if (dev->sd_cx25840) in cx231xx_417_register()
1761 v4l2_ctrl_add_handler(&dev->mpeg_ctrl_handler.hdl, in cx231xx_417_register()
1762 dev->sd_cx25840->ctrl_handler, NULL, true); in cx231xx_417_register()
1763 if (dev->mpeg_ctrl_handler.hdl.error) { in cx231xx_417_register()
1764 err = dev->mpeg_ctrl_handler.hdl.error; in cx231xx_417_register()
1765 dprintk(3, "%s: can't add cx25840 controls\n", dev->name); in cx231xx_417_register()
1766 v4l2_ctrl_handler_free(&dev->mpeg_ctrl_handler.hdl); in cx231xx_417_register()
1769 dev->norm = V4L2_STD_NTSC; in cx231xx_417_register()
1771 dev->mpeg_ctrl_handler.port = CX2341X_PORT_SERIAL; in cx231xx_417_register()
1772 cx2341x_handler_set_50hz(&dev->mpeg_ctrl_handler, false); in cx231xx_417_register()
1775 cx231xx_video_dev_init(dev, dev->udev, in cx231xx_417_register()
1776 &dev->v4l_device, &cx231xx_mpeg_template, "mpeg"); in cx231xx_417_register()
1777 q = &dev->mpegq; in cx231xx_417_register()
1778 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; in cx231xx_417_register()
1779 q->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF | VB2_READ; in cx231xx_417_register()
1780 q->drv_priv = dev; in cx231xx_417_register()
1781 q->buf_struct_size = sizeof(struct cx231xx_buffer); in cx231xx_417_register()
1782 q->ops = &cx231xx_video_qops; in cx231xx_417_register()
1783 q->mem_ops = &vb2_vmalloc_memops; in cx231xx_417_register()
1784 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; in cx231xx_417_register()
1785 q->min_queued_buffers = 1; in cx231xx_417_register()
1786 q->lock = &dev->lock; in cx231xx_417_register()
1790 dev->v4l_device.queue = q; in cx231xx_417_register()
1792 err = video_register_device(&dev->v4l_device, in cx231xx_417_register()
1793 VFL_TYPE_VIDEO, -1); in cx231xx_417_register()
1795 dprintk(3, "%s: can't register mpeg device\n", dev->name); in cx231xx_417_register()
1796 v4l2_ctrl_handler_free(&dev->mpeg_ctrl_handler.hdl); in cx231xx_417_register()
1801 dev->name, dev->v4l_device.num); in cx231xx_417_register()