Lines Matching full:fe
299 static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value);
300 static u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value);
301 static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit,
303 static u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum,
306 static u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal);
307 static u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum,
309 static u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val);
310 static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum,
312 static u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq);
313 static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe);
314 static void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe);
315 static u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum,
317 static int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable,
319 static u16 MXL_IFSynthInit(struct dvb_frontend *fe);
320 static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type,
322 static int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type,
337 static int mxl5005s_SetRfFreqHz(struct dvb_frontend *fe, unsigned long RfFreqHz) in mxl5005s_SetRfFreqHz() argument
339 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_SetRfFreqHz()
356 mxl5005s_writeregs(fe, AddrTable, ByteTable, 1); in mxl5005s_SetRfFreqHz()
359 MXL_TuneRF(fe, RfFreqHz); in mxl5005s_SetRfFreqHz()
361 MXL_ControlRead(fe, IF_DIVVAL, &IfDivval); in mxl5005s_SetRfFreqHz()
363 MXL_ControlWrite(fe, SEQ_FSM_PULSE, 0); in mxl5005s_SetRfFreqHz()
364 MXL_ControlWrite(fe, SEQ_EXTPOWERUP, 1); in mxl5005s_SetRfFreqHz()
365 MXL_ControlWrite(fe, IF_DIVVAL, 8); in mxl5005s_SetRfFreqHz()
366 MXL_GetCHRegister(fe, AddrTable, ByteTable, &TableLen); in mxl5005s_SetRfFreqHz()
374 mxl5005s_writeregs(fe, AddrTable, ByteTable, TableLen); in mxl5005s_SetRfFreqHz()
380 MXL_ControlWrite(fe, SEQ_FSM_PULSE, 1); in mxl5005s_SetRfFreqHz()
381 MXL_ControlWrite(fe, IF_DIVVAL, IfDivval); in mxl5005s_SetRfFreqHz()
382 MXL_GetCHRegister_ZeroIF(fe, AddrTable, ByteTable, &TableLen); in mxl5005s_SetRfFreqHz()
390 mxl5005s_writeregs(fe, AddrTable, ByteTable, TableLen); in mxl5005s_SetRfFreqHz()
402 static u16 MXL5005_RegisterInit(struct dvb_frontend *fe) in MXL5005_RegisterInit() argument
404 struct mxl5005s_state *state = fe->tuner_priv; in MXL5005_RegisterInit()
722 static u16 MXL5005_ControlInit(struct dvb_frontend *fe) in MXL5005_ControlInit() argument
724 struct mxl5005s_state *state = fe->tuner_priv; in MXL5005_ControlInit()
1662 static void InitTunerControls(struct dvb_frontend *fe) in InitTunerControls() argument
1664 MXL5005_RegisterInit(fe); in InitTunerControls()
1665 MXL5005_ControlInit(fe); in InitTunerControls()
1667 MXL5005_MXLControlInit(fe); in InitTunerControls()
1671 static u16 MXL5005_TunerConfig(struct dvb_frontend *fe, in MXL5005_TunerConfig() argument
1694 struct mxl5005s_state *state = fe->tuner_priv; in MXL5005_TunerConfig()
1712 InitTunerControls(fe); in MXL5005_TunerConfig()
1715 MXL_SynthIFLO_Calc(fe); in MXL5005_TunerConfig()
1720 static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe) in MXL_SynthIFLO_Calc() argument
1722 struct mxl5005s_state *state = fe->tuner_priv; in MXL_SynthIFLO_Calc()
1733 static void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe) in MXL_SynthRFTGLO_Calc() argument
1735 struct mxl5005s_state *state = fe->tuner_priv; in MXL_SynthRFTGLO_Calc()
1754 static u16 MXL_OverwriteICDefault(struct dvb_frontend *fe) in MXL_OverwriteICDefault() argument
1758 status += MXL_ControlWrite(fe, OVERRIDE_1, 1); in MXL_OverwriteICDefault()
1759 status += MXL_ControlWrite(fe, OVERRIDE_2, 1); in MXL_OverwriteICDefault()
1760 status += MXL_ControlWrite(fe, OVERRIDE_3, 1); in MXL_OverwriteICDefault()
1761 status += MXL_ControlWrite(fe, OVERRIDE_4, 1); in MXL_OverwriteICDefault()
1766 static u16 MXL_BlockInit(struct dvb_frontend *fe) in MXL_BlockInit() argument
1768 struct mxl5005s_state *state = fe->tuner_priv; in MXL_BlockInit()
1771 status += MXL_OverwriteICDefault(fe); in MXL_BlockInit()
1774 status += MXL_ControlWrite(fe, DN_IQTN_AMP_CUT, state->Mode ? 1 : 0); in MXL_BlockInit()
1777 status += MXL_ControlWrite(fe, BB_MODE, state->Mode ? 0 : 1); in MXL_BlockInit()
1778 status += MXL_ControlWrite(fe, BB_BUF, state->Mode ? 3 : 2); in MXL_BlockInit()
1779 status += MXL_ControlWrite(fe, BB_BUF_OA, state->Mode ? 1 : 0); in MXL_BlockInit()
1780 status += MXL_ControlWrite(fe, BB_IQSWAP, state->Mode ? 0 : 1); in MXL_BlockInit()
1781 status += MXL_ControlWrite(fe, BB_INITSTATE_DLPF_TUNE, 0); in MXL_BlockInit()
1787 status += MXL_ControlWrite(fe, BB_DLPF_BANDSEL, 0); in MXL_BlockInit()
1790 status += MXL_ControlWrite(fe, BB_DLPF_BANDSEL, 2); in MXL_BlockInit()
1793 status += MXL_ControlWrite(fe, in MXL_BlockInit()
1800 status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT, in MXL_BlockInit()
1804 status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT, in MXL_BlockInit()
1808 status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT, in MXL_BlockInit()
1815 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, state->Mode ? 5 : 8); in MXL_BlockInit()
1816 status += MXL_ControlWrite(fe, in MXL_BlockInit()
1818 status += MXL_ControlWrite(fe, EN_CHP_LIN_B, state->Mode ? 0 : 0); in MXL_BlockInit()
1822 status += MXL_ControlWrite(fe, AGC_IF, 15); in MXL_BlockInit()
1823 status += MXL_ControlWrite(fe, AGC_RF, 15); in MXL_BlockInit()
1825 status += MXL_ControlWrite(fe, AGC_RF, state->Mode ? 15 : 12); in MXL_BlockInit()
1828 status += MXL_ControlWrite(fe, AGC_IF, 0x0); in MXL_BlockInit()
1831 status += MXL_ControlWrite(fe, AGC_IF, 0x1); in MXL_BlockInit()
1834 status += MXL_ControlWrite(fe, AGC_IF, 0x2); in MXL_BlockInit()
1837 status += MXL_ControlWrite(fe, AGC_IF, 0x3); in MXL_BlockInit()
1840 status += MXL_ControlWrite(fe, AGC_IF, 0x4); in MXL_BlockInit()
1843 status += MXL_ControlWrite(fe, AGC_IF, 0x5); in MXL_BlockInit()
1846 status += MXL_ControlWrite(fe, AGC_IF, 0x6); in MXL_BlockInit()
1849 status += MXL_ControlWrite(fe, AGC_IF, 0x7); in MXL_BlockInit()
1852 status += MXL_ControlWrite(fe, AGC_IF, 0x9); in MXL_BlockInit()
1855 status += MXL_ControlWrite(fe, AGC_IF, 0xA); in MXL_BlockInit()
1858 status += MXL_ControlWrite(fe, AGC_IF, 0xB); in MXL_BlockInit()
1861 status += MXL_ControlWrite(fe, AGC_IF, 0xC); in MXL_BlockInit()
1864 status += MXL_ControlWrite(fe, AGC_IF, 0xD); in MXL_BlockInit()
1867 status += MXL_ControlWrite(fe, AGC_IF, 0xE); in MXL_BlockInit()
1870 status += MXL_ControlWrite(fe, AGC_IF, 0xF); in MXL_BlockInit()
1873 status += MXL_IFSynthInit(fe); in MXL_BlockInit()
1877 status += MXL_ControlWrite(fe, DRV_RES_SEL, 6); in MXL_BlockInit()
1878 status += MXL_ControlWrite(fe, I_DRIVER, 2); in MXL_BlockInit()
1881 status += MXL_ControlWrite(fe, DRV_RES_SEL, 4); in MXL_BlockInit()
1882 status += MXL_ControlWrite(fe, I_DRIVER, 1); in MXL_BlockInit()
1890 status += MXL_ControlWrite(fe, EN_AAF, 1); in MXL_BlockInit()
1891 status += MXL_ControlWrite(fe, EN_3P, 1); in MXL_BlockInit()
1892 status += MXL_ControlWrite(fe, EN_AUX_3P, 1); in MXL_BlockInit()
1893 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0); in MXL_BlockInit()
1897 status += MXL_ControlWrite(fe, EN_AAF, 1); in MXL_BlockInit()
1898 status += MXL_ControlWrite(fe, EN_3P, 1); in MXL_BlockInit()
1899 status += MXL_ControlWrite(fe, EN_AUX_3P, 1); in MXL_BlockInit()
1900 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 1); in MXL_BlockInit()
1903 status += MXL_ControlWrite(fe, EN_AAF, 0); in MXL_BlockInit()
1904 status += MXL_ControlWrite(fe, EN_3P, 1); in MXL_BlockInit()
1905 status += MXL_ControlWrite(fe, EN_AUX_3P, 1); in MXL_BlockInit()
1906 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 1); in MXL_BlockInit()
1910 status += MXL_ControlWrite(fe, EN_AAF, 1); in MXL_BlockInit()
1911 status += MXL_ControlWrite(fe, EN_3P, 1); in MXL_BlockInit()
1912 status += MXL_ControlWrite(fe, EN_AUX_3P, 1); in MXL_BlockInit()
1913 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0); in MXL_BlockInit()
1916 status += MXL_ControlWrite(fe, EN_AAF, 0); in MXL_BlockInit()
1917 status += MXL_ControlWrite(fe, EN_3P, 0); in MXL_BlockInit()
1918 status += MXL_ControlWrite(fe, EN_AUX_3P, 0); in MXL_BlockInit()
1919 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0); in MXL_BlockInit()
1925 status += MXL_ControlWrite(fe, SEQ_ENCLK16_CLK_OUT, 1); in MXL_BlockInit()
1927 status += MXL_ControlWrite(fe, SEQ_ENCLK16_CLK_OUT, 0); in MXL_BlockInit()
1930 status += MXL_ControlWrite(fe, SEQ_SEL4_16B, 1); in MXL_BlockInit()
1932 status += MXL_ControlWrite(fe, SEQ_SEL4_16B, 0); in MXL_BlockInit()
1936 status += MXL_ControlWrite(fe, XTAL_CAPSELECT, 1); in MXL_BlockInit()
1938 status += MXL_ControlWrite(fe, XTAL_CAPSELECT, 0); in MXL_BlockInit()
1941 status += MXL_ControlWrite(fe, IF_SEL_DBL, 1); in MXL_BlockInit()
1943 status += MXL_ControlWrite(fe, IF_SEL_DBL, 0); in MXL_BlockInit()
1946 status += MXL_ControlWrite(fe, RFSYN_R_DIV, 3); in MXL_BlockInit()
1948 status += MXL_ControlWrite(fe, RFSYN_R_DIV, 0); in MXL_BlockInit()
1952 status += MXL_ControlWrite(fe, SEQ_EXTIQFSMPULSE, 0); in MXL_BlockInit()
1954 status += MXL_ControlWrite(fe, SEQ_EXTIQFSMPULSE, 1); in MXL_BlockInit()
1956 /* status += MXL_ControlRead(fe, IF_DIVVAL, &IF_DIVVAL_Val); */ in MXL_BlockInit()
1959 status += MXL_ControlWrite(fe, TG_R_DIV, in MXL_BlockInit()
1966 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
1967 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
1968 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1); in MXL_BlockInit()
1969 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
1972 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 2); in MXL_BlockInit()
1973 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 3); in MXL_BlockInit()
1974 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1); in MXL_BlockInit()
1977 status += MXL_ControlWrite(fe, RFA_FLR, 0); in MXL_BlockInit()
1978 status += MXL_ControlWrite(fe, RFA_CEIL, 12); in MXL_BlockInit()
1988 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
1989 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
1990 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1); in MXL_BlockInit()
1991 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
1994 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3); in MXL_BlockInit()
1995 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5); in MXL_BlockInit()
1996 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1); in MXL_BlockInit()
1999 status += MXL_ControlWrite(fe, RFA_FLR, 2); in MXL_BlockInit()
2000 status += MXL_ControlWrite(fe, RFA_CEIL, 13); in MXL_BlockInit()
2002 status += MXL_ControlWrite(fe, BB_IQSWAP, 0); in MXL_BlockInit()
2004 status += MXL_ControlWrite(fe, BB_IQSWAP, 1); in MXL_BlockInit()
2011 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
2012 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
2013 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1); in MXL_BlockInit()
2014 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
2017 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 2); in MXL_BlockInit()
2018 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 4); in MXL_BlockInit()
2019 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1); in MXL_BlockInit()
2022 status += MXL_ControlWrite(fe, RFA_FLR, 2); in MXL_BlockInit()
2023 status += MXL_ControlWrite(fe, RFA_CEIL, 13); in MXL_BlockInit()
2024 status += MXL_ControlWrite(fe, BB_INITSTATE_DLPF_TUNE, 1); in MXL_BlockInit()
2026 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 5); in MXL_BlockInit()
2029 status += MXL_ControlWrite(fe, BB_IQSWAP, 0); in MXL_BlockInit()
2031 status += MXL_ControlWrite(fe, BB_IQSWAP, 1); in MXL_BlockInit()
2039 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
2040 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
2041 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0); in MXL_BlockInit()
2042 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
2045 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5); in MXL_BlockInit()
2046 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3); in MXL_BlockInit()
2047 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2); in MXL_BlockInit()
2049 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3); in MXL_BlockInit()
2052 status += MXL_ControlWrite(fe, BB_IQSWAP, 0); in MXL_BlockInit()
2054 status += MXL_ControlWrite(fe, BB_IQSWAP, 1); in MXL_BlockInit()
2055 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 2); in MXL_BlockInit()
2065 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
2066 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
2067 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0); in MXL_BlockInit()
2068 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
2070 status += MXL_ControlWrite(fe, AGC_IF, 1); in MXL_BlockInit()
2071 status += MXL_ControlWrite(fe, AGC_RF, 15); in MXL_BlockInit()
2072 status += MXL_ControlWrite(fe, BB_IQSWAP, 1); in MXL_BlockInit()
2080 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
2081 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
2082 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1); in MXL_BlockInit()
2083 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
2086 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5); in MXL_BlockInit()
2087 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3); in MXL_BlockInit()
2088 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2); in MXL_BlockInit()
2089 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3); in MXL_BlockInit()
2090 status += MXL_ControlWrite(fe, BB_IQSWAP, 1); in MXL_BlockInit()
2095 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_BlockInit()
2096 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_BlockInit()
2097 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0); in MXL_BlockInit()
2098 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_BlockInit()
2104 static u16 MXL_IFSynthInit(struct dvb_frontend *fe) in MXL_IFSynthInit() argument
2106 struct mxl5005s_state *state = fe->tuner_priv; in MXL_IFSynthInit()
2121 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2122 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2126 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2127 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2131 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10); in MXL_IFSynthInit()
2132 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2136 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10); in MXL_IFSynthInit()
2137 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2141 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2142 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2146 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2147 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2151 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2152 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2156 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2157 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2164 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10); in MXL_IFSynthInit()
2165 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2169 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2170 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2174 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2175 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2179 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2180 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2184 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2185 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2189 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2190 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2194 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2195 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2199 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2200 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2204 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07); in MXL_IFSynthInit()
2205 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2209 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09); in MXL_IFSynthInit()
2210 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2214 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06); in MXL_IFSynthInit()
2215 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2219 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06); in MXL_IFSynthInit()
2220 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2224 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x05); in MXL_IFSynthInit()
2225 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2229 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10); in MXL_IFSynthInit()
2230 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2234 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2235 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2239 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08); in MXL_IFSynthInit()
2240 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2244 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2245 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2249 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2250 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2254 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04); in MXL_IFSynthInit()
2255 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2259 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07); in MXL_IFSynthInit()
2260 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2264 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07); in MXL_IFSynthInit()
2265 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2269 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07); in MXL_IFSynthInit()
2270 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C); in MXL_IFSynthInit()
2274 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09); in MXL_IFSynthInit()
2275 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2279 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09); in MXL_IFSynthInit()
2280 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2284 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06); in MXL_IFSynthInit()
2285 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2289 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x05); in MXL_IFSynthInit()
2290 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08); in MXL_IFSynthInit()
2297 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_IF, intModVal); in MXL_IFSynthInit()
2303 status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_IF, fracModVal); in MXL_IFSynthInit()
2308 static u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq) in MXL_TuneRF() argument
2310 struct mxl5005s_state *state = fe->tuner_priv; in MXL_TuneRF()
2323 MXL_SynthRFTGLO_Calc(fe); in MXL_TuneRF()
2343 status += MXL_ControlWrite(fe, DN_POLY, 2); in MXL_TuneRF()
2344 status += MXL_ControlWrite(fe, DN_RFGAIN, 3); in MXL_TuneRF()
2345 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 423); in MXL_TuneRF()
2346 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1); in MXL_TuneRF()
2347 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 1); in MXL_TuneRF()
2350 status += MXL_ControlWrite(fe, DN_POLY, 3); in MXL_TuneRF()
2351 status += MXL_ControlWrite(fe, DN_RFGAIN, 3); in MXL_TuneRF()
2352 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 222); in MXL_TuneRF()
2353 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1); in MXL_TuneRF()
2354 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 1); in MXL_TuneRF()
2357 status += MXL_ControlWrite(fe, DN_POLY, 3); in MXL_TuneRF()
2358 status += MXL_ControlWrite(fe, DN_RFGAIN, 3); in MXL_TuneRF()
2359 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 147); in MXL_TuneRF()
2360 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1); in MXL_TuneRF()
2361 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 2); in MXL_TuneRF()
2364 status += MXL_ControlWrite(fe, DN_POLY, 3); in MXL_TuneRF()
2365 status += MXL_ControlWrite(fe, DN_RFGAIN, 3); in MXL_TuneRF()
2366 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 9); in MXL_TuneRF()
2367 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1); in MXL_TuneRF()
2368 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 2); in MXL_TuneRF()
2371 status += MXL_ControlWrite(fe, DN_POLY, 3); in MXL_TuneRF()
2372 status += MXL_ControlWrite(fe, DN_RFGAIN, 3); in MXL_TuneRF()
2373 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0); in MXL_TuneRF()
2374 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1); in MXL_TuneRF()
2375 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3); in MXL_TuneRF()
2378 status += MXL_ControlWrite(fe, DN_POLY, 3); in MXL_TuneRF()
2379 status += MXL_ControlWrite(fe, DN_RFGAIN, 1); in MXL_TuneRF()
2380 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0); in MXL_TuneRF()
2381 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 0); in MXL_TuneRF()
2382 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3); in MXL_TuneRF()
2385 status += MXL_ControlWrite(fe, DN_POLY, 3); in MXL_TuneRF()
2386 status += MXL_ControlWrite(fe, DN_RFGAIN, 2); in MXL_TuneRF()
2387 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0); in MXL_TuneRF()
2388 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 0); in MXL_TuneRF()
2389 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3); in MXL_TuneRF()
2397 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2398 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2401 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2402 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2405 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2406 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2409 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2410 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2413 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2414 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2417 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2418 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2421 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2422 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2425 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2426 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2429 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2430 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2433 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2434 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2437 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2438 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2441 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2442 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2445 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2446 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2449 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1); in MXL_TuneRF()
2450 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0); in MXL_TuneRF()
2453 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 10); in MXL_TuneRF()
2454 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 1); in MXL_TuneRF()
2457 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 10); in MXL_TuneRF()
2458 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 1); in MXL_TuneRF()
2477 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1); in MXL_TuneRF()
2478 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0); in MXL_TuneRF()
2479 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_TuneRF()
2480 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2481 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2482 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1); in MXL_TuneRF()
2490 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1); in MXL_TuneRF()
2491 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0); in MXL_TuneRF()
2492 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_TuneRF()
2493 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2494 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2495 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1); in MXL_TuneRF()
2503 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2504 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2505 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_TuneRF()
2506 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2507 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2508 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1); in MXL_TuneRF()
2516 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2517 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2518 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_TuneRF()
2519 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2520 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2521 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1); in MXL_TuneRF()
2529 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2530 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2531 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_TuneRF()
2532 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2533 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2534 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 2); in MXL_TuneRF()
2542 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2543 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2544 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_TuneRF()
2545 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2546 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2547 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 2); in MXL_TuneRF()
2555 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2556 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2557 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_TuneRF()
2558 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2559 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2560 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 4); in MXL_TuneRF()
2568 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1); in MXL_TuneRF()
2569 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0); in MXL_TuneRF()
2570 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_TuneRF()
2571 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2572 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2573 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_TuneRF()
2581 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1); in MXL_TuneRF()
2582 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0); in MXL_TuneRF()
2583 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_TuneRF()
2584 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_TuneRF()
2585 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 2); in MXL_TuneRF()
2586 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_TuneRF()
2594 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2595 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2596 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_TuneRF()
2597 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 1); in MXL_TuneRF()
2598 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2599 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_TuneRF()
2607 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_TuneRF()
2608 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_TuneRF()
2609 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_TuneRF()
2610 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 1); in MXL_TuneRF()
2611 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_TuneRF()
2612 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_TuneRF()
2625 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, E3); in MXL_TuneRF()
2629 MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, E4); in MXL_TuneRF()
2636 status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_RF, E5); in MXL_TuneRF()
2640 status += MXL_ControlWrite(fe, RFSYN_LPF_R, E5A); in MXL_TuneRF()
2643 status += MXL_ControlWrite(fe, CHCAL_EN_INT_RF, ((E5 == 0) ? 1 : 0)); in MXL_TuneRF()
2645 * status += MXL_ControlWrite(fe, CHCAL_EN_INT_RF, 1); in MXL_TuneRF()
2647 * status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_RF, E5); in MXL_TuneRF()
2665 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x6); in MXL_TuneRF()
2666 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x0); in MXL_TuneRF()
2674 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x1); in MXL_TuneRF()
2675 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x0); in MXL_TuneRF()
2683 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0xC); in MXL_TuneRF()
2684 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2); in MXL_TuneRF()
2692 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8); in MXL_TuneRF()
2693 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2); in MXL_TuneRF()
2701 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0); in MXL_TuneRF()
2702 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2); in MXL_TuneRF()
2710 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8); in MXL_TuneRF()
2711 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x3); in MXL_TuneRF()
2719 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0); in MXL_TuneRF()
2720 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x3); in MXL_TuneRF()
2728 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8); in MXL_TuneRF()
2729 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x7); in MXL_TuneRF()
2737 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0); in MXL_TuneRF()
2738 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x7); in MXL_TuneRF()
2747 status += MXL_ControlWrite(fe, TG_DIV_VAL, tg_divval); in MXL_TuneRF()
2750 status += MXL_ControlWrite(fe, TG_DIV_VAL, tg_divval + 1); in MXL_TuneRF()
2783 status += MXL_ControlWrite(fe, TG_VCO_BIAS , tg_lo); in MXL_TuneRF()
2788 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, in MXL_TuneRF()
2791 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3); in MXL_TuneRF()
2793 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 2); in MXL_TuneRF()
2799 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2800 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
2801 status += MXL_SetGPIO(fe, 3, 1); /* Bank1 Off */ in MXL_TuneRF()
2802 status += MXL_SetGPIO(fe, 1, 1); /* Bank2 Off */ in MXL_TuneRF()
2803 status += MXL_SetGPIO(fe, 4, 1); /* Bank3 Off */ in MXL_TuneRF()
2807 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
2808 status += MXL_ControlWrite(fe, DAC_DIN_A, 0); in MXL_TuneRF()
2811 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2812 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2813 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
2814 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2815 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2818 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2819 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2820 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2821 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2822 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2825 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2826 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2827 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2828 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2829 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2832 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2833 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2834 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2835 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2836 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2839 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2840 status += MXL_ControlWrite(fe, DAC_DIN_B, 29); in MXL_TuneRF()
2841 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2842 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2843 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2846 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2847 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2848 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2849 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2850 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2853 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2854 status += MXL_ControlWrite(fe, DAC_DIN_B, 16); in MXL_TuneRF()
2855 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2856 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2857 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2860 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2861 status += MXL_ControlWrite(fe, DAC_DIN_B, 7); in MXL_TuneRF()
2862 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2863 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2864 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2867 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2868 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2869 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2870 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2871 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2878 status += MXL_ControlWrite(fe, DAC_DIN_A, 0); in MXL_TuneRF()
2881 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2882 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2883 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2884 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2887 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2888 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2889 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
2890 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2893 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2894 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2895 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
2896 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2899 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2900 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2901 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2902 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2905 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2906 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2907 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2908 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2911 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2912 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2913 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2914 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2917 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2918 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2919 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2920 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2923 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2924 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2925 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2926 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2929 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
2930 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2931 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2932 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2938 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
2941 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
2942 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2943 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2944 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2947 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
2948 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
2949 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2950 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2953 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
2954 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2955 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2956 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2959 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
2960 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2961 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
2962 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
2965 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
2966 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2967 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2968 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
2971 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
2972 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2973 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2974 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
2977 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
2978 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2979 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2980 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2987 status += MXL_ControlWrite(fe, DAC_DIN_A, 0); in MXL_TuneRF()
2993 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
2994 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
2995 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
2996 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
2997 status += MXL_ControlWrite(fe, AGC_IF, 10); in MXL_TuneRF()
3003 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
3004 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3005 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3006 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3010 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
3011 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3012 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3013 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3017 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
3018 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3019 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3020 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3024 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
3025 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3026 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3027 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3031 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
3032 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3033 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3034 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3038 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
3039 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3040 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3041 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3045 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0); in MXL_TuneRF()
3046 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3047 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3048 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3052 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
3053 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3054 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3055 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3059 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1); in MXL_TuneRF()
3060 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3061 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3062 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3069 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
3072 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3073 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3074 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3075 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3078 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3079 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3080 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3081 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3084 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3085 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3086 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3087 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3090 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3091 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3092 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3093 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3096 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3097 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3098 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3099 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3102 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3103 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3104 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3105 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3108 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3109 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3110 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3111 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3118 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
3121 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3122 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3123 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3124 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3127 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3128 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3129 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3130 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3133 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3134 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3135 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3136 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3139 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3140 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3141 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3142 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3145 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3146 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3147 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3148 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3151 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3152 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3153 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3154 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3157 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3158 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3159 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3160 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3167 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
3170 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3171 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3172 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3173 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3176 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3177 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3178 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3179 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3182 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3183 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3184 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3185 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3188 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3189 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3190 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3191 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3194 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3195 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3196 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3197 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3200 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3201 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3202 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3203 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3206 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3207 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3208 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3209 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3216 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
3220 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3221 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3222 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3223 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3226 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3227 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3228 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3229 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3232 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3233 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3234 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3235 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3238 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3239 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3240 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3241 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3244 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3245 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3246 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3247 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3250 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3251 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3252 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3253 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3256 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3257 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3258 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3259 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3262 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3263 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3264 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3265 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3272 status += MXL_ControlWrite(fe, DAC_DIN_B, 0); in MXL_TuneRF()
3279 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3280 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3281 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3282 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3285 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1); in MXL_TuneRF()
3286 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1); in MXL_TuneRF()
3287 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1); in MXL_TuneRF()
3288 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1); in MXL_TuneRF()
3291 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5); in MXL_TuneRF()
3292 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3); in MXL_TuneRF()
3293 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2); in MXL_TuneRF()
3297 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3); in MXL_TuneRF()
3302 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0); in MXL_TuneRF()
3305 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 5); in MXL_TuneRF()
3310 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3311 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3312 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3313 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3316 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3317 status += MXL_SetGPIO(fe, 4, 0); in MXL_TuneRF()
3318 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3319 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3322 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3323 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3324 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3325 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3328 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3329 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3330 status += MXL_SetGPIO(fe, 1, 0); in MXL_TuneRF()
3331 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3334 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0); in MXL_TuneRF()
3335 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3336 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3337 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3340 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3341 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3342 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3343 status += MXL_SetGPIO(fe, 3, 0); in MXL_TuneRF()
3346 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1); in MXL_TuneRF()
3347 status += MXL_SetGPIO(fe, 4, 1); in MXL_TuneRF()
3348 status += MXL_SetGPIO(fe, 1, 1); in MXL_TuneRF()
3349 status += MXL_SetGPIO(fe, 3, 1); in MXL_TuneRF()
3356 static u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val) in MXL_SetGPIO() argument
3361 status += MXL_ControlWrite(fe, GPIO_1B, GPIO_Val ? 0 : 1); in MXL_SetGPIO()
3367 status += MXL_ControlWrite(fe, GPIO_3, 0); in MXL_SetGPIO()
3368 status += MXL_ControlWrite(fe, GPIO_3B, 0); in MXL_SetGPIO()
3371 status += MXL_ControlWrite(fe, GPIO_3, 1); in MXL_SetGPIO()
3372 status += MXL_ControlWrite(fe, GPIO_3B, 1); in MXL_SetGPIO()
3375 status += MXL_ControlWrite(fe, GPIO_3, 0); in MXL_SetGPIO()
3376 status += MXL_ControlWrite(fe, GPIO_3B, 1); in MXL_SetGPIO()
3381 status += MXL_ControlWrite(fe, GPIO_4, 0); in MXL_SetGPIO()
3382 status += MXL_ControlWrite(fe, GPIO_4B, 0); in MXL_SetGPIO()
3385 status += MXL_ControlWrite(fe, GPIO_4, 1); in MXL_SetGPIO()
3386 status += MXL_ControlWrite(fe, GPIO_4B, 1); in MXL_SetGPIO()
3389 status += MXL_ControlWrite(fe, GPIO_4, 0); in MXL_SetGPIO()
3390 status += MXL_ControlWrite(fe, GPIO_4B, 1); in MXL_SetGPIO()
3397 static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value) in MXL_ControlWrite() argument
3403 status += MXL_ControlWrite_Group(fe, ControlNum, value, 1); in MXL_ControlWrite()
3405 status += MXL_ControlWrite_Group(fe, ControlNum, value, 2); in MXL_ControlWrite()
3408 status += MXL_ControlWrite_Group(fe, ControlNum, value, 3); in MXL_ControlWrite()
3413 static u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum, in MXL_ControlWrite_Group() argument
3416 struct mxl5005s_state *state = fe->tuner_priv; in MXL_ControlWrite_Group()
3432 MXL_RegWriteBit(fe, (u8)(state->Init_Ctrl[i].addr[j]), in MXL_ControlWrite_Group()
3453 MXL_RegWriteBit(fe, (u8)(state->CH_Ctrl[i].addr[j]), in MXL_ControlWrite_Group()
3473 MXL_RegWriteBit(fe, (u8)(state->MXL_Ctrl[i].addr[j]), in MXL_ControlWrite_Group()
3486 static u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal) in MXL_RegRead() argument
3488 struct mxl5005s_state *state = fe->tuner_priv; in MXL_RegRead()
3501 static u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value) in MXL_ControlRead() argument
3503 struct mxl5005s_state *state = fe->tuner_priv; in MXL_ControlRead()
3549 static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit, in MXL_RegWriteBit() argument
3552 struct mxl5005s_state *state = fe->tuner_priv; in MXL_RegWriteBit()
3580 static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, in MXL_GetInitRegister() argument
3594 status += MXL_BlockInit(fe); in MXL_GetInitRegister()
3598 status += MXL_RegRead(fe, RegNum[i], &RegVal[i]); in MXL_GetInitRegister()
3604 static u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, in MXL_GetCHRegister() argument
3632 status += MXL_RegRead(fe, RegNum[i], &RegVal[i]); in MXL_GetCHRegister()
3638 static u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum, in MXL_GetCHRegister_ZeroIF() argument
3650 status += MXL_RegRead(fe, RegNum[i], &RegVal[i]); in MXL_GetCHRegister_ZeroIF()
3671 static u16 MXL_VCORange_Test(struct dvb_frontend *fe, int VCO_Range) in MXL_VCORange_Test() argument
3673 struct mxl5005s_state *state = fe->tuner_priv; in MXL_VCORange_Test()
3677 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1); in MXL_VCORange_Test()
3678 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_VCORange_Test()
3679 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_VCORange_Test()
3680 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1); in MXL_VCORange_Test()
3681 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_VCORange_Test()
3682 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_VCORange_Test()
3683 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_VCORange_Test()
3686 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3687 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3688 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56); in MXL_VCORange_Test()
3689 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3694 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3695 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3696 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56); in MXL_VCORange_Test()
3697 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3701 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3702 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3703 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56); in MXL_VCORange_Test()
3704 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3710 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1); in MXL_VCORange_Test()
3711 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_VCORange_Test()
3712 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_VCORange_Test()
3713 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1); in MXL_VCORange_Test()
3714 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_VCORange_Test()
3715 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_VCORange_Test()
3716 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_VCORange_Test()
3717 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3718 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3719 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 41); in MXL_VCORange_Test()
3722 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3723 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3724 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42); in MXL_VCORange_Test()
3725 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3730 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3731 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3732 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42); in MXL_VCORange_Test()
3733 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3737 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1); in MXL_VCORange_Test()
3738 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3739 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 41); in MXL_VCORange_Test()
3740 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3746 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1); in MXL_VCORange_Test()
3747 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_VCORange_Test()
3748 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_VCORange_Test()
3749 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1); in MXL_VCORange_Test()
3750 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_VCORange_Test()
3751 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_VCORange_Test()
3752 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_VCORange_Test()
3753 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3754 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3755 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42); in MXL_VCORange_Test()
3758 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3759 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3760 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 44); in MXL_VCORange_Test()
3761 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3766 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3767 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3768 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 44); in MXL_VCORange_Test()
3769 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3773 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3774 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8); in MXL_VCORange_Test()
3775 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42); in MXL_VCORange_Test()
3776 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3782 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1); in MXL_VCORange_Test()
3783 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0); in MXL_VCORange_Test()
3784 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0); in MXL_VCORange_Test()
3785 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1); in MXL_VCORange_Test()
3786 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1); in MXL_VCORange_Test()
3787 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1); in MXL_VCORange_Test()
3788 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0); in MXL_VCORange_Test()
3789 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3790 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3791 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27); in MXL_VCORange_Test()
3794 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3795 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3796 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27); in MXL_VCORange_Test()
3797 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3802 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3803 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3804 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27); in MXL_VCORange_Test()
3805 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3809 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0); in MXL_VCORange_Test()
3810 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40); in MXL_VCORange_Test()
3811 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27); in MXL_VCORange_Test()
3812 status += MXL_ControlWrite(fe, in MXL_VCORange_Test()
3820 static u16 MXL_Hystersis_Test(struct dvb_frontend *fe, int Hystersis) in MXL_Hystersis_Test() argument
3822 struct mxl5005s_state *state = fe->tuner_priv; in MXL_Hystersis_Test()
3826 status += MXL_ControlWrite(fe, DN_BYPASS_AGC_I2C, 1); in MXL_Hystersis_Test()
3839 static int mxl5005s_reset(struct dvb_frontend *fe) in mxl5005s_reset() argument
3841 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_reset()
3850 if (fe->ops.i2c_gate_ctrl) in mxl5005s_reset()
3851 fe->ops.i2c_gate_ctrl(fe, 1); in mxl5005s_reset()
3858 if (fe->ops.i2c_gate_ctrl) in mxl5005s_reset()
3859 fe->ops.i2c_gate_ctrl(fe, 0); in mxl5005s_reset()
3867 static int mxl5005s_writereg(struct dvb_frontend *fe, u8 reg, u8 val, int latch) in mxl5005s_writereg() argument
3869 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_writereg()
3886 static int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable, in mxl5005s_writeregs() argument
3891 if (fe->ops.i2c_gate_ctrl) in mxl5005s_writeregs()
3892 fe->ops.i2c_gate_ctrl(fe, 1); in mxl5005s_writeregs()
3895 ret = mxl5005s_writereg(fe, addrtable[i], datatable[i], 0); in mxl5005s_writeregs()
3900 ret = mxl5005s_writereg(fe, addrtable[i], datatable[i], 1); in mxl5005s_writeregs()
3902 if (fe->ops.i2c_gate_ctrl) in mxl5005s_writeregs()
3903 fe->ops.i2c_gate_ctrl(fe, 0); in mxl5005s_writeregs()
3908 static int mxl5005s_init(struct dvb_frontend *fe) in mxl5005s_init() argument
3910 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_init()
3914 return mxl5005s_reconfigure(fe, MXL_QAM, MXL5005S_BANDWIDTH_6MHZ); in mxl5005s_init()
3917 static int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, in mxl5005s_reconfigure() argument
3920 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_reconfigure()
3927 mxl5005s_reset(fe); in mxl5005s_reconfigure()
3946 mxl5005s_writeregs(fe, AddrTable, ByteTable, 1); in mxl5005s_reconfigure()
3948 mxl5005s_AssignTunerMode(fe, mod_type, bandwidth); in mxl5005s_reconfigure()
3951 MXL_GetInitRegister(fe, AddrTable, ByteTable, &TableLen); in mxl5005s_reconfigure()
3953 mxl5005s_writeregs(fe, AddrTable, ByteTable, TableLen); in mxl5005s_reconfigure()
3961 static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type, in mxl5005s_AssignTunerMode() argument
3964 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_AssignTunerMode()
3967 InitTunerControls(fe); in mxl5005s_AssignTunerMode()
3971 fe, in mxl5005s_AssignTunerMode()
3990 static int mxl5005s_set_params(struct dvb_frontend *fe) in mxl5005s_set_params() argument
3992 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_set_params()
3993 struct dtv_frontend_properties *c = &fe->dtv_property_cache; in mxl5005s_set_params()
4032 ret = mxl5005s_reconfigure(fe, req_mode, req_bw); in mxl5005s_set_params()
4039 ret = mxl5005s_SetRfFreqHz(fe, c->frequency); in mxl5005s_set_params()
4045 static int mxl5005s_get_frequency(struct dvb_frontend *fe, u32 *frequency) in mxl5005s_get_frequency() argument
4047 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_get_frequency()
4055 static int mxl5005s_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) in mxl5005s_get_bandwidth() argument
4057 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_get_bandwidth()
4065 static int mxl5005s_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) in mxl5005s_get_if_frequency() argument
4067 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_get_if_frequency()
4075 static void mxl5005s_release(struct dvb_frontend *fe) in mxl5005s_release() argument
4078 kfree(fe->tuner_priv); in mxl5005s_release()
4079 fe->tuner_priv = NULL; in mxl5005s_release()
4099 struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe, in mxl5005s_attach() argument
4110 state->frontend = fe; in mxl5005s_attach()
4117 memcpy(&fe->ops.tuner_ops, &mxl5005s_tuner_ops, in mxl5005s_attach()
4120 fe->tuner_priv = state; in mxl5005s_attach()
4121 return fe; in mxl5005s_attach()