media/rc/ite-cir.h

178 #define IT87_RCR	0x02	/* receiver control register */
182 #define IT87_RSR	0x06	/* receiver status register */
191 #define IT87_RDAIE	0x02	/* receiver data available interrupt enable */
192 #define IT87_RFOIE	0x04	/* receiver FIFO overrun interrupt enable */
198 #define IT87_RXDCR	0x07	/* receiver demodulation carrier range mask */
199 #define IT87_RXACT	0x08	/* receiver active */
200 #define IT87_RXEND	0x10	/* receiver demodulation enable */
201 #define IT87_RXEN	0x20	/* receiver enable */
203 #define IT87_RDWOS	0x80	/* receiver data without sync */
227 #define IT87_RXFBC	0x3f	/* receiver FIFO byte count mask */
228 #define IT87_RXFTO	0x80	/* receiver FIFO time-out */
235 #define IT87_II_RXDS	0x04	/* receiver data stored */
236 #define IT87_II_RXFO	0x06	/* receiver FIFO overrun */
262 #define IT85_C0RCR	0x05	/* receiver control register */
268 #define IT85_C0RFSR	0x0b	/* receiver FIFO status register */
293 #define IT85_RDAI	0x02	/* receiver data available interrupt */
294 #define IT85_RFOI	0x04	/* receiver FIFO overrun interrupt */
302 #define IT85_RXDCR	0x07	/* receiver demodulation carrier range mask */
303 #define IT85_RXACT	0x08	/* receiver active */
304 #define IT85_RXEND	0x10	/* receiver demodulation enable */
305 #define IT85_RDWOS	0x20	/* receiver data without sync */
306 #define IT85_RXEN	0x80	/* receiver enable */
328 #define IT85_RXFBC	0x3f	/* receiver FIFO count mask */
329 #define IT85_RXFTO	0x80	/* receiver FIFO time-out */
368 #define IT8708_C0RFSR	0x04	/* receiver FIFO status register */
369 #define IT8708_C0RCR	0x05	/* receiver control register */
434 #define IT8709_RFSR	0x1f	/* receiver FIFO status register */