platform/verisilicon/rockchip_vpu_hw.c

1 // SPDX-License-Identifier: GPL-2.0
6  *	Jeffy Chen <jeffy.chen@rock-chips.com>
431 	clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ);  in rk3036_vpu_hw_init()
438 	clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ);  in rk3066_vpu_hw_init()
439 	clk_set_rate(vpu->clocks[2].clk, RK3066_ACLK_MAX_FREQ);  in rk3066_vpu_hw_init()
446 	clk_set_rate(vpu->clocks[0].clk, RK3588_ACLK_MAX_FREQ);  in rk3588_vpu981_hw_init()
453 	clk_set_rate(vpu->clocks[0].clk, RK3288_ACLK_MAX_FREQ);  in rockchip_vpu_hw_init()
459 	struct hantro_dev *vpu = ctx->dev;  in rk3066_vpu_dec_reset()
467 	struct hantro_dev *vpu = ctx->dev;  in rockchip_vpu1_enc_reset()
476 	struct hantro_dev *vpu = ctx->dev;  in rockchip_vpu2_dec_reset()
485 	struct hantro_dev *vpu = ctx->dev;  in rockchip_vpu2_enc_reset()
734  * H.264 decoding explicitly disabled in RK3399.
735  * This ensures userspace applications use the Rockchip VDEC core,