Lines Matching +full:0 +full:x01ffffff
13 #define CFG_SC0 0x0
14 #define CFG_INTERLACE_O (1 << 0)
30 #define CFG_SC1 0x4
31 #define CFG_ROW_ACC_INC_MASK 0x07ffffff
32 #define CFG_ROW_ACC_INC_SHIFT 0
34 #define CFG_SC2 0x08
35 #define CFG_ROW_ACC_OFFSET_MASK 0x0fffffff
36 #define CFG_ROW_ACC_OFFSET_SHIFT 0
38 #define CFG_SC3 0x0c
39 #define CFG_ROW_ACC_OFFSET_B_MASK 0x0fffffff
40 #define CFG_ROW_ACC_OFFSET_B_SHIFT 0
42 #define CFG_SC4 0x10
43 #define CFG_TAR_H_MASK 0x07ff
44 #define CFG_TAR_H_SHIFT 0
45 #define CFG_TAR_W_MASK 0x07ff
47 #define CFG_LIN_ACC_INC_U_MASK 0x07
49 #define CFG_NLIN_ACC_INIT_U_MASK 0x07
52 #define CFG_SC5 0x14
53 #define CFG_SRC_H_MASK 0x07ff
54 #define CFG_SRC_H_SHIFT 0
55 #define CFG_SRC_W_MASK 0x07ff
57 #define CFG_NLIN_ACC_INC_U_MASK 0x07
60 #define CFG_SC6 0x18
61 #define CFG_ROW_ACC_INIT_RAV_MASK 0x03ff
62 #define CFG_ROW_ACC_INIT_RAV_SHIFT 0
63 #define CFG_ROW_ACC_INIT_RAV_B_MASK 0x03ff
66 #define CFG_SC8 0x20
67 #define CFG_NLIN_LEFT_MASK 0x07ff
68 #define CFG_NLIN_LEFT_SHIFT 0
69 #define CFG_NLIN_RIGHT_MASK 0x07ff
72 #define CFG_SC9 0x24
75 #define CFG_SC10 0x28
78 #define CFG_SC11 0x2c
81 #define CFG_SC12 0x30
82 #define CFG_COL_ACC_OFFSET_MASK 0x01ffffff
83 #define CFG_COL_ACC_OFFSET_SHIFT 0
85 #define CFG_SC13 0x34
86 #define CFG_SC_FACTOR_RAV_MASK 0xff
87 #define CFG_SC_FACTOR_RAV_SHIFT 0
88 #define CFG_CHROMA_INTP_THR_MASK 0x03ff
90 #define CFG_DELTA_CHROMA_THR_MASK 0x0f
93 #define CFG_SC17 0x44
94 #define CFG_EV_THR_MASK 0x03ff
96 #define CFG_DELTA_LUMA_THR_MASK 0x0f
98 #define CFG_DELTA_EV_THR_MASK 0x0f
101 #define CFG_SC18 0x48
102 #define CFG_HS_FACTOR_MASK 0x03ff
103 #define CFG_HS_FACTOR_SHIFT 0
104 #define CFG_CONF_DEFAULT_MASK 0x01ff
107 #define CFG_SC19 0x4c
108 #define CFG_HPF_COEFF0_MASK 0xff
109 #define CFG_HPF_COEFF0_SHIFT 0
110 #define CFG_HPF_COEFF1_MASK 0xff
112 #define CFG_HPF_COEFF2_MASK 0xff
114 #define CFG_HPF_COEFF3_MASK 0xff
117 #define CFG_SC20 0x50
118 #define CFG_HPF_COEFF4_MASK 0xff
119 #define CFG_HPF_COEFF4_SHIFT 0
120 #define CFG_HPF_COEFF5_MASK 0xff
122 #define CFG_HPF_NORM_SHIFT_MASK 0x07
124 #define CFG_NL_LIMIT_MASK 0x1ff
127 #define CFG_SC21 0x54
128 #define CFG_NL_LO_THR_MASK 0x01ff
129 #define CFG_NL_LO_THR_SHIFT 0
130 #define CFG_NL_LO_SLOPE_MASK 0xff
133 #define CFG_SC22 0x58
134 #define CFG_NL_HI_THR_MASK 0x01ff
135 #define CFG_NL_HI_THR_SHIFT 0
136 #define CFG_NL_HI_SLOPE_SH_MASK 0x07
139 #define CFG_SC23 0x5c
140 #define CFG_GRADIENT_THR_MASK 0x07ff
141 #define CFG_GRADIENT_THR_SHIFT 0
142 #define CFG_GRADIENT_THR_RANGE_MASK 0x0f
144 #define CFG_MIN_GY_THR_MASK 0xff
146 #define CFG_MIN_GY_THR_RANGE_MASK 0x0f
149 #define CFG_SC24 0x60
150 #define CFG_ORG_H_MASK 0x07ff
151 #define CFG_ORG_H_SHIFT 0
152 #define CFG_ORG_W_MASK 0x07ff
155 #define CFG_SC25 0x64
156 #define CFG_OFF_H_MASK 0x07ff
157 #define CFG_OFF_H_SHIFT 0
158 #define CFG_OFF_W_MASK 0x07ff