43 #define CAL_HL_IRQSTATUS_RAW(m)		(0x20U + (m) * 0x10U)  argument
44 #define CAL_HL_IRQSTATUS(m)		(0x24U + (m) * 0x10U)  argument
45 #define CAL_HL_IRQENABLE_SET(m)		(0x28U + (m) * 0x10U)  argument
46 #define CAL_HL_IRQENABLE_CLR(m)		(0x2cU + (m) * 0x10U)  argument
47 #define CAL_PIX_PROC(m)			(0xc0U + (m) * 0x4U)  argument
63 #define CAL_WR_DMA_CTRL(m)		(0x200U + (m) * 0x10U)  argument
64 #define CAL_WR_DMA_ADDR(m)		(0x204U + (m) * 0x10U)  argument
65 #define CAL_WR_DMA_OFST(m)		(0x208U + (m) * 0x10U)  argument
66 #define CAL_WR_DMA_XSIZE(m)		(0x20cU + (m) * 0x10U)  argument
67 #define CAL_CSI2_PPI_CTRL(m)		(0x300U + (m) * 0x80U)  argument
68 #define CAL_CSI2_COMPLEXIO_CFG(m)	(0x304U + (m) * 0x80U)  argument
69 #define CAL_CSI2_COMPLEXIO_IRQSTATUS(m)	(0x308U + (m) * 0x80U)  argument
70 #define CAL_CSI2_SHORT_PACKET(m)	(0x30cU + (m) * 0x80U)  argument
71 #define CAL_CSI2_COMPLEXIO_IRQENABLE(m)	(0x310U + (m) * 0x80U)  argument
72 #define CAL_CSI2_TIMING(m)		(0x314U + (m) * 0x80U)  argument
73 #define CAL_CSI2_VC_IRQENABLE(m)	(0x318U + (m) * 0x80U)  argument
74 #define CAL_CSI2_VC_IRQSTATUS(m)	(0x328U + (m) * 0x80U)  argument
128 #define CAL_HL_IRQ_WDMA_END_MASK(m)		BIT(m)  argument
129 #define CAL_HL_IRQ_WDMA_START_MASK(m)		BIT(m)  argument
355 #define CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK		GENMASK(26, 25)
399 #define CAL_CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT_MASK	BIT(26)
450 #define CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC2_MASK		GENMASK(27, 26)