382 	val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx));  in cal_ctx_wr_dma_config()
391 	cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx), val);  in cal_ctx_wr_dma_config()
392 	ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->dma_ctx,  in cal_ctx_wr_dma_config()
393 		cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx)));  in cal_ctx_wr_dma_config()
395 	cal_write_field(ctx->cal, CAL_WR_DMA_OFST(ctx->dma_ctx),  in cal_ctx_wr_dma_config()
397 	ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->dma_ctx,  in cal_ctx_wr_dma_config()
398 		cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->dma_ctx)));  in cal_ctx_wr_dma_config()
400 	val = cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->dma_ctx));  in cal_ctx_wr_dma_config()
409 	cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->dma_ctx), val);  in cal_ctx_wr_dma_config()
410 	ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->dma_ctx,  in cal_ctx_wr_dma_config()
411 		cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->dma_ctx)));  in cal_ctx_wr_dma_config()
416 	cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->dma_ctx), addr);  in cal_ctx_set_dma_addr()
421 	u32 val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx));  in cal_ctx_wr_dma_enable()
425 	cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx), val);  in cal_ctx_wr_dma_enable()
430 	u32 val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx));  in cal_ctx_wr_dma_disable()
434 	cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx), val);  in cal_ctx_wr_dma_disable()
542 		  CAL_HL_IRQ_WDMA_END_MASK(ctx->dma_ctx));  in cal_ctx_start()
544 		  CAL_HL_IRQ_WDMA_START_MASK(ctx->dma_ctx));  in cal_ctx_start()
577 		  CAL_HL_IRQ_WDMA_END_MASK(ctx->dma_ctx));  in cal_ctx_stop()
579 		  CAL_HL_IRQ_WDMA_START_MASK(ctx->dma_ctx));  in cal_ctx_stop()
1018 	ctx->dma_ctx = inst;  in cal_ctx_create()