Lines Matching +full:29 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include "camif-core.h"
15 #include <media/drv-intf/s3c_camif.h>
19 * id = 0 - codec (FIMC C), 1 - preview (FIMC P).
24 #define CISRCFMT_ITU601_8BIT BIT(31)
35 #define CIWDOFST_WINOFSEN BIT(31)
36 #define CIWDOFST_CLROVCOFIY BIT(30)
37 #define CIWDOFST_CLROVRLB_PR BIT(28)
38 /* #define CIWDOFST_CLROVPRFIY BIT(27) */
39 #define CIWDOFST_CLROVCOFICB BIT(15)
40 #define CIWDOFST_CLROVCOFICR BIT(14)
41 #define CIWDOFST_CLROVPRFICB BIT(13)
42 #define CIWDOFST_CLROVPRFICR BIT(12)
51 #define CIGCTRL_SWRST BIT(31)
52 #define CIGCTRL_CAMRST BIT(30)
58 #define CIGCTRL_INVPOLPCLK BIT(26)
59 #define CIGCTRL_INVPOLVSYNC BIT(25)
60 #define CIGCTRL_INVPOLHREF BIT(24)
61 #define CIGCTRL_IRQ_OVFEN BIT(22)
62 #define CIGCTRL_HREF_MASK BIT(21)
63 #define CIGCTRL_IRQ_LEVEL BIT(20)
65 #define CIGCTRL_IRQ_CLR(id) BIT(19 - (id))
66 #define CIGCTRL_FIELDMODE BIT(2)
67 #define CIGCTRL_INVPOLFIELD BIT(1)
68 #define CIGCTRL_CAM_INTERLACE BIT(0)
77 /* CICOTRGFMT, CIPRTRGFMT - Target format */
79 #define CITRGFMT_IN422 BIT(31) /* only for s3c24xx */
80 #define CITRGFMT_OUT422 BIT(30) /* only for s3c24xx */
81 #define CITRGFMT_OUTFORMAT_YCBCR420 (0 << 29) /* only for s3c6410 */
82 #define CITRGFMT_OUTFORMAT_YCBCR422 (1 << 29) /* only for s3c6410 */
83 #define CITRGFMT_OUTFORMAT_YCBCR422I (2 << 29) /* only for s3c6410 */
84 #define CITRGFMT_OUTFORMAT_RGB (3 << 29) /* only for s3c6410 */
85 #define CITRGFMT_OUTFORMAT_MASK (3 << 29) /* only for s3c6410 */
93 #define CITRGFMT_ROT90_PR BIT(13)
100 /* xBURSTn - 5-bits width */
107 #define CICTRL_LASTIRQ_ENABLE BIT(2)
110 /* CICOSCPRERATIO, CIPRSCPRERATIO. Pre-scaler control 1. */
113 /* CICOSCPREDST, CIPRSCPREDST. Pre-scaler control 2. */
118 #define CISCCTRL_SCALERBYPASS BIT(31)
120 #define CIPRSCCTRL_SAMPLE BIT(31)
121 /* 0 - 16-bit RGB, 1 - 24-bit RGB */
122 #define CIPRSCCTRL_RGB_FORMAT_24BIT BIT(30) /* only for s3c244x */
123 #define CIPRSCCTRL_SCALEUP_H BIT(29) /* only for s3c244x */
124 #define CIPRSCCTRL_SCALEUP_V BIT(28) /* only for s3c244x */
126 #define CISCCTRL_SCALEUP_H BIT(30)
127 #define CISCCTRL_SCALEUP_V BIT(29)
128 #define CISCCTRL_SCALEUP_MASK (0x3 << 29)
129 #define CISCCTRL_CSCR2Y_WIDE BIT(28)
130 #define CISCCTRL_CSCY2R_WIDE BIT(27)
131 #define CISCCTRL_LCDPATHEN_FIFO BIT(26)
132 #define CISCCTRL_INTERLACE BIT(25)
133 #define CISCCTRL_SCALERSTART BIT(15)
142 #define CISCCTRL_EXTRGB_EXTENSION BIT(10)
143 #define CISCCTRL_ONE2ONE BIT(9)
152 #define CISTATUS_OVFIY_STATUS BIT(31)
153 #define CISTATUS_OVFICB_STATUS BIT(30)
154 #define CISTATUS_OVFICR_STATUS BIT(29)
155 #define CISTATUS_OVF_MASK (0x7 << 29)
157 #define CISTATUS_VSYNC_STATUS BIT(28)
160 #define CISTATUS_WINOFSTEN_STATUS BIT(25)
161 #define CISTATUS_IMGCPTEN_STATUS BIT(22)
162 #define CISTATUS_IMGCPTENSC_STATUS BIT(21)
163 #define CISTATUS_VSYNC_A_STATUS BIT(20)
164 #define CISTATUS_FRAMEEND_STATUS BIT(19) /* 17 on s3c64xx */
168 #define CIIMGCPT_IMGCPTEN BIT(31)
169 #define CIIMGCPT_IMGCPTEN_SC(id) BIT(30 - (id))
170 /* Frame control: 1 - one-shot, 0 - free run */
171 #define CIIMGCPT_CPT_FREN_ENABLE(id) BIT(25 - (id))
173 #define CIIMGCPT_CPT_FRMOD_CNT BIT(18)
180 #define CIIMGEFF_IE_ENABLE(id) BIT(30 + (id))
182 /* Image effect: 1 - after scaler, 0 - before scaler */
183 #define CIIMGEFF_IE_AFTER_SC BIT(29)
205 /* MSPRYOFF, MSPRYOFF. Y/Cb/Cr offset. n: 0 - codec, 1 - preview. */
210 /* Real input DMA data size. n = 0 - codec, 1 - preview. */
212 #define AUTOLOAD_ENABLE BIT(31)
213 #define ADDR_CH_DIS BIT(30)
217 /* Input DMA control. n = 0 - codec, 1 - preview */
223 /* 0 - camera, 1 - DMA */
224 #define MSCTRL_SEL_DMA_CAM BIT(3)
229 #define MSCTRL_ENVID_M BIT(0)
238 /* ------------------------------------------------------------------ */
264 return readl(vp->camif->io_base + S3C_CAMIF_REG_CISTATUS(vp->id, in camif_hw_get_status()
265 vp->offset)); in camif_hw_get_status()