1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6  * Samsung EXYNOS5 SoC series G-Scaler driver
12 #include "gsc-core.h"
16 	writel(GSC_SW_RESET_SRESET, dev->regs + GSC_SW_RESET);  in gsc_hw_set_sw_reset()
25 		cfg = readl(dev->regs + GSC_SW_RESET);  in gsc_wait_reset()
31 	return -EBUSY;  in gsc_wait_reset()
38 	cfg = readl(dev->regs + GSC_IRQ);  in gsc_hw_set_frm_done_irq_mask()
43 	writel(cfg, dev->regs + GSC_IRQ);  in gsc_hw_set_frm_done_irq_mask()
50 	cfg = readl(dev->regs + GSC_IRQ);  in gsc_hw_set_gsc_irq_enable()
55 	writel(cfg, dev->regs + GSC_IRQ);  in gsc_hw_set_gsc_irq_enable()
61 	u32 cfg = readl(dev->regs + GSC_IN_BASE_ADDR_Y_MASK);  in gsc_hw_set_input_buf_masking()
67 	writel(cfg, dev->regs + GSC_IN_BASE_ADDR_Y_MASK);  in gsc_hw_set_input_buf_masking()
68 	writel(cfg, dev->regs + GSC_IN_BASE_ADDR_CB_MASK);  in gsc_hw_set_input_buf_masking()
69 	writel(cfg, dev->regs + GSC_IN_BASE_ADDR_CR_MASK);  in gsc_hw_set_input_buf_masking()
75 	u32 cfg = readl(dev->regs + GSC_OUT_BASE_ADDR_Y_MASK);  in gsc_hw_set_output_buf_masking()
81 	writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_Y_MASK);  in gsc_hw_set_output_buf_masking()
82 	writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_CB_MASK);  in gsc_hw_set_output_buf_masking()
83 	writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_CR_MASK);  in gsc_hw_set_output_buf_masking()
90 			&addr->y, &addr->cb, &addr->cr);  in gsc_hw_set_input_addr()
91 	writel(addr->y, dev->regs + GSC_IN_BASE_ADDR_Y(index));  in gsc_hw_set_input_addr()
92 	writel(addr->cb, dev->regs + GSC_IN_BASE_ADDR_CB(index));  in gsc_hw_set_input_addr()
93 	writel(addr->cr, dev->regs + GSC_IN_BASE_ADDR_CR(index));  in gsc_hw_set_input_addr()
101 			index, &addr->y, &addr->cb, &addr->cr);  in gsc_hw_set_output_addr()
102 	writel(addr->y, dev->regs + GSC_OUT_BASE_ADDR_Y(index));  in gsc_hw_set_output_addr()
103 	writel(addr->cb, dev->regs + GSC_OUT_BASE_ADDR_CB(index));  in gsc_hw_set_output_addr()
104 	writel(addr->cr, dev->regs + GSC_OUT_BASE_ADDR_CR(index));  in gsc_hw_set_output_addr()
109 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_input_path()
111 	u32 cfg = readl(dev->regs + GSC_IN_CON);  in gsc_hw_set_input_path()
114 	if (ctx->in_path == GSC_DMA)  in gsc_hw_set_input_path()
117 	writel(cfg, dev->regs + GSC_IN_CON);  in gsc_hw_set_input_path()
122 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_in_size()
123 	struct gsc_frame *frame = &ctx->s_frame;  in gsc_hw_set_in_size()
127 	cfg = GSC_SRCIMG_OFFSET_X(frame->crop.left);  in gsc_hw_set_in_size()
128 	cfg |= GSC_SRCIMG_OFFSET_Y(frame->crop.top);  in gsc_hw_set_in_size()
129 	writel(cfg, dev->regs + GSC_SRCIMG_OFFSET);  in gsc_hw_set_in_size()
132 	cfg = GSC_SRCIMG_WIDTH(frame->f_width);  in gsc_hw_set_in_size()
133 	cfg |= GSC_SRCIMG_HEIGHT(frame->f_height);  in gsc_hw_set_in_size()
134 	writel(cfg, dev->regs + GSC_SRCIMG_SIZE);  in gsc_hw_set_in_size()
137 	cfg = GSC_CROPPED_WIDTH(frame->crop.width);  in gsc_hw_set_in_size()
138 	cfg |= GSC_CROPPED_HEIGHT(frame->crop.height);  in gsc_hw_set_in_size()
139 	writel(cfg, dev->regs + GSC_CROPPED_SIZE);  in gsc_hw_set_in_size()
144 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_in_image_rgb()
145 	struct gsc_frame *frame = &ctx->s_frame;  in gsc_hw_set_in_image_rgb()
148 	cfg = readl(dev->regs + GSC_IN_CON);  in gsc_hw_set_in_image_rgb()
149 	if (frame->colorspace == V4L2_COLORSPACE_REC709)  in gsc_hw_set_in_image_rgb()
154 	if (frame->fmt->pixelformat == V4L2_PIX_FMT_RGB565X)  in gsc_hw_set_in_image_rgb()
156 	else if (frame->fmt->pixelformat == V4L2_PIX_FMT_RGB32)  in gsc_hw_set_in_image_rgb()
159 	writel(cfg, dev->regs + GSC_IN_CON);  in gsc_hw_set_in_image_rgb()
164 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_in_image_format()
165 	struct gsc_frame *frame = &ctx->s_frame;  in gsc_hw_set_in_image_format()
169 	cfg = readl(dev->regs + GSC_IN_CON);  in gsc_hw_set_in_image_format()
173 	writel(cfg, dev->regs + GSC_IN_CON);  in gsc_hw_set_in_image_format()
175 	if (is_rgb(frame->fmt->color)) {  in gsc_hw_set_in_image_format()
179 	for (i = 0; i < frame->fmt->num_planes; i++)  in gsc_hw_set_in_image_format()
180 		depth += frame->fmt->depth[i];  in gsc_hw_set_in_image_format()
182 	switch (frame->fmt->num_comp) {  in gsc_hw_set_in_image_format()
185 		if (frame->fmt->yorder == GSC_LSB_Y)  in gsc_hw_set_in_image_format()
189 		if (frame->fmt->corder == GSC_CBCR)  in gsc_hw_set_in_image_format()
199 		if (frame->fmt->corder == GSC_CBCR)  in gsc_hw_set_in_image_format()
212 	if (is_tiled(frame->fmt))  in gsc_hw_set_in_image_format()
215 	writel(cfg, dev->regs + GSC_IN_CON);  in gsc_hw_set_in_image_format()
220 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_output_path()
222 	u32 cfg = readl(dev->regs + GSC_OUT_CON);  in gsc_hw_set_output_path()
225 	if (ctx->out_path == GSC_DMA)  in gsc_hw_set_output_path()
230 	writel(cfg, dev->regs + GSC_OUT_CON);  in gsc_hw_set_output_path()
235 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_out_size()
236 	struct gsc_frame *frame = &ctx->d_frame;  in gsc_hw_set_out_size()
240 	if (ctx->out_path == GSC_DMA) {  in gsc_hw_set_out_size()
241 		cfg = GSC_DSTIMG_OFFSET_X(frame->crop.left);  in gsc_hw_set_out_size()
242 		cfg |= GSC_DSTIMG_OFFSET_Y(frame->crop.top);  in gsc_hw_set_out_size()
243 		writel(cfg, dev->regs + GSC_DSTIMG_OFFSET);  in gsc_hw_set_out_size()
245 		cfg = GSC_DSTIMG_WIDTH(frame->f_width);  in gsc_hw_set_out_size()
246 		cfg |= GSC_DSTIMG_HEIGHT(frame->f_height);  in gsc_hw_set_out_size()
247 		writel(cfg, dev->regs + GSC_DSTIMG_SIZE);  in gsc_hw_set_out_size()
251 	if (ctx->gsc_ctrls.rotate->val == 90 ||  in gsc_hw_set_out_size()
252 	    ctx->gsc_ctrls.rotate->val == 270) {  in gsc_hw_set_out_size()
253 		cfg = GSC_SCALED_WIDTH(frame->crop.height);  in gsc_hw_set_out_size()
254 		cfg |= GSC_SCALED_HEIGHT(frame->crop.width);  in gsc_hw_set_out_size()
256 		cfg = GSC_SCALED_WIDTH(frame->crop.width);  in gsc_hw_set_out_size()
257 		cfg |= GSC_SCALED_HEIGHT(frame->crop.height);  in gsc_hw_set_out_size()
259 	writel(cfg, dev->regs + GSC_SCALED_SIZE);  in gsc_hw_set_out_size()
264 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_out_image_rgb()
265 	struct gsc_frame *frame = &ctx->d_frame;  in gsc_hw_set_out_image_rgb()
268 	cfg = readl(dev->regs + GSC_OUT_CON);  in gsc_hw_set_out_image_rgb()
269 	if (frame->colorspace == V4L2_COLORSPACE_REC709)  in gsc_hw_set_out_image_rgb()
274 	if (frame->fmt->pixelformat == V4L2_PIX_FMT_RGB565X)  in gsc_hw_set_out_image_rgb()
276 	else if (frame->fmt->pixelformat == V4L2_PIX_FMT_RGB32)  in gsc_hw_set_out_image_rgb()
279 	writel(cfg, dev->regs + GSC_OUT_CON);  in gsc_hw_set_out_image_rgb()
284 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_out_image_format()
285 	struct gsc_frame *frame = &ctx->d_frame;  in gsc_hw_set_out_image_format()
289 	cfg = readl(dev->regs + GSC_OUT_CON);  in gsc_hw_set_out_image_format()
293 	writel(cfg, dev->regs + GSC_OUT_CON);  in gsc_hw_set_out_image_format()
295 	if (is_rgb(frame->fmt->color)) {  in gsc_hw_set_out_image_format()
300 	if (ctx->out_path != GSC_DMA) {  in gsc_hw_set_out_image_format()
305 	for (i = 0; i < frame->fmt->num_planes; i++)  in gsc_hw_set_out_image_format()
306 		depth += frame->fmt->depth[i];  in gsc_hw_set_out_image_format()
308 	switch (frame->fmt->num_comp) {  in gsc_hw_set_out_image_format()
311 		if (frame->fmt->yorder == GSC_LSB_Y)  in gsc_hw_set_out_image_format()
315 		if (frame->fmt->corder == GSC_CBCR)  in gsc_hw_set_out_image_format()
325 		if (frame->fmt->corder == GSC_CBCR)  in gsc_hw_set_out_image_format()
335 	if (is_tiled(frame->fmt))  in gsc_hw_set_out_image_format()
339 	writel(cfg, dev->regs + GSC_OUT_CON);  in gsc_hw_set_out_image_format()
344 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_prescaler()
345 	struct gsc_scaler *sc = &ctx->scaler;  in gsc_hw_set_prescaler()
348 	cfg = GSC_PRESC_SHFACTOR(sc->pre_shfactor);  in gsc_hw_set_prescaler()
349 	cfg |= GSC_PRESC_H_RATIO(sc->pre_hratio);  in gsc_hw_set_prescaler()
350 	cfg |= GSC_PRESC_V_RATIO(sc->pre_vratio);  in gsc_hw_set_prescaler()
351 	writel(cfg, dev->regs + GSC_PRE_SCALE_RATIO);  in gsc_hw_set_prescaler()
356 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_mainscaler()
357 	struct gsc_scaler *sc = &ctx->scaler;  in gsc_hw_set_mainscaler()
360 	cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio);  in gsc_hw_set_mainscaler()
361 	writel(cfg, dev->regs + GSC_MAIN_H_RATIO);  in gsc_hw_set_mainscaler()
363 	cfg = GSC_MAIN_V_RATIO_VALUE(sc->main_vratio);  in gsc_hw_set_mainscaler()
364 	writel(cfg, dev->regs + GSC_MAIN_V_RATIO);  in gsc_hw_set_mainscaler()
369 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_rotation()
372 	cfg = readl(dev->regs + GSC_IN_CON);  in gsc_hw_set_rotation()
375 	switch (ctx->gsc_ctrls.rotate->val) {  in gsc_hw_set_rotation()
383 		if (ctx->gsc_ctrls.hflip->val)  in gsc_hw_set_rotation()
385 		else if (ctx->gsc_ctrls.vflip->val)  in gsc_hw_set_rotation()
391 		if (ctx->gsc_ctrls.hflip->val)  in gsc_hw_set_rotation()
393 		else if (ctx->gsc_ctrls.vflip->val)  in gsc_hw_set_rotation()
397 	writel(cfg, dev->regs + GSC_IN_CON);  in gsc_hw_set_rotation()
402 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_global_alpha()
403 	struct gsc_frame *frame = &ctx->d_frame;  in gsc_hw_set_global_alpha()
406 	if (!is_rgb(frame->fmt->color)) {  in gsc_hw_set_global_alpha()
411 	cfg = readl(dev->regs + GSC_OUT_CON);  in gsc_hw_set_global_alpha()
414 	cfg |= GSC_OUT_GLOBAL_ALPHA(ctx->gsc_ctrls.global_alpha->val);  in gsc_hw_set_global_alpha()
415 	writel(cfg, dev->regs + GSC_OUT_CON);  in gsc_hw_set_global_alpha()
420 	struct gsc_dev *dev = ctx->gsc_dev;  in gsc_hw_set_sfr_update()
423 	cfg = readl(dev->regs + GSC_ENABLE);  in gsc_hw_set_sfr_update()
425 	writel(cfg, dev->regs + GSC_ENABLE);  in gsc_hw_set_sfr_update()