Lines Matching refs:vfe
250 static u32 vfe_hw_version(struct vfe_device *vfe) in vfe_hw_version() argument
252 u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION); in vfe_hw_version()
254 dev_dbg(vfe->camss->dev, "VFE HW Version = 0x%08x\n", hw_version); in vfe_hw_version()
259 static inline void vfe_reg_clr(struct vfe_device *vfe, u32 reg, u32 clr_bits) in vfe_reg_clr() argument
261 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_clr()
263 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
266 static inline void vfe_reg_set(struct vfe_device *vfe, u32 reg, u32 set_bits) in vfe_reg_set() argument
268 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_set()
270 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
273 static void vfe_global_reset(struct vfe_device *vfe) in vfe_global_reset() argument
286 writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0); in vfe_global_reset()
290 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
293 static void vfe_halt_request(struct vfe_device *vfe) in vfe_halt_request() argument
296 vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_request()
299 static void vfe_halt_clear(struct vfe_device *vfe) in vfe_halt_clear() argument
301 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
304 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
307 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
310 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
369 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, in vfe_wm_line_based() argument
385 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
394 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
397 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
399 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
404 static void vfe_wm_set_framedrop_period(struct vfe_device *vfe, u8 wm, u8 per) in vfe_wm_set_framedrop_period() argument
408 reg = readl_relaxed(vfe->base + in vfe_wm_set_framedrop_period()
417 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm)); in vfe_wm_set_framedrop_period()
420 static void vfe_wm_set_framedrop_pattern(struct vfe_device *vfe, u8 wm, in vfe_wm_set_framedrop_pattern() argument
423 writel_relaxed(pattern, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_FRAMEDROP_PATTERN(wm)); in vfe_wm_set_framedrop_pattern()
426 static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm, in vfe_wm_set_ub_cfg() argument
433 writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm)); in vfe_wm_set_ub_cfg()
436 static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm) in vfe_bus_reload_wm() argument
441 writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD); in vfe_bus_reload_wm()
447 static void vfe_wm_set_ping_addr(struct vfe_device *vfe, u8 wm, u32 addr) in vfe_wm_set_ping_addr() argument
450 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PING_ADDR(wm)); in vfe_wm_set_ping_addr()
453 static void vfe_wm_set_pong_addr(struct vfe_device *vfe, u8 wm, u32 addr) in vfe_wm_set_pong_addr() argument
456 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PONG_ADDR(wm)); in vfe_wm_set_pong_addr()
459 static int vfe_wm_get_ping_pong_status(struct vfe_device *vfe, u8 wm) in vfe_wm_get_ping_pong_status() argument
463 reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS); in vfe_wm_get_ping_pong_status()
468 static void vfe_bus_enable_wr_if(struct vfe_device *vfe, u8 enable) in vfe_bus_enable_wr_if() argument
471 writel_relaxed(0x101, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
473 writel_relaxed(0, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
476 static void vfe_bus_connect_wm_to_rdi(struct vfe_device *vfe, u8 wm, in vfe_bus_connect_wm_to_rdi() argument
482 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), reg); in vfe_bus_connect_wm_to_rdi()
487 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), reg); in vfe_bus_connect_wm_to_rdi()
508 vfe_reg_set(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg); in vfe_bus_connect_wm_to_rdi()
511 static void vfe_wm_set_subsample(struct vfe_device *vfe, u8 wm) in vfe_wm_set_subsample() argument
514 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_IRQ_SUBSAMPLE_PATTERN(wm)); in vfe_wm_set_subsample()
517 static void vfe_bus_disconnect_wm_from_rdi(struct vfe_device *vfe, u8 wm, in vfe_bus_disconnect_wm_from_rdi() argument
523 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), reg); in vfe_bus_disconnect_wm_from_rdi()
544 vfe_reg_clr(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg); in vfe_bus_disconnect_wm_from_rdi()
547 static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output, in vfe_set_xbar_cfg() argument
566 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
570 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
582 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
586 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
604 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
608 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
617 static void vfe_set_realign_cfg(struct vfe_device *vfe, struct vfe_line *line, in vfe_set_realign_cfg() argument
628 vfe_reg_set(vfe, VFE_0_MODULE_ZOOM_EN, val); in vfe_set_realign_cfg()
630 vfe_reg_clr(vfe, VFE_0_MODULE_ZOOM_EN, val); in vfe_set_realign_cfg()
641 writel_relaxed(val, vfe->base + VFE_0_REALIGN_BUF_CFG); in vfe_set_realign_cfg()
644 static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid) in vfe_set_rdi_cid() argument
646 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), in vfe_set_rdi_cid()
649 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), in vfe_set_rdi_cid()
653 static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) in vfe_reg_update() argument
655 vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update()
660 writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE); in vfe_reg_update()
666 static inline void vfe_reg_update_clear(struct vfe_device *vfe, in vfe_reg_update_clear() argument
669 vfe->reg_update &= ~VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update_clear()
672 static void vfe_enable_irq_wm_line(struct vfe_device *vfe, u8 wm, in vfe_enable_irq_wm_line() argument
681 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_wm_line()
682 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_wm_line()
684 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_wm_line()
685 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_wm_line()
689 static void vfe_enable_irq_pix_line(struct vfe_device *vfe, u8 comp, in vfe_enable_irq_pix_line() argument
692 struct vfe_output *output = &vfe->line[line_id].output; in vfe_enable_irq_pix_line()
709 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_pix_line()
710 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_pix_line()
711 vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
713 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_pix_line()
714 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_pix_line()
715 vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
719 static void vfe_enable_irq_common(struct vfe_device *vfe) in vfe_enable_irq_common() argument
725 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_common()
726 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_common()
729 static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_demux_cfg() argument
733 writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG); in vfe_set_demux_cfg()
736 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0); in vfe_set_demux_cfg()
739 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1); in vfe_set_demux_cfg()
761 writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG); in vfe_set_demux_cfg()
762 writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG); in vfe_set_demux_cfg()
765 static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_scale_cfg() argument
773 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG); in vfe_set_scale_cfg()
778 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE); in vfe_set_scale_cfg()
783 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE); in vfe_set_scale_cfg()
788 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE); in vfe_set_scale_cfg()
793 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE); in vfe_set_scale_cfg()
795 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG); in vfe_set_scale_cfg()
800 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE); in vfe_set_scale_cfg()
805 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE); in vfe_set_scale_cfg()
812 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE); in vfe_set_scale_cfg()
817 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE); in vfe_set_scale_cfg()
820 static void vfe_set_crop_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_crop_cfg() argument
829 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH); in vfe_set_crop_cfg()
834 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT); in vfe_set_crop_cfg()
839 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH); in vfe_set_crop_cfg()
848 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT); in vfe_set_crop_cfg()
851 static void vfe_set_clamp_cfg(struct vfe_device *vfe) in vfe_set_clamp_cfg() argument
857 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG); in vfe_set_clamp_cfg()
863 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG); in vfe_set_clamp_cfg()
866 static void vfe_set_cgc_override(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_set_cgc_override() argument
871 static void vfe_set_camif_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_camif_cfg() argument
892 writel_relaxed(val, vfe->base + VFE_0_CORE_CFG); in vfe_set_camif_cfg()
896 writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG); in vfe_set_camif_cfg()
899 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG); in vfe_set_camif_cfg()
902 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG); in vfe_set_camif_cfg()
905 writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG); in vfe_set_camif_cfg()
908 writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_FRAMEDROP_PATTERN); in vfe_set_camif_cfg()
911 writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN); in vfe_set_camif_cfg()
914 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), val); in vfe_set_camif_cfg()
917 writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG); in vfe_set_camif_cfg()
920 static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable) in vfe_set_camif_cmd() argument
925 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
935 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
938 static void vfe_set_module_cfg(struct vfe_device *vfe, u8 enable) in vfe_set_module_cfg() argument
946 vfe_reg_set(vfe, VFE_0_MODULE_LENS_EN, val_lens); in vfe_set_module_cfg()
947 vfe_reg_set(vfe, VFE_0_MODULE_ZOOM_EN, val_zoom); in vfe_set_module_cfg()
949 vfe_reg_clr(vfe, VFE_0_MODULE_LENS_EN, val_lens); in vfe_set_module_cfg()
950 vfe_reg_clr(vfe, VFE_0_MODULE_ZOOM_EN, val_zoom); in vfe_set_module_cfg()
954 static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev) in vfe_camif_wait_for_stop() argument
959 ret = readl_poll_timeout(vfe->base + VFE_0_CAMIF_STATUS, in vfe_camif_wait_for_stop()
979 struct vfe_device *vfe = dev; in vfe_isr() local
983 vfe->res->hw_ops->isr_read(vfe, &value0, &value1); in vfe_isr()
985 dev_dbg(vfe->camss->dev, "VFE: status0 = 0x%08x, status1 = 0x%08x\n", in vfe_isr()
989 vfe->isr_ops.reset_ack(vfe); in vfe_isr()
992 vfe->res->hw_ops->violation_read(vfe); in vfe_isr()
995 vfe->isr_ops.halt_ack(vfe); in vfe_isr()
997 for (i = VFE_LINE_RDI0; i < vfe->res->line_num; i++) in vfe_isr()
999 vfe->isr_ops.reg_update(vfe, i); in vfe_isr()
1002 vfe->isr_ops.sof(vfe, VFE_LINE_PIX); in vfe_isr()
1006 vfe->isr_ops.sof(vfe, i); in vfe_isr()
1010 vfe->isr_ops.comp_done(vfe, i); in vfe_isr()
1011 for (j = 0; j < ARRAY_SIZE(vfe->wm_output_map); j++) in vfe_isr()
1012 if (vfe->wm_output_map[j] == VFE_LINE_PIX) in vfe_isr()
1018 vfe->isr_ops.wm_done(vfe, i); in vfe_isr()
1029 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_enable() argument
1033 vfe->base + VFE_0_BUS_IMAGE_MASTER_CMD); in vfe_wm_enable()
1036 vfe->base + VFE_0_BUS_IMAGE_MASTER_CMD); in vfe_wm_enable()
1042 static void vfe_set_qos(struct vfe_device *vfe) in vfe_set_qos() argument
1049 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); in vfe_set_qos()
1050 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); in vfe_set_qos()
1051 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2); in vfe_set_qos()
1052 writel_relaxed(val3, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3); in vfe_set_qos()
1053 writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4); in vfe_set_qos()
1054 writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); in vfe_set_qos()
1055 writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); in vfe_set_qos()
1056 writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); in vfe_set_qos()
1059 static void vfe_set_ds(struct vfe_device *vfe) in vfe_set_ds() argument
1064 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_0); in vfe_set_ds()
1065 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_1); in vfe_set_ds()
1066 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_2); in vfe_set_ds()
1067 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_3); in vfe_set_ds()
1068 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_4); in vfe_set_ds()
1069 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_5); in vfe_set_ds()
1070 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_6); in vfe_set_ds()
1071 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_7); in vfe_set_ds()
1072 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_8); in vfe_set_ds()
1073 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_9); in vfe_set_ds()
1074 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_10); in vfe_set_ds()
1075 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_11); in vfe_set_ds()
1076 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_12); in vfe_set_ds()
1077 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_13); in vfe_set_ds()
1078 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_14); in vfe_set_ds()
1079 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_15); in vfe_set_ds()
1080 writel_relaxed(val16, vfe->base + VFE_0_BUS_BDG_DS_CFG_16); in vfe_set_ds()
1083 static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1) in vfe_isr_read() argument
1085 *value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0); in vfe_isr_read()
1086 *value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1); in vfe_isr_read()
1088 writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0); in vfe_isr_read()
1089 writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1); in vfe_isr_read()
1093 writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD); in vfe_isr_read()
1096 static void vfe_violation_read(struct vfe_device *vfe) in vfe_violation_read() argument
1098 u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS); in vfe_violation_read()
1140 static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) in vfe_subdev_init() argument
1142 vfe->isr_ops = vfe_isr_ops_gen1; in vfe_subdev_init()
1143 vfe->ops_gen1 = &vfe_ops_gen1_4_8; in vfe_subdev_init()
1144 vfe->video_ops = vfe_video_ops_gen1; in vfe_subdev_init()