Lines Matching refs:vfe
257 static u32 vfe_hw_version(struct vfe_device *vfe) in vfe_hw_version() argument
259 u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION); in vfe_hw_version()
261 dev_dbg(vfe->camss->dev, "VFE HW Version = 0x%08x\n", hw_version); in vfe_hw_version()
276 static inline void vfe_reg_clr(struct vfe_device *vfe, u32 reg, u32 clr_bits) in vfe_reg_clr() argument
278 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_clr()
280 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
283 static inline void vfe_reg_set(struct vfe_device *vfe, u32 reg, u32 set_bits) in vfe_reg_set() argument
285 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_set()
287 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
290 static void vfe_global_reset(struct vfe_device *vfe) in vfe_global_reset() argument
303 writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0); in vfe_global_reset()
307 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
310 static void vfe_halt_request(struct vfe_device *vfe) in vfe_halt_request() argument
313 vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_request()
316 static void vfe_halt_clear(struct vfe_device *vfe) in vfe_halt_clear() argument
318 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
321 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_enable() argument
324 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
327 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
331 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
334 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
337 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
396 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, in vfe_wm_line_based() argument
412 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
421 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
424 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
426 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
431 static void vfe_wm_set_framedrop_period(struct vfe_device *vfe, u8 wm, u8 per) in vfe_wm_set_framedrop_period() argument
435 reg = readl_relaxed(vfe->base + in vfe_wm_set_framedrop_period()
444 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm)); in vfe_wm_set_framedrop_period()
447 static void vfe_wm_set_framedrop_pattern(struct vfe_device *vfe, u8 wm, in vfe_wm_set_framedrop_pattern() argument
451 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_FRAMEDROP_PATTERN(wm)); in vfe_wm_set_framedrop_pattern()
454 static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm, in vfe_wm_set_ub_cfg() argument
461 writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm)); in vfe_wm_set_ub_cfg()
464 static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm) in vfe_bus_reload_wm() argument
469 writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD); in vfe_bus_reload_wm()
475 static void vfe_wm_set_ping_addr(struct vfe_device *vfe, u8 wm, u32 addr) in vfe_wm_set_ping_addr() argument
478 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PING_ADDR(wm)); in vfe_wm_set_ping_addr()
481 static void vfe_wm_set_pong_addr(struct vfe_device *vfe, u8 wm, u32 addr) in vfe_wm_set_pong_addr() argument
484 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PONG_ADDR(wm)); in vfe_wm_set_pong_addr()
487 static int vfe_wm_get_ping_pong_status(struct vfe_device *vfe, u8 wm) in vfe_wm_get_ping_pong_status() argument
491 reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS); in vfe_wm_get_ping_pong_status()
496 static void vfe_bus_enable_wr_if(struct vfe_device *vfe, u8 enable) in vfe_bus_enable_wr_if() argument
499 writel_relaxed(0x101, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
501 writel_relaxed(0, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
504 static void vfe_bus_connect_wm_to_rdi(struct vfe_device *vfe, u8 wm, in vfe_bus_connect_wm_to_rdi() argument
510 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), reg); in vfe_bus_connect_wm_to_rdi()
515 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), reg); in vfe_bus_connect_wm_to_rdi()
536 vfe_reg_set(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg); in vfe_bus_connect_wm_to_rdi()
539 static void vfe_wm_set_subsample(struct vfe_device *vfe, u8 wm) in vfe_wm_set_subsample() argument
542 vfe->base + in vfe_wm_set_subsample()
546 static void vfe_bus_disconnect_wm_from_rdi(struct vfe_device *vfe, u8 wm, in vfe_bus_disconnect_wm_from_rdi() argument
552 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), reg); in vfe_bus_disconnect_wm_from_rdi()
573 vfe_reg_clr(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg); in vfe_bus_disconnect_wm_from_rdi()
576 static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output, in vfe_set_xbar_cfg() argument
595 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
599 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
611 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
615 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
633 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
637 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
646 static void vfe_set_realign_cfg(struct vfe_device *vfe, struct vfe_line *line, in vfe_set_realign_cfg() argument
657 vfe_reg_set(vfe, VFE_0_MODULE_ZOOM_EN, val); in vfe_set_realign_cfg()
659 vfe_reg_clr(vfe, VFE_0_MODULE_ZOOM_EN, val); in vfe_set_realign_cfg()
670 writel_relaxed(val, vfe->base + VFE_0_REALIGN_BUF_CFG); in vfe_set_realign_cfg()
673 static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid) in vfe_set_rdi_cid() argument
675 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), in vfe_set_rdi_cid()
678 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), in vfe_set_rdi_cid()
682 static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) in vfe_reg_update() argument
684 vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update()
688 writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE); in vfe_reg_update()
694 static inline void vfe_reg_update_clear(struct vfe_device *vfe, in vfe_reg_update_clear() argument
697 vfe->reg_update &= ~VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update_clear()
700 static void vfe_enable_irq_wm_line(struct vfe_device *vfe, u8 wm, in vfe_enable_irq_wm_line() argument
709 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_wm_line()
710 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_wm_line()
712 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_wm_line()
713 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_wm_line()
717 static void vfe_enable_irq_pix_line(struct vfe_device *vfe, u8 comp, in vfe_enable_irq_pix_line() argument
720 struct vfe_output *output = &vfe->line[line_id].output; in vfe_enable_irq_pix_line()
738 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_pix_line()
739 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_pix_line()
740 vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
742 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_pix_line()
743 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_pix_line()
744 vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
748 static void vfe_enable_irq_common(struct vfe_device *vfe) in vfe_enable_irq_common() argument
754 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_common()
755 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_common()
758 static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_demux_cfg() argument
762 writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG); in vfe_set_demux_cfg()
765 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0); in vfe_set_demux_cfg()
768 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1); in vfe_set_demux_cfg()
790 writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG); in vfe_set_demux_cfg()
791 writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG); in vfe_set_demux_cfg()
794 static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_scale_cfg() argument
802 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG); in vfe_set_scale_cfg()
807 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE); in vfe_set_scale_cfg()
812 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE); in vfe_set_scale_cfg()
817 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE); in vfe_set_scale_cfg()
822 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE); in vfe_set_scale_cfg()
824 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG); in vfe_set_scale_cfg()
829 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE); in vfe_set_scale_cfg()
834 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE); in vfe_set_scale_cfg()
841 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE); in vfe_set_scale_cfg()
846 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE); in vfe_set_scale_cfg()
849 static void vfe_set_crop_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_crop_cfg() argument
858 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH); in vfe_set_crop_cfg()
863 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT); in vfe_set_crop_cfg()
868 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH); in vfe_set_crop_cfg()
877 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT); in vfe_set_crop_cfg()
880 static void vfe_set_clamp_cfg(struct vfe_device *vfe) in vfe_set_clamp_cfg() argument
886 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG); in vfe_set_clamp_cfg()
892 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG); in vfe_set_clamp_cfg()
895 static void vfe_set_qos(struct vfe_device *vfe) in vfe_set_qos() argument
900 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); in vfe_set_qos()
901 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); in vfe_set_qos()
902 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2); in vfe_set_qos()
903 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3); in vfe_set_qos()
904 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4); in vfe_set_qos()
905 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); in vfe_set_qos()
906 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); in vfe_set_qos()
907 writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); in vfe_set_qos()
910 static void vfe_set_ds(struct vfe_device *vfe) in vfe_set_ds() argument
915 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_0); in vfe_set_ds()
916 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_1); in vfe_set_ds()
917 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_2); in vfe_set_ds()
918 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_3); in vfe_set_ds()
919 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_4); in vfe_set_ds()
920 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_5); in vfe_set_ds()
921 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_6); in vfe_set_ds()
922 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_7); in vfe_set_ds()
923 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_8); in vfe_set_ds()
924 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_9); in vfe_set_ds()
925 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_10); in vfe_set_ds()
926 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_11); in vfe_set_ds()
927 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_12); in vfe_set_ds()
928 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_13); in vfe_set_ds()
929 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_14); in vfe_set_ds()
930 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_15); in vfe_set_ds()
931 writel_relaxed(val16, vfe->base + VFE_0_BUS_BDG_DS_CFG_16); in vfe_set_ds()
934 static void vfe_set_cgc_override(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_set_cgc_override() argument
939 static void vfe_set_camif_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_camif_cfg() argument
960 writel_relaxed(val, vfe->base + VFE_0_CORE_CFG); in vfe_set_camif_cfg()
964 writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG); in vfe_set_camif_cfg()
967 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG); in vfe_set_camif_cfg()
970 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG); in vfe_set_camif_cfg()
973 writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG); in vfe_set_camif_cfg()
976 writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_FRAMEDROP_PATTERN); in vfe_set_camif_cfg()
979 writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN); in vfe_set_camif_cfg()
982 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), val); in vfe_set_camif_cfg()
985 writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG); in vfe_set_camif_cfg()
988 static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable) in vfe_set_camif_cmd() argument
993 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
1003 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
1006 static void vfe_set_module_cfg(struct vfe_device *vfe, u8 enable) in vfe_set_module_cfg() argument
1014 vfe_reg_set(vfe, VFE_0_MODULE_LENS_EN, val_lens); in vfe_set_module_cfg()
1015 vfe_reg_set(vfe, VFE_0_MODULE_ZOOM_EN, val_zoom); in vfe_set_module_cfg()
1017 vfe_reg_clr(vfe, VFE_0_MODULE_LENS_EN, val_lens); in vfe_set_module_cfg()
1018 vfe_reg_clr(vfe, VFE_0_MODULE_ZOOM_EN, val_zoom); in vfe_set_module_cfg()
1022 static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev) in vfe_camif_wait_for_stop() argument
1027 ret = readl_poll_timeout(vfe->base + VFE_0_CAMIF_STATUS, in vfe_camif_wait_for_stop()
1049 struct vfe_device *vfe = dev; in vfe_isr() local
1053 vfe->res->hw_ops->isr_read(vfe, &value0, &value1); in vfe_isr()
1055 dev_dbg(vfe->camss->dev, "VFE: status0 = 0x%08x, status1 = 0x%08x\n", in vfe_isr()
1059 vfe->isr_ops.reset_ack(vfe); in vfe_isr()
1062 vfe->res->hw_ops->violation_read(vfe); in vfe_isr()
1065 vfe->isr_ops.halt_ack(vfe); in vfe_isr()
1067 for (i = VFE_LINE_RDI0; i < vfe->res->line_num; i++) in vfe_isr()
1069 vfe->isr_ops.reg_update(vfe, i); in vfe_isr()
1072 vfe->isr_ops.sof(vfe, VFE_LINE_PIX); in vfe_isr()
1076 vfe->isr_ops.sof(vfe, i); in vfe_isr()
1080 vfe->isr_ops.comp_done(vfe, i); in vfe_isr()
1081 for (j = 0; j < ARRAY_SIZE(vfe->wm_output_map); j++) in vfe_isr()
1082 if (vfe->wm_output_map[j] == VFE_LINE_PIX) in vfe_isr()
1088 vfe->isr_ops.wm_done(vfe, i); in vfe_isr()
1093 static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1) in vfe_isr_read() argument
1095 *value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0); in vfe_isr_read()
1096 *value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1); in vfe_isr_read()
1098 writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0); in vfe_isr_read()
1099 writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1); in vfe_isr_read()
1103 writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD); in vfe_isr_read()
1106 static void vfe_violation_read(struct vfe_device *vfe) in vfe_violation_read() argument
1108 u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS); in vfe_violation_read()
1150 static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) in vfe_subdev_init() argument
1152 vfe->isr_ops = vfe_isr_ops_gen1; in vfe_subdev_init()
1153 vfe->ops_gen1 = &vfe_ops_gen1_4_7; in vfe_subdev_init()
1154 vfe->video_ops = vfe_video_ops_gen1; in vfe_subdev_init()