213 static u32 vfe_hw_version(struct vfe_device *vfe)  in vfe_hw_version()  argument
215 	u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION);  in vfe_hw_version()
217 	dev_dbg(vfe->camss->dev, "VFE HW Version = 0x%08x\n", hw_version);  in vfe_hw_version()
230 static inline void vfe_reg_clr(struct vfe_device *vfe, u32 reg, u32 clr_bits)  in vfe_reg_clr()  argument
232 	u32 bits = readl_relaxed(vfe->base + reg);  in vfe_reg_clr()
234 	writel_relaxed(bits & ~clr_bits, vfe->base + reg);  in vfe_reg_clr()
237 static inline void vfe_reg_set(struct vfe_device *vfe, u32 reg, u32 set_bits)  in vfe_reg_set()  argument
239 	u32 bits = readl_relaxed(vfe->base + reg);  in vfe_reg_set()
241 	writel_relaxed(bits | set_bits, vfe->base + reg);  in vfe_reg_set()
244 static void vfe_global_reset(struct vfe_device *vfe)  in vfe_global_reset()  argument
256 	writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD);  in vfe_global_reset()
259 static void vfe_halt_request(struct vfe_device *vfe)  in vfe_halt_request()  argument
262 		       vfe->base + VFE_0_BUS_BDG_CMD);  in vfe_halt_request()
265 static void vfe_halt_clear(struct vfe_device *vfe)  in vfe_halt_clear()  argument
267 	writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD);  in vfe_halt_clear()
270 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)  in vfe_wm_enable()  argument
273 		vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm),  in vfe_wm_enable()
276 		vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm),  in vfe_wm_enable()
280 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable)  in vfe_wm_frame_based()  argument
283 		vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm),  in vfe_wm_frame_based()
286 		vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm),  in vfe_wm_frame_based()
303 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm,  in vfe_wm_line_based()  argument
319 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
328 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
331 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
333 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
338 static void vfe_wm_set_framedrop_period(struct vfe_device *vfe, u8 wm, u8 per)  in vfe_wm_set_framedrop_period()  argument
342 	reg = readl_relaxed(vfe->base +  in vfe_wm_set_framedrop_period()
351 		       vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm));  in vfe_wm_set_framedrop_period()
354 static void vfe_wm_set_framedrop_pattern(struct vfe_device *vfe, u8 wm,  in vfe_wm_set_framedrop_pattern()  argument
358 	       vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_FRAMEDROP_PATTERN(wm));  in vfe_wm_set_framedrop_pattern()
361 static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm,  in vfe_wm_set_ub_cfg()  argument
368 	writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm));  in vfe_wm_set_ub_cfg()
371 static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm)  in vfe_bus_reload_wm()  argument
374 	writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD);  in vfe_bus_reload_wm()
378 static void vfe_wm_set_ping_addr(struct vfe_device *vfe, u8 wm, u32 addr)  in vfe_wm_set_ping_addr()  argument
381 		       vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PING_ADDR(wm));  in vfe_wm_set_ping_addr()
384 static void vfe_wm_set_pong_addr(struct vfe_device *vfe, u8 wm, u32 addr)  in vfe_wm_set_pong_addr()  argument
387 		       vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PONG_ADDR(wm));  in vfe_wm_set_pong_addr()
390 static int vfe_wm_get_ping_pong_status(struct vfe_device *vfe, u8 wm)  in vfe_wm_get_ping_pong_status()  argument
394 	reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS);  in vfe_wm_get_ping_pong_status()
399 static void vfe_bus_enable_wr_if(struct vfe_device *vfe, u8 enable)  in vfe_bus_enable_wr_if()  argument
402 		writel_relaxed(0x10000009, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
404 		writel_relaxed(0, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
407 static void vfe_bus_connect_wm_to_rdi(struct vfe_device *vfe, u8 wm,  in vfe_bus_connect_wm_to_rdi()  argument
414 	vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), reg);  in vfe_bus_connect_wm_to_rdi()
419 	vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), reg);  in vfe_bus_connect_wm_to_rdi()
440 	vfe_reg_set(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg);  in vfe_bus_connect_wm_to_rdi()
443 static void vfe_wm_set_subsample(struct vfe_device *vfe, u8 wm)  in vfe_wm_set_subsample()  argument
446 		       vfe->base +  in vfe_wm_set_subsample()
450 static void vfe_bus_disconnect_wm_from_rdi(struct vfe_device *vfe, u8 wm,  in vfe_bus_disconnect_wm_from_rdi()  argument
456 	vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(0), reg);  in vfe_bus_disconnect_wm_from_rdi()
459 	vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), reg);  in vfe_bus_disconnect_wm_from_rdi()
480 	vfe_reg_clr(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg);  in vfe_bus_disconnect_wm_from_rdi()
483 static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output,  in vfe_set_xbar_cfg()  argument
508 			vfe_reg_set(vfe,  in vfe_set_xbar_cfg()
512 			vfe_reg_clr(vfe,  in vfe_set_xbar_cfg()
518 static void vfe_set_realign_cfg(struct vfe_device *vfe, struct vfe_line *line,  in vfe_set_realign_cfg()  argument
523 static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid)  in vfe_set_rdi_cid()  argument
525 	vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id),  in vfe_set_rdi_cid()
528 	vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id),  in vfe_set_rdi_cid()
532 static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)  in vfe_reg_update()  argument
534 	vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id);  in vfe_reg_update()
536 	writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE);  in vfe_reg_update()
540 static inline void vfe_reg_update_clear(struct vfe_device *vfe,  in vfe_reg_update_clear()  argument
543 	vfe->reg_update &= ~VFE_0_REG_UPDATE_line_n(line_id);  in vfe_reg_update_clear()
546 static void vfe_enable_irq_wm_line(struct vfe_device *vfe, u8 wm,  in vfe_enable_irq_wm_line()  argument
555 		vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0);  in vfe_enable_irq_wm_line()
556 		vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1);  in vfe_enable_irq_wm_line()
558 		vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0);  in vfe_enable_irq_wm_line()
559 		vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1);  in vfe_enable_irq_wm_line()
563 static void vfe_enable_irq_pix_line(struct vfe_device *vfe, u8 comp,  in vfe_enable_irq_pix_line()  argument
566 	struct vfe_output *output = &vfe->line[line_id].output;  in vfe_enable_irq_pix_line()
584 		vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0);  in vfe_enable_irq_pix_line()
585 		vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1);  in vfe_enable_irq_pix_line()
586 		vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask);  in vfe_enable_irq_pix_line()
588 		vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0);  in vfe_enable_irq_pix_line()
589 		vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1);  in vfe_enable_irq_pix_line()
590 		vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask);  in vfe_enable_irq_pix_line()
594 static void vfe_enable_irq_common(struct vfe_device *vfe)  in vfe_enable_irq_common()  argument
600 	vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0);  in vfe_enable_irq_common()
601 	vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1);  in vfe_enable_irq_common()
604 static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line)  in vfe_set_demux_cfg()  argument
608 	writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG);  in vfe_set_demux_cfg()
611 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0);  in vfe_set_demux_cfg()
614 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1);  in vfe_set_demux_cfg()
636 	writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG);  in vfe_set_demux_cfg()
637 	writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);  in vfe_set_demux_cfg()
640 static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line)  in vfe_set_scale_cfg()  argument
648 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG);  in vfe_set_scale_cfg()
653 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
658 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE);  in vfe_set_scale_cfg()
663 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
668 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE);  in vfe_set_scale_cfg()
670 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG);  in vfe_set_scale_cfg()
675 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
680 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE);  in vfe_set_scale_cfg()
687 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
692 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE);  in vfe_set_scale_cfg()
695 static void vfe_set_crop_cfg(struct vfe_device *vfe, struct vfe_line *line)  in vfe_set_crop_cfg()  argument
704 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH);  in vfe_set_crop_cfg()
709 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT);  in vfe_set_crop_cfg()
714 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH);  in vfe_set_crop_cfg()
723 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT);  in vfe_set_crop_cfg()
726 static void vfe_set_clamp_cfg(struct vfe_device *vfe)  in vfe_set_clamp_cfg()  argument
732 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG);  in vfe_set_clamp_cfg()
738 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG);  in vfe_set_clamp_cfg()
741 static void vfe_set_qos(struct vfe_device *vfe)  in vfe_set_qos()  argument
746 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0);  in vfe_set_qos()
747 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1);  in vfe_set_qos()
748 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2);  in vfe_set_qos()
749 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3);  in vfe_set_qos()
750 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4);  in vfe_set_qos()
751 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5);  in vfe_set_qos()
752 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6);  in vfe_set_qos()
753 	writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);  in vfe_set_qos()
756 static void vfe_set_ds(struct vfe_device *vfe)  in vfe_set_ds()  argument
761 static void vfe_set_cgc_override(struct vfe_device *vfe, u8 wm, u8 enable)  in vfe_set_cgc_override()  argument
766 		vfe_reg_set(vfe, VFE_0_CGC_OVERRIDE_1, val);  in vfe_set_cgc_override()
768 		vfe_reg_clr(vfe, VFE_0_CGC_OVERRIDE_1, val);  in vfe_set_cgc_override()
773 static void vfe_set_camif_cfg(struct vfe_device *vfe, struct vfe_line *line)  in vfe_set_camif_cfg()  argument
793 	writel_relaxed(val, vfe->base + VFE_0_CORE_CFG);  in vfe_set_camif_cfg()
797 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG);  in vfe_set_camif_cfg()
800 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG);  in vfe_set_camif_cfg()
803 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG);  in vfe_set_camif_cfg()
806 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG_0);  in vfe_set_camif_cfg()
809 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN);  in vfe_set_camif_cfg()
812 	vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), val);  in vfe_set_camif_cfg()
815 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG);  in vfe_set_camif_cfg()
818 static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable)  in vfe_set_camif_cmd()  argument
823 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
831 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
834 static void vfe_set_module_cfg(struct vfe_device *vfe, u8 enable)  in vfe_set_module_cfg()  argument
842 		writel_relaxed(val, vfe->base + VFE_0_MODULE_CFG);  in vfe_set_module_cfg()
844 		writel_relaxed(0x0, vfe->base + VFE_0_MODULE_CFG);  in vfe_set_module_cfg()
847 static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev)  in vfe_camif_wait_for_stop()  argument
852 	ret = readl_poll_timeout(vfe->base + VFE_0_CAMIF_STATUS,  in vfe_camif_wait_for_stop()
863 static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1)  in vfe_isr_read()  argument
865 	*value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);  in vfe_isr_read()
866 	*value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);  in vfe_isr_read()
868 	writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);  in vfe_isr_read()
869 	writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);  in vfe_isr_read()
872 	writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);  in vfe_isr_read()
875 static void vfe_violation_read(struct vfe_device *vfe)  in vfe_violation_read()  argument
877 	u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);  in vfe_violation_read()
891 	struct vfe_device *vfe = dev;  in vfe_isr()  local
895 	vfe->res->hw_ops->isr_read(vfe, &value0, &value1);  in vfe_isr()
897 	dev_dbg(vfe->camss->dev, "VFE: status0 = 0x%08x, status1 = 0x%08x\n",  in vfe_isr()
901 		vfe->isr_ops.reset_ack(vfe);  in vfe_isr()
904 		vfe->res->hw_ops->violation_read(vfe);  in vfe_isr()
907 		vfe->isr_ops.halt_ack(vfe);  in vfe_isr()
911 			vfe->isr_ops.reg_update(vfe, i);  in vfe_isr()
914 		vfe->isr_ops.sof(vfe, VFE_LINE_PIX);  in vfe_isr()
918 			vfe->isr_ops.sof(vfe, i);  in vfe_isr()
922 			vfe->isr_ops.comp_done(vfe, i);  in vfe_isr()
923 			for (j = 0; j < ARRAY_SIZE(vfe->wm_output_map); j++)  in vfe_isr()
924 				if (vfe->wm_output_map[j] == VFE_LINE_PIX)  in vfe_isr()
930 			vfe->isr_ops.wm_done(vfe, i);  in vfe_isr()
939 static void vfe_4_1_pm_domain_off(struct vfe_device *vfe)  in vfe_4_1_pm_domain_off()  argument
948 static int vfe_4_1_pm_domain_on(struct vfe_device *vfe)  in vfe_4_1_pm_domain_on()  argument
990 static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)  in vfe_subdev_init()  argument
992 	vfe->isr_ops = vfe_isr_ops_gen1;  in vfe_subdev_init()
993 	vfe->ops_gen1 = &vfe_ops_gen1_4_1;  in vfe_subdev_init()
994 	vfe->video_ops = vfe_video_ops_gen1;  in vfe_subdev_init()