Lines Matching +full:0 +full:x000007ff

13 #define HW_PXP_CTRL	(0x00000000)
14 #define HW_PXP_CTRL_SET	(0x00000004)
15 #define HW_PXP_CTRL_CLR	(0x00000008)
16 #define HW_PXP_CTRL_TOG	(0x0000000c)
18 #define BM_PXP_CTRL_SFTRST 0x80000000
21 #define BM_PXP_CTRL_CLKGATE 0x40000000
24 #define BM_PXP_CTRL_RSVD4 0x20000000
27 #define BM_PXP_CTRL_EN_REPEAT 0x10000000
30 #define BM_PXP_CTRL_ENABLE_ROTATE1 0x08000000
33 #define BM_PXP_CTRL_ENABLE_ROTATE0 0x04000000
36 #define BM_PXP_CTRL_ENABLE_LUT 0x02000000
39 #define BM_PXP_CTRL_ENABLE_CSC2 0x01000000
42 #define BM_PXP_CTRL_BLOCK_SIZE 0x00800000
45 #define BV_PXP_CTRL_BLOCK_SIZE__8X8   0x0
46 #define BV_PXP_CTRL_BLOCK_SIZE__16X16 0x1
47 #define BM_PXP_CTRL_RSVD1 0x00400000
50 #define BM_PXP_CTRL_ENABLE_ALPHA_B 0x00200000
53 #define BM_PXP_CTRL_ENABLE_INPUT_FETCH_STORE 0x00100000
56 #define BM_PXP_CTRL_ENABLE_WFE_B 0x00080000
59 #define BM_PXP_CTRL_ENABLE_WFE_A 0x00040000
62 #define BM_PXP_CTRL_ENABLE_DITHER 0x00020000
65 #define BM_PXP_CTRL_ENABLE_PS_AS_OUT 0x00010000
68 #define BM_PXP_CTRL_VFLIP1 0x00008000
71 #define BM_PXP_CTRL_HFLIP1 0x00004000
75 #define BM_PXP_CTRL_ROTATE1 0x00003000
78 #define BV_PXP_CTRL_ROTATE1__ROT_0   0x0
79 #define BV_PXP_CTRL_ROTATE1__ROT_90  0x1
80 #define BV_PXP_CTRL_ROTATE1__ROT_180 0x2
81 #define BV_PXP_CTRL_ROTATE1__ROT_270 0x3
82 #define BM_PXP_CTRL_VFLIP0 0x00000800
85 #define BM_PXP_CTRL_HFLIP0 0x00000400
89 #define BM_PXP_CTRL_ROTATE0 0x00000300
92 #define BV_PXP_CTRL_ROTATE0__ROT_0   0x0
93 #define BV_PXP_CTRL_ROTATE0__ROT_90  0x1
94 #define BV_PXP_CTRL_ROTATE0__ROT_180 0x2
95 #define BV_PXP_CTRL_ROTATE0__ROT_270 0x3
97 #define BM_PXP_CTRL_RSVD0 0x000000C0
100 #define BM_PXP_CTRL_HANDSHAKE_ABORT_SKIP 0x00000020
103 #define BM_PXP_CTRL_ENABLE_LCD0_HANDSHAKE 0x00000010
106 #define BM_PXP_CTRL_LUT_DMA_IRQ_ENABLE 0x00000008
109 #define BM_PXP_CTRL_NEXT_IRQ_ENABLE 0x00000004
112 #define BM_PXP_CTRL_IRQ_ENABLE 0x00000002
115 #define BM_PXP_CTRL_ENABLE 0x00000001
117 	(((v) << 0) & BM_PXP_CTRL_ENABLE)
119 #define HW_PXP_STAT	(0x00000010)
120 #define HW_PXP_STAT_SET	(0x00000014)
121 #define HW_PXP_STAT_CLR	(0x00000018)
122 #define HW_PXP_STAT_TOG	(0x0000001c)
125 #define BM_PXP_STAT_BLOCKX 0xFF000000
129 #define BM_PXP_STAT_BLOCKY 0x00FF0000
133 #define BM_PXP_STAT_AXI_ERROR_ID_1 0x0000F000
136 #define BM_PXP_STAT_RSVD2 0x00000800
139 #define BM_PXP_STAT_AXI_READ_ERROR_1 0x00000400
142 #define BM_PXP_STAT_AXI_WRITE_ERROR_1 0x00000200
145 #define BM_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ 0x00000100
149 #define BM_PXP_STAT_AXI_ERROR_ID_0 0x000000F0
152 #define BM_PXP_STAT_NEXT_IRQ 0x00000008
155 #define BM_PXP_STAT_AXI_READ_ERROR_0 0x00000004
158 #define BM_PXP_STAT_AXI_WRITE_ERROR_0 0x00000002
161 #define BM_PXP_STAT_IRQ0 0x00000001
163 	(((v) << 0) & BM_PXP_STAT_IRQ0)
165 #define HW_PXP_OUT_CTRL	(0x00000020)
166 #define HW_PXP_OUT_CTRL_SET	(0x00000024)
167 #define HW_PXP_OUT_CTRL_CLR	(0x00000028)
168 #define HW_PXP_OUT_CTRL_TOG	(0x0000002c)
171 #define BM_PXP_OUT_CTRL_ALPHA 0xFF000000
174 #define BM_PXP_OUT_CTRL_ALPHA_OUTPUT 0x00800000
178 #define BM_PXP_OUT_CTRL_RSVD1 0x007FFC00
182 #define BM_PXP_OUT_CTRL_INTERLACED_OUTPUT 0x00000300
185 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__PROGRESSIVE 0x0
186 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD0      0x1
187 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD1      0x2
188 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__INTERLACED  0x3
190 #define BM_PXP_OUT_CTRL_RSVD0 0x000000E0
193 #define BP_PXP_OUT_CTRL_FORMAT      0
194 #define BM_PXP_OUT_CTRL_FORMAT 0x0000001F
196 	(((v) << 0) & BM_PXP_OUT_CTRL_FORMAT)
197 #define BV_PXP_OUT_CTRL_FORMAT__ARGB8888  0x0
198 #define BV_PXP_OUT_CTRL_FORMAT__RGB888    0x4
199 #define BV_PXP_OUT_CTRL_FORMAT__RGB888P   0x5
200 #define BV_PXP_OUT_CTRL_FORMAT__ARGB1555  0x8
201 #define BV_PXP_OUT_CTRL_FORMAT__ARGB4444  0x9
202 #define BV_PXP_OUT_CTRL_FORMAT__RGB555    0xC
203 #define BV_PXP_OUT_CTRL_FORMAT__RGB444    0xD
204 #define BV_PXP_OUT_CTRL_FORMAT__RGB565    0xE
205 #define BV_PXP_OUT_CTRL_FORMAT__YUV1P444  0x10
206 #define BV_PXP_OUT_CTRL_FORMAT__UYVY1P422 0x12
207 #define BV_PXP_OUT_CTRL_FORMAT__VYUY1P422 0x13
208 #define BV_PXP_OUT_CTRL_FORMAT__Y8	0x14
209 #define BV_PXP_OUT_CTRL_FORMAT__Y4	0x15
210 #define BV_PXP_OUT_CTRL_FORMAT__YUV2P422  0x18
211 #define BV_PXP_OUT_CTRL_FORMAT__YUV2P420  0x19
212 #define BV_PXP_OUT_CTRL_FORMAT__YVU2P422  0x1A
213 #define BV_PXP_OUT_CTRL_FORMAT__YVU2P420  0x1B
215 #define HW_PXP_OUT_BUF	(0x00000030)
217 #define BP_PXP_OUT_BUF_ADDR      0
218 #define BM_PXP_OUT_BUF_ADDR 0xFFFFFFFF
221 #define HW_PXP_OUT_BUF2	(0x00000040)
223 #define BP_PXP_OUT_BUF2_ADDR      0
224 #define BM_PXP_OUT_BUF2_ADDR 0xFFFFFFFF
227 #define HW_PXP_OUT_PITCH	(0x00000050)
230 #define BM_PXP_OUT_PITCH_RSVD 0xFFFF0000
233 #define BP_PXP_OUT_PITCH_PITCH      0
234 #define BM_PXP_OUT_PITCH_PITCH 0x0000FFFF
236 	(((v) << 0) & BM_PXP_OUT_PITCH_PITCH)
238 #define HW_PXP_OUT_LRC	(0x00000060)
241 #define BM_PXP_OUT_LRC_RSVD1 0xC0000000
245 #define BM_PXP_OUT_LRC_X 0x3FFF0000
249 #define BM_PXP_OUT_LRC_RSVD0 0x0000C000
252 #define BP_PXP_OUT_LRC_Y      0
253 #define BM_PXP_OUT_LRC_Y 0x00003FFF
255 	(((v) << 0) & BM_PXP_OUT_LRC_Y)
257 #define HW_PXP_OUT_PS_ULC	(0x00000070)
260 #define BM_PXP_OUT_PS_ULC_RSVD1 0xC0000000
264 #define BM_PXP_OUT_PS_ULC_X 0x3FFF0000
268 #define BM_PXP_OUT_PS_ULC_RSVD0 0x0000C000
271 #define BP_PXP_OUT_PS_ULC_Y      0
272 #define BM_PXP_OUT_PS_ULC_Y 0x00003FFF
274 	(((v) << 0) & BM_PXP_OUT_PS_ULC_Y)
276 #define HW_PXP_OUT_PS_LRC	(0x00000080)
279 #define BM_PXP_OUT_PS_LRC_RSVD1 0xC0000000
283 #define BM_PXP_OUT_PS_LRC_X 0x3FFF0000
287 #define BM_PXP_OUT_PS_LRC_RSVD0 0x0000C000
290 #define BP_PXP_OUT_PS_LRC_Y      0
291 #define BM_PXP_OUT_PS_LRC_Y 0x00003FFF
293 	(((v) << 0) & BM_PXP_OUT_PS_LRC_Y)
295 #define HW_PXP_OUT_AS_ULC	(0x00000090)
298 #define BM_PXP_OUT_AS_ULC_RSVD1 0xC0000000
302 #define BM_PXP_OUT_AS_ULC_X 0x3FFF0000
306 #define BM_PXP_OUT_AS_ULC_RSVD0 0x0000C000
309 #define BP_PXP_OUT_AS_ULC_Y      0
310 #define BM_PXP_OUT_AS_ULC_Y 0x00003FFF
312 	(((v) << 0) & BM_PXP_OUT_AS_ULC_Y)
314 #define HW_PXP_OUT_AS_LRC	(0x000000a0)
317 #define BM_PXP_OUT_AS_LRC_RSVD1 0xC0000000
321 #define BM_PXP_OUT_AS_LRC_X 0x3FFF0000
325 #define BM_PXP_OUT_AS_LRC_RSVD0 0x0000C000
328 #define BP_PXP_OUT_AS_LRC_Y      0
329 #define BM_PXP_OUT_AS_LRC_Y 0x00003FFF
331 	(((v) << 0) & BM_PXP_OUT_AS_LRC_Y)
333 #define HW_PXP_PS_CTRL	(0x000000b0)
334 #define HW_PXP_PS_CTRL_SET	(0x000000b4)
335 #define HW_PXP_PS_CTRL_CLR	(0x000000b8)
336 #define HW_PXP_PS_CTRL_TOG	(0x000000bc)
339 #define BM_PXP_PS_CTRL_RSVD1 0xFFFFF000
343 #define BM_PXP_PS_CTRL_DECX 0x00000C00
346 #define BV_PXP_PS_CTRL_DECX__DISABLE 0x0
347 #define BV_PXP_PS_CTRL_DECX__DECX2   0x1
348 #define BV_PXP_PS_CTRL_DECX__DECX4   0x2
349 #define BV_PXP_PS_CTRL_DECX__DECX8   0x3
351 #define BM_PXP_PS_CTRL_DECY 0x00000300
354 #define BV_PXP_PS_CTRL_DECY__DISABLE 0x0
355 #define BV_PXP_PS_CTRL_DECY__DECY2   0x1
356 #define BV_PXP_PS_CTRL_DECY__DECY4   0x2
357 #define BV_PXP_PS_CTRL_DECY__DECY8   0x3
358 #define BM_PXP_PS_CTRL_RSVD0 0x00000080
361 #define BM_PXP_PS_CTRL_WB_SWAP 0x00000040
364 #define BP_PXP_PS_CTRL_FORMAT      0
365 #define BM_PXP_PS_CTRL_FORMAT 0x0000003F
367 	(((v) << 0) & BM_PXP_PS_CTRL_FORMAT)
368 #define BV_PXP_PS_CTRL_FORMAT__RGB888    0x4
369 #define BV_PXP_PS_CTRL_FORMAT__RGB555    0xC
370 #define BV_PXP_PS_CTRL_FORMAT__RGB444    0xD
371 #define BV_PXP_PS_CTRL_FORMAT__RGB565    0xE
372 #define BV_PXP_PS_CTRL_FORMAT__YUV1P444  0x10
373 #define BV_PXP_PS_CTRL_FORMAT__UYVY1P422 0x12
374 #define BV_PXP_PS_CTRL_FORMAT__VYUY1P422 0x13
375 #define BV_PXP_PS_CTRL_FORMAT__Y8	0x14
376 #define BV_PXP_PS_CTRL_FORMAT__Y4	0x15
377 #define BV_PXP_PS_CTRL_FORMAT__YUV2P422  0x18
378 #define BV_PXP_PS_CTRL_FORMAT__YUV2P420  0x19
379 #define BV_PXP_PS_CTRL_FORMAT__YVU2P422  0x1A
380 #define BV_PXP_PS_CTRL_FORMAT__YVU2P420  0x1B
381 #define BV_PXP_PS_CTRL_FORMAT__YUV422    0x1E
382 #define BV_PXP_PS_CTRL_FORMAT__YUV420    0x1F
384 #define HW_PXP_PS_BUF	(0x000000c0)
386 #define BP_PXP_PS_BUF_ADDR      0
387 #define BM_PXP_PS_BUF_ADDR 0xFFFFFFFF
390 #define HW_PXP_PS_UBUF	(0x000000d0)
392 #define BP_PXP_PS_UBUF_ADDR      0
393 #define BM_PXP_PS_UBUF_ADDR 0xFFFFFFFF
396 #define HW_PXP_PS_VBUF	(0x000000e0)
398 #define BP_PXP_PS_VBUF_ADDR      0
399 #define BM_PXP_PS_VBUF_ADDR 0xFFFFFFFF
402 #define HW_PXP_PS_PITCH	(0x000000f0)
405 #define BM_PXP_PS_PITCH_RSVD 0xFFFF0000
408 #define BP_PXP_PS_PITCH_PITCH      0
409 #define BM_PXP_PS_PITCH_PITCH 0x0000FFFF
411 	(((v) << 0) & BM_PXP_PS_PITCH_PITCH)
413 #define HW_PXP_PS_BACKGROUND_0	(0x00000100)
416 #define BM_PXP_PS_BACKGROUND_0_RSVD 0xFF000000
419 #define BP_PXP_PS_BACKGROUND_0_COLOR      0
420 #define BM_PXP_PS_BACKGROUND_0_COLOR 0x00FFFFFF
422 	(((v) << 0) & BM_PXP_PS_BACKGROUND_0_COLOR)
424 #define HW_PXP_PS_SCALE	(0x00000110)
426 #define BM_PXP_PS_SCALE_RSVD2 0x80000000
430 #define BM_PXP_PS_SCALE_YSCALE 0x7FFF0000
433 #define BM_PXP_PS_SCALE_RSVD1 0x00008000
436 #define BP_PXP_PS_SCALE_XSCALE      0
437 #define BM_PXP_PS_SCALE_XSCALE 0x00007FFF
439 	(((v) << 0) & BM_PXP_PS_SCALE_XSCALE)
441 #define HW_PXP_PS_OFFSET	(0x00000120)
444 #define BM_PXP_PS_OFFSET_RSVD2 0xF0000000
448 #define BM_PXP_PS_OFFSET_YOFFSET 0x0FFF0000
452 #define BM_PXP_PS_OFFSET_RSVD1 0x0000F000
455 #define BP_PXP_PS_OFFSET_XOFFSET      0
456 #define BM_PXP_PS_OFFSET_XOFFSET 0x00000FFF
458 	(((v) << 0) & BM_PXP_PS_OFFSET_XOFFSET)
460 #define HW_PXP_PS_CLRKEYLOW_0	(0x00000130)
463 #define BM_PXP_PS_CLRKEYLOW_0_RSVD1 0xFF000000
466 #define BP_PXP_PS_CLRKEYLOW_0_PIXEL      0
467 #define BM_PXP_PS_CLRKEYLOW_0_PIXEL 0x00FFFFFF
469 	(((v) << 0) & BM_PXP_PS_CLRKEYLOW_0_PIXEL)
471 #define HW_PXP_PS_CLRKEYHIGH_0	(0x00000140)
474 #define BM_PXP_PS_CLRKEYHIGH_0_RSVD1 0xFF000000
477 #define BP_PXP_PS_CLRKEYHIGH_0_PIXEL      0
478 #define BM_PXP_PS_CLRKEYHIGH_0_PIXEL 0x00FFFFFF
480 	(((v) << 0) & BM_PXP_PS_CLRKEYHIGH_0_PIXEL)
482 #define HW_PXP_AS_CTRL	(0x00000150)
485 #define BM_PXP_AS_CTRL_RSVD1 0xFFC00000
488 #define BM_PXP_AS_CTRL_ALPHA1_INVERT 0x00200000
491 #define BM_PXP_AS_CTRL_ALPHA0_INVERT 0x00100000
495 #define BM_PXP_AS_CTRL_ROP 0x000F0000
498 #define BV_PXP_AS_CTRL_ROP__MASKAS     0x0
499 #define BV_PXP_AS_CTRL_ROP__MASKNOTAS  0x1
500 #define BV_PXP_AS_CTRL_ROP__MASKASNOT  0x2
501 #define BV_PXP_AS_CTRL_ROP__MERGEAS    0x3
502 #define BV_PXP_AS_CTRL_ROP__MERGENOTAS 0x4
503 #define BV_PXP_AS_CTRL_ROP__MERGEASNOT 0x5
504 #define BV_PXP_AS_CTRL_ROP__NOTCOPYAS  0x6
505 #define BV_PXP_AS_CTRL_ROP__NOT	0x7
506 #define BV_PXP_AS_CTRL_ROP__NOTMASKAS  0x8
507 #define BV_PXP_AS_CTRL_ROP__NOTMERGEAS 0x9
508 #define BV_PXP_AS_CTRL_ROP__XORAS      0xA
509 #define BV_PXP_AS_CTRL_ROP__NOTXORAS   0xB
511 #define BM_PXP_AS_CTRL_ALPHA 0x0000FF00
515 #define BM_PXP_AS_CTRL_FORMAT 0x000000F0
518 #define BV_PXP_AS_CTRL_FORMAT__ARGB8888 0x0
519 #define BV_PXP_AS_CTRL_FORMAT__RGBA8888 0x1
520 #define BV_PXP_AS_CTRL_FORMAT__RGB888   0x4
521 #define BV_PXP_AS_CTRL_FORMAT__ARGB1555 0x8
522 #define BV_PXP_AS_CTRL_FORMAT__ARGB4444 0x9
523 #define BV_PXP_AS_CTRL_FORMAT__RGB555   0xC
524 #define BV_PXP_AS_CTRL_FORMAT__RGB444   0xD
525 #define BV_PXP_AS_CTRL_FORMAT__RGB565   0xE
526 #define BM_PXP_AS_CTRL_ENABLE_COLORKEY 0x00000008
530 #define BM_PXP_AS_CTRL_ALPHA_CTRL 0x00000006
533 #define BV_PXP_AS_CTRL_ALPHA_CTRL__Embedded 0x0
534 #define BV_PXP_AS_CTRL_ALPHA_CTRL__Override 0x1
535 #define BV_PXP_AS_CTRL_ALPHA_CTRL__Multiply 0x2
536 #define BV_PXP_AS_CTRL_ALPHA_CTRL__ROPs     0x3
537 #define BM_PXP_AS_CTRL_RSVD0 0x00000001
539 	(((v) << 0) & BM_PXP_AS_CTRL_RSVD0)
541 #define HW_PXP_AS_BUF	(0x00000160)
543 #define BP_PXP_AS_BUF_ADDR      0
544 #define BM_PXP_AS_BUF_ADDR 0xFFFFFFFF
547 #define HW_PXP_AS_PITCH	(0x00000170)
550 #define BM_PXP_AS_PITCH_RSVD 0xFFFF0000
553 #define BP_PXP_AS_PITCH_PITCH      0
554 #define BM_PXP_AS_PITCH_PITCH 0x0000FFFF
556 	(((v) << 0) & BM_PXP_AS_PITCH_PITCH)
558 #define HW_PXP_AS_CLRKEYLOW_0	(0x00000180)
561 #define BM_PXP_AS_CLRKEYLOW_0_RSVD1 0xFF000000
564 #define BP_PXP_AS_CLRKEYLOW_0_PIXEL      0
565 #define BM_PXP_AS_CLRKEYLOW_0_PIXEL 0x00FFFFFF
567 	(((v) << 0) & BM_PXP_AS_CLRKEYLOW_0_PIXEL)
569 #define HW_PXP_AS_CLRKEYHIGH_0	(0x00000190)
572 #define BM_PXP_AS_CLRKEYHIGH_0_RSVD1 0xFF000000
575 #define BP_PXP_AS_CLRKEYHIGH_0_PIXEL      0
576 #define BM_PXP_AS_CLRKEYHIGH_0_PIXEL 0x00FFFFFF
578 	(((v) << 0) & BM_PXP_AS_CLRKEYHIGH_0_PIXEL)
580 #define HW_PXP_CSC1_COEF0	(0x000001a0)
582 #define BM_PXP_CSC1_COEF0_YCBCR_MODE 0x80000000
585 #define BM_PXP_CSC1_COEF0_BYPASS 0x40000000
588 #define BM_PXP_CSC1_COEF0_RSVD1 0x20000000
592 #define BM_PXP_CSC1_COEF0_C0 0x1FFC0000
596 #define BM_PXP_CSC1_COEF0_UV_OFFSET 0x0003FE00
604 #define BP_PXP_CSC1_COEF0_Y_OFFSET      0
605 #define BM_PXP_CSC1_COEF0_Y_OFFSET 0x000001FF
609 #define HW_PXP_CSC1_COEF1	(0x000001b0)
612 #define BM_PXP_CSC1_COEF1_RSVD1 0xF8000000
616 #define BM_PXP_CSC1_COEF1_C1 0x07FF0000
620 #define BM_PXP_CSC1_COEF1_RSVD0 0x0000F800
623 #define BP_PXP_CSC1_COEF1_C4      0
624 #define BM_PXP_CSC1_COEF1_C4 0x000007FF
626 	(((v) << 0) & BM_PXP_CSC1_COEF1_C4)
628 #define HW_PXP_CSC1_COEF2	(0x000001c0)
631 #define BM_PXP_CSC1_COEF2_RSVD1 0xF8000000
635 #define BM_PXP_CSC1_COEF2_C2 0x07FF0000
639 #define BM_PXP_CSC1_COEF2_RSVD0 0x0000F800
642 #define BP_PXP_CSC1_COEF2_C3      0
643 #define BM_PXP_CSC1_COEF2_C3 0x000007FF
645 	(((v) << 0) & BM_PXP_CSC1_COEF2_C3)
647 #define HW_PXP_CSC2_CTRL	(0x000001d0)
650 #define BM_PXP_CSC2_CTRL_RSVD 0xFFFFFFF8
654 #define BM_PXP_CSC2_CTRL_CSC_MODE 0x00000006
657 #define BV_PXP_CSC2_CTRL_CSC_MODE__YUV2RGB   0x0
658 #define BV_PXP_CSC2_CTRL_CSC_MODE__YCbCr2RGB 0x1
659 #define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YUV   0x2
660 #define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YCbCr 0x3
661 #define BM_PXP_CSC2_CTRL_BYPASS 0x00000001
663 	(((v) << 0) & BM_PXP_CSC2_CTRL_BYPASS)
665 #define HW_PXP_CSC2_COEF0	(0x000001e0)
668 #define BM_PXP_CSC2_COEF0_RSVD1 0xF8000000
672 #define BM_PXP_CSC2_COEF0_A2 0x07FF0000
676 #define BM_PXP_CSC2_COEF0_RSVD0 0x0000F800
679 #define BP_PXP_CSC2_COEF0_A1      0
680 #define BM_PXP_CSC2_COEF0_A1 0x000007FF
682 	(((v) << 0) & BM_PXP_CSC2_COEF0_A1)
684 #define HW_PXP_CSC2_COEF1	(0x000001f0)
687 #define BM_PXP_CSC2_COEF1_RSVD1 0xF8000000
691 #define BM_PXP_CSC2_COEF1_B1 0x07FF0000
695 #define BM_PXP_CSC2_COEF1_RSVD0 0x0000F800
698 #define BP_PXP_CSC2_COEF1_A3      0
699 #define BM_PXP_CSC2_COEF1_A3 0x000007FF
701 	(((v) << 0) & BM_PXP_CSC2_COEF1_A3)
703 #define HW_PXP_CSC2_COEF2	(0x00000200)
706 #define BM_PXP_CSC2_COEF2_RSVD1 0xF8000000
710 #define BM_PXP_CSC2_COEF2_B3 0x07FF0000
714 #define BM_PXP_CSC2_COEF2_RSVD0 0x0000F800
717 #define BP_PXP_CSC2_COEF2_B2      0
718 #define BM_PXP_CSC2_COEF2_B2 0x000007FF
720 	(((v) << 0) & BM_PXP_CSC2_COEF2_B2)
722 #define HW_PXP_CSC2_COEF3	(0x00000210)
725 #define BM_PXP_CSC2_COEF3_RSVD1 0xF8000000
729 #define BM_PXP_CSC2_COEF3_C2 0x07FF0000
733 #define BM_PXP_CSC2_COEF3_RSVD0 0x0000F800
736 #define BP_PXP_CSC2_COEF3_C1      0
737 #define BM_PXP_CSC2_COEF3_C1 0x000007FF
739 	(((v) << 0) & BM_PXP_CSC2_COEF3_C1)
741 #define HW_PXP_CSC2_COEF4	(0x00000220)
744 #define BM_PXP_CSC2_COEF4_RSVD1 0xFE000000
748 #define BM_PXP_CSC2_COEF4_D1 0x01FF0000
752 #define BM_PXP_CSC2_COEF4_RSVD0 0x0000F800
755 #define BP_PXP_CSC2_COEF4_C3      0
756 #define BM_PXP_CSC2_COEF4_C3 0x000007FF
758 	(((v) << 0) & BM_PXP_CSC2_COEF4_C3)
760 #define HW_PXP_CSC2_COEF5	(0x00000230)
763 #define BM_PXP_CSC2_COEF5_RSVD1 0xFE000000
767 #define BM_PXP_CSC2_COEF5_D3 0x01FF0000
771 #define BM_PXP_CSC2_COEF5_RSVD0 0x0000FE00
774 #define BP_PXP_CSC2_COEF5_D2      0
775 #define BM_PXP_CSC2_COEF5_D2 0x000001FF
777 	(((v) << 0) & BM_PXP_CSC2_COEF5_D2)
779 #define HW_PXP_LUT_CTRL	(0x00000240)
781 #define BM_PXP_LUT_CTRL_BYPASS 0x80000000
785 #define BM_PXP_LUT_CTRL_RSVD3 0x7C000000
789 #define BM_PXP_LUT_CTRL_LOOKUP_MODE 0x03000000
792 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__CACHE_RGB565  0x0
793 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8     0x1
794 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB444 0x2
795 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB454 0x3
797 #define BM_PXP_LUT_CTRL_RSVD2 0x00FC0000
801 #define BM_PXP_LUT_CTRL_OUT_MODE 0x00030000
804 #define BV_PXP_LUT_CTRL_OUT_MODE__RESERVED    0x0
805 #define BV_PXP_LUT_CTRL_OUT_MODE__Y8	  0x1
806 #define BV_PXP_LUT_CTRL_OUT_MODE__RGBW4444CFA 0x2
807 #define BV_PXP_LUT_CTRL_OUT_MODE__RGB888      0x3
809 #define BM_PXP_LUT_CTRL_RSVD1 0x0000F800
812 #define BM_PXP_LUT_CTRL_SEL_8KB 0x00000400
815 #define BM_PXP_LUT_CTRL_LRU_UPD 0x00000200
818 #define BM_PXP_LUT_CTRL_INVALID 0x00000100
822 #define BM_PXP_LUT_CTRL_RSVD0 0x000000FE
825 #define BM_PXP_LUT_CTRL_DMA_START 0x00000001
827 	(((v) << 0) & BM_PXP_LUT_CTRL_DMA_START)
829 #define HW_PXP_LUT_ADDR	(0x00000250)
831 #define BM_PXP_LUT_ADDR_RSVD2 0x80000000
835 #define BM_PXP_LUT_ADDR_NUM_BYTES 0x7FFF0000
839 #define BM_PXP_LUT_ADDR_RSVD1 0x0000C000
842 #define BP_PXP_LUT_ADDR_ADDR      0
843 #define BM_PXP_LUT_ADDR_ADDR 0x00003FFF
845 	(((v) << 0) & BM_PXP_LUT_ADDR_ADDR)
847 #define HW_PXP_LUT_DATA	(0x00000260)
849 #define BP_PXP_LUT_DATA_DATA      0
850 #define BM_PXP_LUT_DATA_DATA 0xFFFFFFFF
853 #define HW_PXP_LUT_EXTMEM	(0x00000270)
855 #define BP_PXP_LUT_EXTMEM_ADDR      0
856 #define BM_PXP_LUT_EXTMEM_ADDR 0xFFFFFFFF
859 #define HW_PXP_CFA	(0x00000280)
861 #define BP_PXP_CFA_DATA      0
862 #define BM_PXP_CFA_DATA 0xFFFFFFFF
865 #define HW_PXP_ALPHA_A_CTRL	(0x00000290)
868 #define BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA 0xFF000000
872 #define BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA 0x00FF0000
876 #define BM_PXP_ALPHA_A_CTRL_RSVD0 0x0000C000
879 #define BM_PXP_ALPHA_A_CTRL_S1_COLOR_MODE 0x00002000
882 #define BV_PXP_ALPHA_A_CTRL_S1_COLOR_MODE__0 0x0
883 #define BV_PXP_ALPHA_A_CTRL_S1_COLOR_MODE__1 0x1
884 #define BM_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE 0x00001000
887 #define BV_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE__0 0x0
888 #define BV_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE__1 0x1
890 #define BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE 0x00000C00
893 #define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__0 0x0
894 #define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__1 0x0
895 #define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__2 0x0
896 #define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__3 0x0
898 #define BM_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE 0x00000300
901 #define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__0 0x0
902 #define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__1 0x1
903 #define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__2 0x2
904 #define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__3 0x3
905 #define BM_PXP_ALPHA_A_CTRL_RSVD1 0x00000080
908 #define BM_PXP_ALPHA_A_CTRL_S0_COLOR_MODE 0x00000040
911 #define BV_PXP_ALPHA_A_CTRL_S0_COLOR_MODE__0 0x0
912 #define BV_PXP_ALPHA_A_CTRL_S0_COLOR_MODE__1 0x1
913 #define BM_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE 0x00000020
916 #define BV_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE__0 0x0
917 #define BV_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE__1 0x1
919 #define BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE 0x00000018
922 #define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__0 0x0
923 #define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__1 0x1
924 #define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__2 0x2
925 #define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__3 0x3
927 #define BM_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE 0x00000006
930 #define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__0 0x0
931 #define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__1 0x1
932 #define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__2 0x2
933 #define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__3 0x3
934 #define BM_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE 0x00000001
936 	(((v) << 0) & BM_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE)
937 #define BV_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE__0 0x0
938 #define BV_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE__1 0x1
940 #define HW_PXP_ALPHA_B_CTRL	(0x000002a0)
943 #define BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA 0xFF000000
947 #define BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA 0x00FF0000
951 #define BM_PXP_ALPHA_B_CTRL_RSVD0 0x0000C000
954 #define BM_PXP_ALPHA_B_CTRL_S1_COLOR_MODE 0x00002000
957 #define BV_PXP_ALPHA_B_CTRL_S1_COLOR_MODE__0 0x0
958 #define BV_PXP_ALPHA_B_CTRL_S1_COLOR_MODE__1 0x1
959 #define BM_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE 0x00001000
962 #define BV_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE__0 0x0
963 #define BV_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE__1 0x1
965 #define BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE 0x00000C00
968 #define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__0 0x0
969 #define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__1 0x1
970 #define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__2 0x2
971 #define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__3 0x3
973 #define BM_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE 0x00000300
976 #define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__0 0x0
977 #define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__1 0x1
978 #define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__2 0x2
979 #define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__3 0x3
980 #define BM_PXP_ALPHA_B_CTRL_RSVD1 0x00000080
983 #define BM_PXP_ALPHA_B_CTRL_S0_COLOR_MODE 0x00000040
986 #define BV_PXP_ALPHA_B_CTRL_S0_COLOR_MODE__0 0x0
987 #define BV_PXP_ALPHA_B_CTRL_S0_COLOR_MODE__1 0x1
988 #define BM_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE 0x00000020
991 #define BV_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE__0 0x0
992 #define BV_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE__1 0x1
994 #define BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE 0x00000018
997 #define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__0 0x0
998 #define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__1 0x1
999 #define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__2 0x2
1000 #define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__3 0x3
1002 #define BM_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE 0x00000006
1005 #define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__0 0x0
1006 #define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__1 0x1
1007 #define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__2 0x2
1008 #define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__3 0x3
1009 #define BM_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE 0x00000001
1011 	(((v) << 0) & BM_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE)
1012 #define BV_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE__0 0x0
1013 #define BV_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE__1 0x1
1015 #define HW_PXP_ALPHA_B_CTRL_1	(0x000002b0)
1018 #define BM_PXP_ALPHA_B_CTRL_1_RSVD0 0xFFFFFF00
1022 #define BM_PXP_ALPHA_B_CTRL_1_ROP 0x000000F0
1025 #define BV_PXP_ALPHA_B_CTRL_1_ROP__MASKAS     0x0
1026 #define BV_PXP_ALPHA_B_CTRL_1_ROP__MASKNOTAS  0x1
1027 #define BV_PXP_ALPHA_B_CTRL_1_ROP__MASKASNOT  0x2
1028 #define BV_PXP_ALPHA_B_CTRL_1_ROP__MERGEAS    0x3
1029 #define BV_PXP_ALPHA_B_CTRL_1_ROP__MERGENOTAS 0x4
1030 #define BV_PXP_ALPHA_B_CTRL_1_ROP__MERGEASNOT 0x5
1031 #define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTCOPYAS  0x6
1032 #define BV_PXP_ALPHA_B_CTRL_1_ROP__NOT	0x7
1033 #define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTMASKAS  0x8
1034 #define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTMERGEAS 0x9
1035 #define BV_PXP_ALPHA_B_CTRL_1_ROP__XORAS      0xA
1036 #define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTXORAS   0xB
1038 #define BM_PXP_ALPHA_B_CTRL_1_RSVD1 0x0000000C
1041 #define BM_PXP_ALPHA_B_CTRL_1_OL_CLRKEY_ENABLE 0x00000002
1044 #define BM_PXP_ALPHA_B_CTRL_1_ROP_ENABLE 0x00000001
1046 	(((v) << 0) & BM_PXP_ALPHA_B_CTRL_1_ROP_ENABLE)
1048 #define HW_PXP_PS_BACKGROUND_1	(0x000002c0)
1051 #define BM_PXP_PS_BACKGROUND_1_RSVD 0xFF000000
1054 #define BP_PXP_PS_BACKGROUND_1_COLOR      0
1055 #define BM_PXP_PS_BACKGROUND_1_COLOR 0x00FFFFFF
1057 	(((v) << 0) & BM_PXP_PS_BACKGROUND_1_COLOR)
1059 #define HW_PXP_PS_CLRKEYLOW_1	(0x000002d0)
1062 #define BM_PXP_PS_CLRKEYLOW_1_RSVD1 0xFF000000
1065 #define BP_PXP_PS_CLRKEYLOW_1_PIXEL      0
1066 #define BM_PXP_PS_CLRKEYLOW_1_PIXEL 0x00FFFFFF
1068 	(((v) << 0) & BM_PXP_PS_CLRKEYLOW_1_PIXEL)
1070 #define HW_PXP_PS_CLRKEYHIGH_1	(0x000002e0)
1073 #define BM_PXP_PS_CLRKEYHIGH_1_RSVD1 0xFF000000
1076 #define BP_PXP_PS_CLRKEYHIGH_1_PIXEL      0
1077 #define BM_PXP_PS_CLRKEYHIGH_1_PIXEL 0x00FFFFFF
1079 	(((v) << 0) & BM_PXP_PS_CLRKEYHIGH_1_PIXEL)
1081 #define HW_PXP_AS_CLRKEYLOW_1	(0x000002f0)
1084 #define BM_PXP_AS_CLRKEYLOW_1_RSVD1 0xFF000000
1087 #define BP_PXP_AS_CLRKEYLOW_1_PIXEL      0
1088 #define BM_PXP_AS_CLRKEYLOW_1_PIXEL 0x00FFFFFF
1090 	(((v) << 0) & BM_PXP_AS_CLRKEYLOW_1_PIXEL)
1092 #define HW_PXP_AS_CLRKEYHIGH_1	(0x00000300)
1095 #define BM_PXP_AS_CLRKEYHIGH_1_RSVD1 0xFF000000
1098 #define BP_PXP_AS_CLRKEYHIGH_1_PIXEL      0
1099 #define BM_PXP_AS_CLRKEYHIGH_1_PIXEL 0x00FFFFFF
1101 	(((v) << 0) & BM_PXP_AS_CLRKEYHIGH_1_PIXEL)
1103 #define HW_PXP_CTRL2	(0x00000310)
1104 #define HW_PXP_CTRL2_SET	(0x00000314)
1105 #define HW_PXP_CTRL2_CLR	(0x00000318)
1106 #define HW_PXP_CTRL2_TOG	(0x0000031c)
1109 #define BM_PXP_CTRL2_RSVD3 0xF0000000
1112 #define BM_PXP_CTRL2_ENABLE_ROTATE1 0x08000000
1115 #define BM_PXP_CTRL2_ENABLE_ROTATE0 0x04000000
1118 #define BM_PXP_CTRL2_ENABLE_LUT 0x02000000
1121 #define BM_PXP_CTRL2_ENABLE_CSC2 0x01000000
1124 #define BM_PXP_CTRL2_BLOCK_SIZE 0x00800000
1127 #define BV_PXP_CTRL2_BLOCK_SIZE__8X8   0x0
1128 #define BV_PXP_CTRL2_BLOCK_SIZE__16X16 0x1
1129 #define BM_PXP_CTRL2_RSVD2 0x00400000
1132 #define BM_PXP_CTRL2_ENABLE_ALPHA_B 0x00200000
1135 #define BM_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE 0x00100000
1138 #define BM_PXP_CTRL2_ENABLE_WFE_B 0x00080000
1141 #define BM_PXP_CTRL2_ENABLE_WFE_A 0x00040000
1144 #define BM_PXP_CTRL2_ENABLE_DITHER 0x00020000
1147 #define BM_PXP_CTRL2_RSVD1 0x00010000
1150 #define BM_PXP_CTRL2_VFLIP1 0x00008000
1153 #define BM_PXP_CTRL2_HFLIP1 0x00004000
1157 #define BM_PXP_CTRL2_ROTATE1 0x00003000
1160 #define BV_PXP_CTRL2_ROTATE1__ROT_0   0x0
1161 #define BV_PXP_CTRL2_ROTATE1__ROT_90  0x1
1162 #define BV_PXP_CTRL2_ROTATE1__ROT_180 0x2
1163 #define BV_PXP_CTRL2_ROTATE1__ROT_270 0x3
1164 #define BM_PXP_CTRL2_VFLIP0 0x00000800
1167 #define BM_PXP_CTRL2_HFLIP0 0x00000400
1171 #define BM_PXP_CTRL2_ROTATE0 0x00000300
1174 #define BV_PXP_CTRL2_ROTATE0__ROT_0   0x0
1175 #define BV_PXP_CTRL2_ROTATE0__ROT_90  0x1
1176 #define BV_PXP_CTRL2_ROTATE0__ROT_180 0x2
1177 #define BV_PXP_CTRL2_ROTATE0__ROT_270 0x3
1179 #define BM_PXP_CTRL2_RSVD0 0x000000FE
1182 #define BM_PXP_CTRL2_ENABLE 0x00000001
1184 	(((v) << 0) & BM_PXP_CTRL2_ENABLE)
1186 #define HW_PXP_POWER_REG0	(0x00000320)
1189 #define BM_PXP_POWER_REG0_CTRL 0xFFFFF000
1193 #define BM_PXP_POWER_REG0_ROT0_MEM_LP_STATE 0x00000E00
1196 #define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__NONE 0x0
1197 #define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__LS   0x1
1198 #define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__DS   0x2
1199 #define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__SD   0x4
1201 #define BM_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN 0x000001C0
1204 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__NONE 0x0
1205 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__LS   0x1
1206 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__DS   0x2
1207 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__SD   0x4
1209 #define BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN 0x00000038
1212 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__NONE 0x0
1213 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__LS   0x1
1214 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__DS   0x2
1215 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__SD   0x4
1216 #define BP_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0      0
1217 #define BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0 0x00000007
1219 	(((v) << 0) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0)
1220 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__NONE 0x0
1221 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__LS   0x1
1222 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__DS   0x2
1223 #define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__SD   0x4
1225 #define HW_PXP_POWER_REG1	(0x00000330)
1228 #define BM_PXP_POWER_REG1_RSVD0 0xFF000000
1232 #define BM_PXP_POWER_REG1_ALU_B_MEM_LP_STATE 0x00E00000
1235 #define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__NONE 0x0
1236 #define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__LS   0x1
1237 #define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__DS   0x2
1238 #define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__SD   0x4
1240 #define BM_PXP_POWER_REG1_ALU_A_MEM_LP_STATE 0x001C0000
1243 #define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__NONE 0x0
1244 #define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__LS   0x1
1245 #define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__DS   0x2
1246 #define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__SD   0x4
1248 #define BM_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE 0x00038000
1251 #define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__NONE 0x0
1252 #define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__LS   0x1
1253 #define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__DS   0x2
1254 #define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__SD   0x4
1256 #define BM_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE 0x00007000
1259 #define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__NONE 0x0
1260 #define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__LS   0x1
1261 #define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__DS   0x2
1262 #define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__SD   0x4
1264 #define BM_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE 0x00000E00
1267 #define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__NONE 0x0
1268 #define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__LS   0x1
1269 #define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__DS   0x2
1270 #define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__SD   0x4
1272 #define BM_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE 0x000001C0
1275 #define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__NONE 0x0
1276 #define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__LS   0x1
1277 #define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__DS   0x2
1278 #define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__SD   0x4
1280 #define BM_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE 0x00000038
1283 #define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__NONE 0x0
1284 #define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__LS   0x1
1285 #define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__DS   0x2
1286 #define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__SD   0x4
1287 #define BP_PXP_POWER_REG1_ROT1_MEM_LP_STATE      0
1288 #define BM_PXP_POWER_REG1_ROT1_MEM_LP_STATE 0x00000007
1290 	(((v) << 0) & BM_PXP_POWER_REG1_ROT1_MEM_LP_STATE)
1291 #define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__NONE 0x0
1292 #define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__LS   0x1
1293 #define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__DS   0x2
1294 #define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__SD   0x4
1296 #define HW_PXP_DATA_PATH_CTRL0	(0x00000340)
1297 #define HW_PXP_DATA_PATH_CTRL0_SET	(0x00000344)
1298 #define HW_PXP_DATA_PATH_CTRL0_CLR	(0x00000348)
1299 #define HW_PXP_DATA_PATH_CTRL0_TOG	(0x0000034c)
1302 #define BM_PXP_DATA_PATH_CTRL0_MUX15_SEL 0xC0000000
1305 #define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__0 0x0
1306 #define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__1 0x1
1307 #define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__2 0x2
1308 #define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__3 0x3
1310 #define BM_PXP_DATA_PATH_CTRL0_MUX14_SEL 0x30000000
1313 #define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__0 0x0
1314 #define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__1 0x1
1315 #define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__2 0x2
1316 #define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__3 0x3
1318 #define BM_PXP_DATA_PATH_CTRL0_MUX13_SEL 0x0C000000
1321 #define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__0 0x0
1322 #define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__1 0x1
1323 #define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__2 0x2
1324 #define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__3 0x3
1326 #define BM_PXP_DATA_PATH_CTRL0_MUX12_SEL 0x03000000
1329 #define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__0 0x0
1330 #define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__1 0x1
1331 #define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__2 0x2
1332 #define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__3 0x3
1334 #define BM_PXP_DATA_PATH_CTRL0_MUX11_SEL 0x00C00000
1337 #define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__0 0x0
1338 #define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__1 0x1
1339 #define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__2 0x2
1340 #define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__3 0x3
1342 #define BM_PXP_DATA_PATH_CTRL0_MUX10_SEL 0x00300000
1345 #define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__0 0x0
1346 #define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__1 0x1
1347 #define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__2 0x2
1348 #define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__3 0x3
1350 #define BM_PXP_DATA_PATH_CTRL0_MUX9_SEL 0x000C0000
1353 #define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__0 0x0
1354 #define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__1 0x1
1355 #define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__2 0x2
1356 #define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__3 0x3
1358 #define BM_PXP_DATA_PATH_CTRL0_MUX8_SEL 0x00030000
1361 #define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__0 0x0
1362 #define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__1 0x1
1363 #define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__2 0x2
1364 #define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__3 0x3
1366 #define BM_PXP_DATA_PATH_CTRL0_MUX7_SEL 0x0000C000
1369 #define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__0 0x0
1370 #define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__1 0x1
1371 #define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__2 0x2
1372 #define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__3 0x3
1374 #define BM_PXP_DATA_PATH_CTRL0_MUX6_SEL 0x00003000
1377 #define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__0 0x0
1378 #define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__1 0x1
1379 #define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__2 0x2
1380 #define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__3 0x3
1382 #define BM_PXP_DATA_PATH_CTRL0_MUX5_SEL 0x00000C00
1385 #define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__0 0x0
1386 #define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__1 0x1
1387 #define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__2 0x2
1388 #define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__3 0x3
1390 #define BM_PXP_DATA_PATH_CTRL0_MUX4_SEL 0x00000300
1393 #define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__0 0x0
1394 #define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__1 0x1
1395 #define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__2 0x2
1396 #define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__3 0x3
1398 #define BM_PXP_DATA_PATH_CTRL0_MUX3_SEL 0x000000C0
1401 #define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__0 0x0
1402 #define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__1 0x1
1403 #define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__2 0x2
1404 #define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__3 0x3
1406 #define BM_PXP_DATA_PATH_CTRL0_MUX2_SEL 0x00000030
1409 #define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__0 0x0
1410 #define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__1 0x1
1411 #define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__2 0x2
1412 #define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__3 0x3
1414 #define BM_PXP_DATA_PATH_CTRL0_MUX1_SEL 0x0000000C
1417 #define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__0 0x0
1418 #define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__1 0x1
1419 #define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__2 0x2
1420 #define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__3 0x3
1421 #define BP_PXP_DATA_PATH_CTRL0_MUX0_SEL      0
1422 #define BM_PXP_DATA_PATH_CTRL0_MUX0_SEL 0x00000003
1424 	(((v) << 0) & BM_PXP_DATA_PATH_CTRL0_MUX0_SEL)
1425 #define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__0 0x0
1426 #define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__1 0x1
1427 #define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__2 0x2
1428 #define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__3 0x3
1430 #define HW_PXP_DATA_PATH_CTRL1	(0x00000350)
1431 #define HW_PXP_DATA_PATH_CTRL1_SET	(0x00000354)
1432 #define HW_PXP_DATA_PATH_CTRL1_CLR	(0x00000358)
1433 #define HW_PXP_DATA_PATH_CTRL1_TOG	(0x0000035c)
1436 #define BM_PXP_DATA_PATH_CTRL1_RSVD0 0xFFFFFFF0
1440 #define BM_PXP_DATA_PATH_CTRL1_MUX17_SEL 0x0000000C
1443 #define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__0 0x0
1444 #define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__1 0x1
1445 #define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__2 0x2
1446 #define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__3 0x3
1447 #define BP_PXP_DATA_PATH_CTRL1_MUX16_SEL      0
1448 #define BM_PXP_DATA_PATH_CTRL1_MUX16_SEL 0x00000003
1450 	(((v) << 0) & BM_PXP_DATA_PATH_CTRL1_MUX16_SEL)
1451 #define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__0 0x0
1452 #define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__1 0x1
1453 #define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__2 0x2
1454 #define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__3 0x3
1456 #define HW_PXP_INIT_MEM_CTRL	(0x00000360)
1457 #define HW_PXP_INIT_MEM_CTRL_SET	(0x00000364)
1458 #define HW_PXP_INIT_MEM_CTRL_CLR	(0x00000368)
1459 #define HW_PXP_INIT_MEM_CTRL_TOG	(0x0000036c)
1461 #define BM_PXP_INIT_MEM_CTRL_START 0x80000000
1465 #define BM_PXP_INIT_MEM_CTRL_SELECT 0x78000000
1468 #define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER0_LUT  0x0
1469 #define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER0_ERR0 0x1
1470 #define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER0_ERR1 0x2
1471 #define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER1_LUT  0x3
1472 #define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER2_LUT  0x4
1473 #define BV_PXP_INIT_MEM_CTRL_SELECT__ALU_A	0x5
1474 #define BV_PXP_INIT_MEM_CTRL_SELECT__ALU_B	0x6
1475 #define BV_PXP_INIT_MEM_CTRL_SELECT__WFE_A_FETCH  0x7
1476 #define BV_PXP_INIT_MEM_CTRL_SELECT__WFE_B_FETCH  0x8
1477 #define BV_PXP_INIT_MEM_CTRL_SELECT__RESERVED     0x15
1479 #define BM_PXP_INIT_MEM_CTRL_RSVD0 0x07FF0000
1482 #define BP_PXP_INIT_MEM_CTRL_ADDR      0
1483 #define BM_PXP_INIT_MEM_CTRL_ADDR 0x0000FFFF
1485 	(((v) << 0) & BM_PXP_INIT_MEM_CTRL_ADDR)
1487 #define HW_PXP_INIT_MEM_DATA	(0x00000370)
1489 #define BP_PXP_INIT_MEM_DATA_DATA      0
1490 #define BM_PXP_INIT_MEM_DATA_DATA 0xFFFFFFFF
1493 #define HW_PXP_INIT_MEM_DATA_HIGH	(0x00000380)
1495 #define BP_PXP_INIT_MEM_DATA_HIGH_DATA      0
1496 #define BM_PXP_INIT_MEM_DATA_HIGH_DATA 0xFFFFFFFF
1499 #define HW_PXP_IRQ_MASK	(0x00000390)
1500 #define HW_PXP_IRQ_MASK_SET	(0x00000394)
1501 #define HW_PXP_IRQ_MASK_CLR	(0x00000398)
1502 #define HW_PXP_IRQ_MASK_TOG	(0x0000039c)
1504 #define BM_PXP_IRQ_MASK_COMPRESS_DONE_IRQ_EN 0x80000000
1508 #define BM_PXP_IRQ_MASK_RSVD1 0x7FFF0000
1511 #define BM_PXP_IRQ_MASK_WFE_B_STORE_IRQ_EN 0x00008000
1514 #define BM_PXP_IRQ_MASK_WFE_A_STORE_IRQ_EN 0x00004000
1517 #define BM_PXP_IRQ_MASK_DITHER_STORE_IRQ_EN 0x00002000
1520 #define BM_PXP_IRQ_MASK_FIRST_STORE_IRQ_EN 0x00001000
1523 #define BM_PXP_IRQ_MASK_WFE_B_CH1_STORE_IRQ_EN 0x00000800
1526 #define BM_PXP_IRQ_MASK_WFE_B_CH0_STORE_IRQ_EN 0x00000400
1529 #define BM_PXP_IRQ_MASK_WFE_A_CH1_STORE_IRQ_EN 0x00000200
1532 #define BM_PXP_IRQ_MASK_WFE_A_CH0_STORE_IRQ_EN 0x00000100
1535 #define BM_PXP_IRQ_MASK_DITHER_CH1_STORE_IRQ_EN 0x00000080
1538 #define BM_PXP_IRQ_MASK_DITHER_CH0_STORE_IRQ_EN 0x00000040
1541 #define BM_PXP_IRQ_MASK_DITHER_CH1_PREFETCH_IRQ_EN 0x00000020
1544 #define BM_PXP_IRQ_MASK_DITHER_CH0_PREFETCH_IRQ_EN 0x00000010
1547 #define BM_PXP_IRQ_MASK_FIRST_CH1_STORE_IRQ_EN 0x00000008
1550 #define BM_PXP_IRQ_MASK_FIRST_CH0_STORE_IRQ_EN 0x00000004
1553 #define BM_PXP_IRQ_MASK_FIRST_CH1_PREFETCH_IRQ_EN 0x00000002
1556 #define BM_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN 0x00000001
1558 	(((v) << 0) & BM_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN)
1560 #define HW_PXP_IRQ	(0x000003a0)
1561 #define HW_PXP_IRQ_SET	(0x000003a4)
1562 #define HW_PXP_IRQ_CLR	(0x000003a8)
1563 #define HW_PXP_IRQ_TOG	(0x000003ac)
1565 #define BM_PXP_IRQ_COMPRESS_DONE_IRQ 0x80000000
1569 #define BM_PXP_IRQ_RSVD1 0x7FFF0000
1572 #define BM_PXP_IRQ_WFE_B_STORE_IRQ 0x00008000
1575 #define BM_PXP_IRQ_WFE_A_STORE_IRQ 0x00004000
1578 #define BM_PXP_IRQ_DITHER_STORE_IRQ 0x00002000
1581 #define BM_PXP_IRQ_FIRST_STORE_IRQ 0x00001000
1584 #define BM_PXP_IRQ_WFE_B_CH1_STORE_IRQ 0x00000800
1587 #define BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ 0x00000400
1590 #define BM_PXP_IRQ_WFE_A_CH1_STORE_IRQ 0x00000200
1593 #define BM_PXP_IRQ_WFE_A_CH0_STORE_IRQ 0x00000100
1596 #define BM_PXP_IRQ_DITHER_CH1_STORE_IRQ 0x00000080
1599 #define BM_PXP_IRQ_DITHER_CH0_STORE_IRQ 0x00000040
1602 #define BM_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ 0x00000020
1605 #define BM_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ 0x00000010
1608 #define BM_PXP_IRQ_FIRST_CH1_STORE_IRQ 0x00000008
1611 #define BM_PXP_IRQ_FIRST_CH0_STORE_IRQ 0x00000004
1614 #define BM_PXP_IRQ_FIRST_CH1_PREFETCH_IRQ 0x00000002
1617 #define BM_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ 0x00000001
1619 	(((v) << 0) & BM_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ)
1621 #define HW_PXP_NEXT	(0x00000400)
1624 #define BM_PXP_NEXT_POINTER 0xFFFFFFFC
1627 #define BM_PXP_NEXT_RSVD 0x00000002
1630 #define BM_PXP_NEXT_ENABLED 0x00000001
1632 	(((v) << 0) & BM_PXP_NEXT_ENABLED)
1634 #define HW_PXP_DEBUGCTRL	(0x00000410)
1637 #define BM_PXP_DEBUGCTRL_RSVD 0xFFFFF000
1641 #define BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT 0x00000F00
1644 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__NONE     0x0
1645 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MISS_CNT 0x1
1646 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__HIT_CNT  0x2
1647 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__LAT_CNT  0x4
1648 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MAX_LAT  0x8
1649 #define BP_PXP_DEBUGCTRL_SELECT      0
1650 #define BM_PXP_DEBUGCTRL_SELECT 0x000000FF
1652 	(((v) << 0) & BM_PXP_DEBUGCTRL_SELECT)
1653 #define BV_PXP_DEBUGCTRL_SELECT__NONE	0x0
1654 #define BV_PXP_DEBUGCTRL_SELECT__CTRL	0x1
1655 #define BV_PXP_DEBUGCTRL_SELECT__PSBUF       0x2
1656 #define BV_PXP_DEBUGCTRL_SELECT__PSBAX       0x3
1657 #define BV_PXP_DEBUGCTRL_SELECT__PSBAY       0x4
1658 #define BV_PXP_DEBUGCTRL_SELECT__ASBUF       0x5
1659 #define BV_PXP_DEBUGCTRL_SELECT__ROTATION    0x6
1660 #define BV_PXP_DEBUGCTRL_SELECT__OUTBUF0     0x7
1661 #define BV_PXP_DEBUGCTRL_SELECT__OUTBUF1     0x8
1662 #define BV_PXP_DEBUGCTRL_SELECT__OUTBUF2     0x9
1663 #define BV_PXP_DEBUGCTRL_SELECT__LUT_STAT    0x10
1664 #define BV_PXP_DEBUGCTRL_SELECT__LUT_MISS    0x11
1665 #define BV_PXP_DEBUGCTRL_SELECT__LUT_HIT     0x12
1666 #define BV_PXP_DEBUGCTRL_SELECT__LUT_LAT     0x13
1667 #define BV_PXP_DEBUGCTRL_SELECT__LUT_MAX_LAT 0x14
1669 #define HW_PXP_DEBUG	(0x00000420)
1671 #define BP_PXP_DEBUG_DATA      0
1672 #define BM_PXP_DEBUG_DATA 0xFFFFFFFF
1675 #define HW_PXP_VERSION	(0x00000430)
1678 #define BM_PXP_VERSION_MAJOR 0xFF000000
1682 #define BM_PXP_VERSION_MINOR 0x00FF0000
1685 #define BP_PXP_VERSION_STEP      0
1686 #define BM_PXP_VERSION_STEP 0x0000FFFF
1688 	(((v) << 0) & BM_PXP_VERSION_STEP)