Lines Matching +full:offset +full:- +full:y
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020-2021 NXP
16 #include <media/videobuf2-v4l2.h>
17 #include <media/videobuf2-dma-contig.h>
49 //x means source data , y means destination data
50 #define STREAM_CONFIG_FORMAT_SET(x, y) CONFIG_SET(x, y, 0, 0x0000000F) argument
51 #define STREAM_CONFIG_STRBUFIDX_SET(x, y) CONFIG_SET(x, y, 8, 0x00000300) argument
52 #define STREAM_CONFIG_NOSEQ_SET(x, y) CONFIG_SET(x, y, 10, 0x00000400) argument
53 #define STREAM_CONFIG_DEBLOCK_SET(x, y) CONFIG_SET(x, y, 11, 0x00000800) argument
54 #define STREAM_CONFIG_DERING_SET(x, y) CONFIG_SET(x, y, 12, 0x00001000) argument
55 #define STREAM_CONFIG_IBWAIT_SET(x, y) CONFIG_SET(x, y, 13, 0x00002000) argument
56 #define STREAM_CONFIG_FBC_SET(x, y) CONFIG_SET(x, y, 14, 0x00004000) argument
57 #define STREAM_CONFIG_PLAY_MODE_SET(x, y) CONFIG_SET(x, y, 16, 0x00030000) argument
58 #define STREAM_CONFIG_ENABLE_DCP_SET(x, y) CONFIG_SET(x, y, 20, 0x00100000) argument
59 #define STREAM_CONFIG_NUM_STR_BUF_SET(x, y) CONFIG_SET(x, y, 21, 0x00600000) argument
60 #define STREAM_CONFIG_MALONE_USAGE_SET(x, y) CONFIG_SET(x, y, 23, 0x01800000) argument
61 #define STREAM_CONFIG_MULTI_VID_SET(x, y) CONFIG_SET(x, y, 25, 0x02000000) argument
62 #define STREAM_CONFIG_OBFUSC_EN_SET(x, y) CONFIG_SET(x, y, 26, 0x04000000) argument
63 #define STREAM_CONFIG_RC4_EN_SET(x, y) CONFIG_SET(x, y, 27, 0x08000000) argument
64 #define STREAM_CONFIG_MCX_SET(x, y) CONFIG_SET(x, y, 28, 0x10000000) argument
65 #define STREAM_CONFIG_PES_SET(x, y) CONFIG_SET(x, y, 29, 0x20000000) argument
66 #define STREAM_CONFIG_NUM_DBE_SET(x, y) CONFIG_SET(x, y, 30, 0x40000000) argument
67 #define STREAM_CONFIG_FS_CTRL_MODE_SET(x, y) CONFIG_SET(x, y, 31, 0x80000000) argument
347 unsigned long offset; in vpu_malone_init_rpc() local
350 if (rpc->phys < boot_addr) in vpu_malone_init_rpc()
353 iface = rpc->virt; in vpu_malone_init_rpc()
354 base_phy_addr = rpc->phys - boot_addr; in vpu_malone_init_rpc()
355 hc = shared->priv; in vpu_malone_init_rpc()
357 shared->iface = iface; in vpu_malone_init_rpc()
358 shared->boot_addr = boot_addr; in vpu_malone_init_rpc()
360 iface->exec_base_addr = base_phy_addr; in vpu_malone_init_rpc()
361 iface->exec_area_size = rpc->length; in vpu_malone_init_rpc()
363 offset = sizeof(struct malone_iface); in vpu_malone_init_rpc()
364 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
366 shared->cmd_desc = &iface->cmd_buffer_desc.buffer; in vpu_malone_init_rpc()
367 shared->cmd_mem_vir = rpc->virt + offset; in vpu_malone_init_rpc()
368 iface->cmd_buffer_desc.buffer.start = in vpu_malone_init_rpc()
369 iface->cmd_buffer_desc.buffer.rptr = in vpu_malone_init_rpc()
370 iface->cmd_buffer_desc.buffer.wptr = phy_addr; in vpu_malone_init_rpc()
371 iface->cmd_buffer_desc.buffer.end = iface->cmd_buffer_desc.buffer.start + CMD_SIZE; in vpu_malone_init_rpc()
372 offset += CMD_SIZE; in vpu_malone_init_rpc()
373 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
375 shared->msg_desc = &iface->msg_buffer_desc.buffer; in vpu_malone_init_rpc()
376 shared->msg_mem_vir = rpc->virt + offset; in vpu_malone_init_rpc()
377 iface->msg_buffer_desc.buffer.start = in vpu_malone_init_rpc()
378 iface->msg_buffer_desc.buffer.wptr = in vpu_malone_init_rpc()
379 iface->msg_buffer_desc.buffer.rptr = phy_addr; in vpu_malone_init_rpc()
380 iface->msg_buffer_desc.buffer.end = iface->msg_buffer_desc.buffer.start + MSG_SIZE; in vpu_malone_init_rpc()
381 offset += MSG_SIZE; in vpu_malone_init_rpc()
382 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
384 iface->codec_param_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
385 hc->codec_param = rpc->virt + offset; in vpu_malone_init_rpc()
386 offset += CODEC_SIZE; in vpu_malone_init_rpc()
387 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
389 iface->jpeg_param_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
390 hc->jpg = rpc->virt + offset; in vpu_malone_init_rpc()
391 offset += JPEG_SIZE; in vpu_malone_init_rpc()
392 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
394 iface->seq_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
395 hc->seq_mem = rpc->virt + offset; in vpu_malone_init_rpc()
396 offset += SEQ_SIZE; in vpu_malone_init_rpc()
397 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
399 iface->pic_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
400 hc->pic_mem = rpc->virt + offset; in vpu_malone_init_rpc()
401 offset += PIC_SIZE; in vpu_malone_init_rpc()
402 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
404 iface->gop_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
405 hc->gop_mem = rpc->virt + offset; in vpu_malone_init_rpc()
406 offset += GOP_SIZE; in vpu_malone_init_rpc()
407 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
409 iface->qmeter_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
410 hc->qmeter_mem = rpc->virt + offset; in vpu_malone_init_rpc()
411 offset += QMETER_SIZE; in vpu_malone_init_rpc()
412 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
414 iface->dbglog_desc.addr = phy_addr; in vpu_malone_init_rpc()
415 iface->dbglog_desc.size = DBGLOG_SIZE; in vpu_malone_init_rpc()
416 hc->dbglog_mem = rpc->virt + offset; in vpu_malone_init_rpc()
417 offset += DBGLOG_SIZE; in vpu_malone_init_rpc()
418 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
421 iface->eng_access_buff_desc[i].buffer.start = in vpu_malone_init_rpc()
422 iface->eng_access_buff_desc[i].buffer.wptr = in vpu_malone_init_rpc()
423 iface->eng_access_buff_desc[i].buffer.rptr = phy_addr; in vpu_malone_init_rpc()
424 iface->eng_access_buff_desc[i].buffer.end = in vpu_malone_init_rpc()
425 iface->eng_access_buff_desc[i].buffer.start + ENG_SIZE; in vpu_malone_init_rpc()
426 offset += ENG_SIZE; in vpu_malone_init_rpc()
427 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
431 iface->encrypt_info[i] = phy_addr; in vpu_malone_init_rpc()
432 offset += sizeof(struct vpu_malone_encrypt_info); in vpu_malone_init_rpc()
433 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
436 rpc->bytesused = offset; in vpu_malone_init_rpc()
442 struct malone_iface *iface = shared->iface; in vpu_malone_set_log_buf()
444 iface->debug_buffer_desc.buffer.start = in vpu_malone_set_log_buf()
445 iface->debug_buffer_desc.buffer.wptr = in vpu_malone_set_log_buf()
446 iface->debug_buffer_desc.buffer.rptr = log->phys - shared->boot_addr; in vpu_malone_set_log_buf()
447 iface->debug_buffer_desc.buffer.end = iface->debug_buffer_desc.buffer.start + log->length; in vpu_malone_set_log_buf()
458 struct malone_iface *iface = shared->iface; in vpu_malone_set_system_cfg()
459 struct vpu_rpc_system_config *config = &iface->system_cfg; in vpu_malone_set_system_cfg()
460 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_set_system_cfg()
465 u32 offset = get_str_buffer_offset(i); in vpu_malone_set_system_cfg() local
467 hc->buf_addr[i] = regs_base + offset; in vpu_malone_set_system_cfg()
468 hc->str_buf[i] = regs + offset; in vpu_malone_set_system_cfg()
474 struct malone_iface *iface = shared->iface; in vpu_malone_get_version()
476 vpu_malone_enable_format(V4L2_PIX_FMT_RV30, iface->fw_version & MALONE_DEC_FMT_RV_MASK); in vpu_malone_get_version()
477 vpu_malone_enable_format(V4L2_PIX_FMT_RV40, iface->fw_version & MALONE_DEC_FMT_RV_MASK); in vpu_malone_get_version()
479 return iface->fw_version; in vpu_malone_get_version()
491 struct malone_iface *iface = shared->iface; in vpu_malone_config_stream_buffer()
492 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_config_stream_buffer()
493 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_config_stream_buffer()
495 writel(buf->phys, &str_buf->start); in vpu_malone_config_stream_buffer()
496 writel(buf->phys, &str_buf->rptr); in vpu_malone_config_stream_buffer()
497 writel(buf->phys, &str_buf->wptr); in vpu_malone_config_stream_buffer()
498 writel(buf->phys + buf->length, &str_buf->end); in vpu_malone_config_stream_buffer()
499 writel(0x1, &str_buf->lwm); in vpu_malone_config_stream_buffer()
501 iface->stream_buffer_desc[instance][0] = hc->buf_addr[instance]; in vpu_malone_config_stream_buffer()
510 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_get_stream_buffer_desc()
511 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_get_stream_buffer_desc()
514 desc->wptr = readl(&str_buf->wptr); in vpu_malone_get_stream_buffer_desc()
515 desc->rptr = readl(&str_buf->rptr); in vpu_malone_get_stream_buffer_desc()
516 desc->start = readl(&str_buf->start); in vpu_malone_get_stream_buffer_desc()
517 desc->end = readl(&str_buf->end); in vpu_malone_get_stream_buffer_desc()
527 writel(wptr, &str_buf->wptr); in vpu_malone_update_wptr()
534 writel(rptr, &str_buf->rptr); in vpu_malone_update_rptr()
540 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_update_stream_buffer()
541 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_update_stream_buffer()
612 struct malone_iface *iface = shared->iface; in vpu_malone_set_stream_cfg()
613 u32 *curr_str_cfg = &iface->stream_config[instance]; in vpu_malone_set_stream_cfg()
638 struct malone_iface *iface = shared->iface; in vpu_malone_set_params()
639 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_set_params()
642 malone_format = vpu_malone_format_remap(params->codec_format); in vpu_malone_set_params()
644 return -EINVAL; in vpu_malone_set_params()
645 iface->udata_buffer[instance].base = params->udata.base; in vpu_malone_set_params()
646 iface->udata_buffer[instance].slot_size = params->udata.size; in vpu_malone_set_params()
652 hc->jpg[instance].jpg_mjpeg_mode = 1; in vpu_malone_set_params()
654 hc->jpg[instance].jpg_mjpeg_interlaced = 0; in vpu_malone_set_params()
657 hc->codec_param[instance].disp_imm = params->display_delay_enable ? 1 : 0; in vpu_malone_set_params()
659 hc->codec_param[instance].disp_imm = 0; in vpu_malone_set_params()
660 hc->codec_param[instance].dbglog_enable = 0; in vpu_malone_set_params()
661 iface->dbglog_desc.level = 0; in vpu_malone_set_params()
663 if (params->b_non_frame) in vpu_malone_set_params()
664 iface->stream_buff_info[instance].stream_input_mode = NON_FRAME_LVL; in vpu_malone_set_params()
666 iface->stream_buff_info[instance].stream_input_mode = FRAME_LVL; in vpu_malone_set_params()
667 iface->stream_buff_info[instance].stream_buffer_threshold = 0; in vpu_malone_set_params()
668 iface->stream_buff_info[instance].stream_pic_input_count = 0; in vpu_malone_set_params()
675 struct malone_iface *iface = shared->iface; in vpu_malone_is_non_frame_mode()
677 if (iface->stream_buff_info[instance].stream_input_mode == NON_FRAME_LVL) in vpu_malone_is_non_frame_mode()
687 struct malone_iface *iface = shared->iface; in vpu_malone_update_params()
689 if (params->end_flag) in vpu_malone_update_params()
690 iface->stream_buff_info[instance].stream_pic_end_flag = params->end_flag; in vpu_malone_update_params()
691 params->end_flag = 0; in vpu_malone_update_params()
702 return -EINVAL; in vpu_malone_set_decode_params()
755 pkt->hdr.num = 7; in vpu_malone_pack_fs_alloc()
756 pkt->data[0] = fs->id | (fs->tag << 24); in vpu_malone_pack_fs_alloc()
757 pkt->data[1] = fs->luma_addr; in vpu_malone_pack_fs_alloc()
758 if (fs->type == MEM_RES_FRAME) { in vpu_malone_pack_fs_alloc()
762 * same fd -- usage of NXP codec2. Need to manually in vpu_malone_pack_fs_alloc()
763 * offset chroma addr. in vpu_malone_pack_fs_alloc()
765 if (fs->luma_addr == fs->chroma_addr) in vpu_malone_pack_fs_alloc()
766 fs->chroma_addr = fs->luma_addr + fs->luma_size; in vpu_malone_pack_fs_alloc()
767 pkt->data[2] = fs->luma_addr + fs->luma_size / 2; in vpu_malone_pack_fs_alloc()
768 pkt->data[3] = fs->chroma_addr; in vpu_malone_pack_fs_alloc()
769 pkt->data[4] = fs->chroma_addr + fs->chromau_size / 2; in vpu_malone_pack_fs_alloc()
770 pkt->data[5] = fs->bytesperline; in vpu_malone_pack_fs_alloc()
772 pkt->data[2] = fs->luma_size; in vpu_malone_pack_fs_alloc()
773 pkt->data[3] = 0; in vpu_malone_pack_fs_alloc()
774 pkt->data[4] = 0; in vpu_malone_pack_fs_alloc()
775 pkt->data[5] = 0; in vpu_malone_pack_fs_alloc()
777 pkt->data[6] = fs_type[fs->type]; in vpu_malone_pack_fs_alloc()
783 pkt->hdr.num = 1; in vpu_malone_pack_fs_release()
784 pkt->data[0] = fs->id | (fs->tag << 24); in vpu_malone_pack_fs_release()
790 struct timespec64 ts = ns_to_timespec64(info->timestamp); in vpu_malone_pack_timestamp()
792 pkt->hdr.num = 3; in vpu_malone_pack_timestamp()
794 pkt->data[0] = ts.tv_sec; in vpu_malone_pack_timestamp()
795 pkt->data[1] = ts.tv_nsec; in vpu_malone_pack_timestamp()
796 pkt->data[2] = info->size; in vpu_malone_pack_timestamp()
807 pkt->hdr.id = ret; in vpu_malone_pack_cmd()
808 pkt->hdr.num = 0; in vpu_malone_pack_cmd()
809 pkt->hdr.index = index; in vpu_malone_pack_cmd()
823 pkt->hdr.index = index; in vpu_malone_pack_cmd()
834 u32 interlaced = info->progressive ? 0 : 1; in vpu_malone_fill_planes()
836 info->bytesperline[0] = 0; in vpu_malone_fill_planes()
837 info->sizeimage[0] = vpu_helper_get_plane_size(info->pixfmt, in vpu_malone_fill_planes()
838 info->decoded_width, in vpu_malone_fill_planes()
839 info->decoded_height, in vpu_malone_fill_planes()
841 info->stride, in vpu_malone_fill_planes()
843 &info->bytesperline[0]); in vpu_malone_fill_planes()
844 info->bytesperline[1] = 0; in vpu_malone_fill_planes()
845 info->sizeimage[1] = vpu_helper_get_plane_size(info->pixfmt, in vpu_malone_fill_planes()
846 info->decoded_width, in vpu_malone_fill_planes()
847 info->decoded_height, in vpu_malone_fill_planes()
849 info->stride, in vpu_malone_fill_planes()
851 &info->bytesperline[1]); in vpu_malone_fill_planes()
856 u32 chunks = info->num_dfe_area >> MALONE_DCP_CHUNK_BIT; in vpu_malone_init_seq_hdr()
860 info->mbi_size = (info->sizeimage[0] + info->sizeimage[1]) >> 2; in vpu_malone_init_seq_hdr()
861 info->mbi_size = ALIGN(info->mbi_size, MALONE_ALIGN_MBI); in vpu_malone_init_seq_hdr()
863 info->dcp_size = MALONE_DCP_SIZE_MAX; in vpu_malone_init_seq_hdr()
869 mb_w = DIV_ROUND_UP(info->decoded_width, 16); in vpu_malone_init_seq_hdr()
870 mb_h = DIV_ROUND_UP(info->decoded_height, 16); in vpu_malone_init_seq_hdr()
872 info->dcp_size = mb_num * MALONE_DCP_FIXED_MB_ALLOC * chunks; in vpu_malone_init_seq_hdr()
873 info->dcp_size = clamp_t(u32, info->dcp_size, in vpu_malone_init_seq_hdr()
881 info->num_ref_frms = pkt->data[0]; in vpu_malone_unpack_seq_hdr()
882 info->num_dpb_frms = pkt->data[1]; in vpu_malone_unpack_seq_hdr()
883 info->num_dfe_area = pkt->data[2]; in vpu_malone_unpack_seq_hdr()
884 info->progressive = pkt->data[3]; in vpu_malone_unpack_seq_hdr()
885 info->width = pkt->data[5]; in vpu_malone_unpack_seq_hdr()
886 info->height = pkt->data[4]; in vpu_malone_unpack_seq_hdr()
887 info->decoded_width = pkt->data[12]; in vpu_malone_unpack_seq_hdr()
888 info->decoded_height = pkt->data[11]; in vpu_malone_unpack_seq_hdr()
889 info->frame_rate.numerator = 1000; in vpu_malone_unpack_seq_hdr()
890 info->frame_rate.denominator = pkt->data[8]; in vpu_malone_unpack_seq_hdr()
891 info->dsp_asp_ratio = pkt->data[9]; in vpu_malone_unpack_seq_hdr()
892 info->level_idc = pkt->data[10]; in vpu_malone_unpack_seq_hdr()
893 info->bit_depth_luma = pkt->data[13]; in vpu_malone_unpack_seq_hdr()
894 info->bit_depth_chroma = pkt->data[14]; in vpu_malone_unpack_seq_hdr()
895 info->chroma_fmt = pkt->data[15]; in vpu_malone_unpack_seq_hdr()
896 info->color_primaries = vpu_color_cvrt_primaries_i2v(pkt->data[16]); in vpu_malone_unpack_seq_hdr()
897 info->transfer_chars = vpu_color_cvrt_transfers_i2v(pkt->data[17]); in vpu_malone_unpack_seq_hdr()
898 info->matrix_coeffs = vpu_color_cvrt_matrix_i2v(pkt->data[18]); in vpu_malone_unpack_seq_hdr()
899 info->full_range = vpu_color_cvrt_full_range_i2v(pkt->data[19]); in vpu_malone_unpack_seq_hdr()
900 info->vui_present = pkt->data[20]; in vpu_malone_unpack_seq_hdr()
901 info->mvc_num_views = pkt->data[21]; in vpu_malone_unpack_seq_hdr()
902 info->offset_x = pkt->data[23]; in vpu_malone_unpack_seq_hdr()
903 info->offset_y = pkt->data[25]; in vpu_malone_unpack_seq_hdr()
904 info->tag = pkt->data[27]; in vpu_malone_unpack_seq_hdr()
905 if (info->bit_depth_luma > 8) in vpu_malone_unpack_seq_hdr()
906 info->pixfmt = V4L2_PIX_FMT_NV12M_10BE_8L128; in vpu_malone_unpack_seq_hdr()
908 info->pixfmt = V4L2_PIX_FMT_NV12M_8L128; in vpu_malone_unpack_seq_hdr()
909 if (info->frame_rate.numerator && info->frame_rate.denominator) { in vpu_malone_unpack_seq_hdr()
912 rational_best_approximation(info->frame_rate.numerator, in vpu_malone_unpack_seq_hdr()
913 info->frame_rate.denominator, in vpu_malone_unpack_seq_hdr()
914 info->frame_rate.numerator, in vpu_malone_unpack_seq_hdr()
915 info->frame_rate.denominator, in vpu_malone_unpack_seq_hdr()
917 info->frame_rate.numerator = n; in vpu_malone_unpack_seq_hdr()
918 info->frame_rate.denominator = d; in vpu_malone_unpack_seq_hdr()
926 info->id = pkt->data[7]; in vpu_malone_unpack_pic_info()
927 info->luma = pkt->data[0]; in vpu_malone_unpack_pic_info()
928 info->start = pkt->data[10]; in vpu_malone_unpack_pic_info()
929 info->end = pkt->data[12]; in vpu_malone_unpack_pic_info()
930 info->pic_size = pkt->data[11]; in vpu_malone_unpack_pic_info()
931 info->stride = pkt->data[5]; in vpu_malone_unpack_pic_info()
932 info->consumed_count = pkt->data[13]; in vpu_malone_unpack_pic_info()
933 if (info->id == MALONE_SKIPPED_FRAME_ID) in vpu_malone_unpack_pic_info()
934 info->skipped = 1; in vpu_malone_unpack_pic_info()
936 info->skipped = 0; in vpu_malone_unpack_pic_info()
942 info->type = pkt->data[1]; in vpu_malone_unpack_req_frame()
948 info->id = pkt->data[0]; in vpu_malone_unpack_rel_frame()
949 info->type = pkt->data[1]; in vpu_malone_unpack_rel_frame()
950 info->not_displayed = pkt->data[2]; in vpu_malone_unpack_rel_frame()
956 struct timespec64 ts = { pkt->data[9], pkt->data[10] }; in vpu_malone_unpack_buff_rdy()
958 info->id = pkt->data[0]; in vpu_malone_unpack_buff_rdy()
959 info->luma = pkt->data[1]; in vpu_malone_unpack_buff_rdy()
960 info->stride = pkt->data[3]; in vpu_malone_unpack_buff_rdy()
961 if (info->id == MALONE_SKIPPED_FRAME_ID) in vpu_malone_unpack_buff_rdy()
962 info->skipped = 1; in vpu_malone_unpack_buff_rdy()
964 info->skipped = 0; in vpu_malone_unpack_buff_rdy()
966 info->timestamp = timespec64_to_ns(&ts); in vpu_malone_unpack_buff_rdy()
972 return -EINVAL; in vpu_malone_unpack_msg_data()
974 switch (pkt->hdr.id) { in vpu_malone_unpack_msg_data()
1038 if (s->scode_type == type && s->pixelformat == fmt) in get_padding_scode()
1061 return -EINVAL; in vpu_malone_add_padding_scode()
1063 wptr = readl(&str_buf->wptr); in vpu_malone_add_padding_scode()
1064 if (wptr < stream_buffer->phys || wptr > stream_buffer->phys + stream_buffer->length) in vpu_malone_add_padding_scode()
1065 return -EINVAL; in vpu_malone_add_padding_scode()
1066 if (wptr == stream_buffer->phys + stream_buffer->length) in vpu_malone_add_padding_scode()
1067 wptr = stream_buffer->phys; in vpu_malone_add_padding_scode()
1068 size = ALIGN(wptr, 4) - wptr; in vpu_malone_add_padding_scode()
1073 size = sizeof(ps->data); in vpu_malone_add_padding_scode()
1074 ret = vpu_helper_copy_to_stream_buffer(stream_buffer, &wptr, size, (void *)ps->data); in vpu_malone_add_padding_scode()
1076 return -EINVAL; in vpu_malone_add_padding_scode()
1079 size = padding_size - sizeof(ps->data); in vpu_malone_add_padding_scode()
1093 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_add_scode()
1094 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_add_scode()
1095 int ret = -EINVAL; in vpu_malone_add_scode()
1137 /* payload_size = buffer_size + itself_size(16) - start_code(4) */ in set_payload_hdr()
1168 /* 0-3byte signature "DKIF" */ in set_vp8_ivf_seqhdr()
1173 /* 4-5byte version: should be 0*/ in set_vp8_ivf_seqhdr()
1176 /* 6-7 length of Header */ in set_vp8_ivf_seqhdr()
1179 /* 8-11 VP8 fourcc */ in set_vp8_ivf_seqhdr()
1184 /* 12-13 width in pixels */ in set_vp8_ivf_seqhdr()
1187 /* 14-15 height in pixels */ in set_vp8_ivf_seqhdr()
1190 /* 16-19 frame rate */ in set_vp8_ivf_seqhdr()
1195 /* 20-23 time scale */ in set_vp8_ivf_seqhdr()
1200 /* 24-27 number frames */ in set_vp8_ivf_seqhdr()
1205 /* 28-31 reserved */ in set_vp8_ivf_seqhdr()
1211 * firmware just parse 64-bit timestamp(8 bytes). in set_vp8_ivf_pichdr()
1222 /* 0-2 Number of frames, used default value 0xFF */ in set_vc1_rcv_seqhdr()
1230 /* 4-7 extension data size */ in set_vc1_rcv_seqhdr()
1235 /* 8-11 extension data */ in set_vc1_rcv_seqhdr()
1279 scode->inst->out_format.width, in vpu_malone_insert_scode_seq()
1280 scode->inst->out_format.height); in vpu_malone_insert_scode_seq()
1281 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_seq()
1282 &scode->wptr, in vpu_malone_insert_scode_seq()
1298 ext_size + vb2_get_plane_payload(scode->vb, 0), in vpu_malone_insert_scode_pic()
1299 scode->inst->out_format.width, in vpu_malone_insert_scode_pic()
1300 scode->inst->out_format.height); in vpu_malone_insert_scode_pic()
1301 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_pic()
1302 &scode->wptr, in vpu_malone_insert_scode_pic()
1312 if (!scode->inst->total_input_count) in vpu_malone_insert_scode_vc1_g_seq()
1314 if (vpu_vb_is_codecconfig(to_vb2_v4l2_buffer(scode->vb))) in vpu_malone_insert_scode_vc1_g_seq()
1315 scode->need_data = 0; in vpu_malone_insert_scode_vc1_g_seq()
1326 vbuf = to_vb2_v4l2_buffer(scode->vb); in vpu_malone_insert_scode_vc1_g_pic()
1327 data = vb2_plane_vaddr(scode->vb, 0); in vpu_malone_insert_scode_vc1_g_pic()
1329 if (scode->inst->total_input_count == 0 || vpu_vb_is_codecconfig(vbuf)) in vpu_malone_insert_scode_vc1_g_pic()
1335 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vc1_g_pic()
1336 &scode->wptr, in vpu_malone_insert_scode_vc1_g_pic()
1350 if (vpu_vb_is_codecconfig(to_vb2_v4l2_buffer(scode->vb))) in vpu_malone_insert_scode_vc1_l_seq()
1351 scode->need_data = 0; in vpu_malone_insert_scode_vc1_l_seq()
1352 if (scode->inst->total_input_count) in vpu_malone_insert_scode_vc1_l_seq()
1354 scode->need_data = 0; in vpu_malone_insert_scode_vc1_l_seq()
1362 vb2_plane_vaddr(scode->vb, 0), in vpu_malone_insert_scode_vc1_l_seq()
1363 scode->inst->out_format.width, in vpu_malone_insert_scode_vc1_l_seq()
1364 scode->inst->out_format.height); in vpu_malone_insert_scode_vc1_l_seq()
1365 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vc1_l_seq()
1366 &scode->wptr, in vpu_malone_insert_scode_vc1_l_seq()
1388 set_vc1_rcv_pichdr(rcv_pichdr, vb2_get_plane_payload(scode->vb, 0)); in vpu_malone_insert_scode_vc1_l_pic()
1389 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vc1_l_pic()
1390 &scode->wptr, in vpu_malone_insert_scode_vc1_l_pic()
1411 scode->inst->out_format.width, in vpu_malone_insert_scode_vp8_seq()
1412 scode->inst->out_format.height); in vpu_malone_insert_scode_vp8_seq()
1413 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vp8_seq()
1414 &scode->wptr, in vpu_malone_insert_scode_vp8_seq()
1435 set_vp8_ivf_pichdr(ivf_hdr, vb2_get_plane_payload(scode->vb, 0)); in vpu_malone_insert_scode_vp8_pic()
1436 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vp8_pic()
1437 &scode->wptr, in vpu_malone_insert_scode_vp8_pic()
1498 if (!scode || !scode->inst || !scode->vb) in vpu_malone_insert_scode()
1501 scode->need_data = 1; in vpu_malone_insert_scode()
1502 handler = get_scode_handler(scode->inst->out_format.pixfmt); in vpu_malone_insert_scode()
1508 if (handler->insert_scode_seq) in vpu_malone_insert_scode()
1509 ret = handler->insert_scode_seq(scode); in vpu_malone_insert_scode()
1512 if (handler->insert_scode_pic) in vpu_malone_insert_scode()
1513 ret = handler->insert_scode_pic(scode); in vpu_malone_insert_scode()
1528 u32 wptr = readl(&str_buf->wptr); in vpu_malone_input_frame_data()
1537 if (vbuf->sequence == 0 || vpu_vb_is_codecconfig(vbuf)) in vpu_malone_input_frame_data()
1541 return -ENOMEM; in vpu_malone_input_frame_data()
1551 return -ENOMEM; in vpu_malone_input_frame_data()
1555 ret = vpu_helper_copy_to_stream_buffer(&inst->stream_buffer, in vpu_malone_input_frame_data()
1560 return -ENOMEM; in vpu_malone_input_frame_data()
1566 ret = vpu_malone_add_scode(inst->core->iface, in vpu_malone_input_frame_data()
1567 inst->id, in vpu_malone_input_frame_data()
1568 &inst->stream_buffer, in vpu_malone_input_frame_data()
1569 inst->out_format.pixfmt, in vpu_malone_input_frame_data()
1582 u32 wptr = readl(&str_buf->wptr); in vpu_malone_input_stream_data()
1585 ret = vpu_helper_copy_to_stream_buffer(&inst->stream_buffer, in vpu_malone_input_stream_data()
1590 return -ENOMEM; in vpu_malone_input_stream_data()
1611 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_input_frame()
1613 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[inst->id]; in vpu_malone_input_frame()
1614 u32 disp_imm = hc->codec_param[inst->id].disp_imm; in vpu_malone_input_frame()
1618 if (vpu_malone_is_non_frame_mode(shared, inst->id)) in vpu_malone_input_frame()
1633 inst->extra_size += size; in vpu_malone_input_frame()
1636 if (inst->extra_size) { in vpu_malone_input_frame()
1637 size += inst->extra_size; in vpu_malone_input_frame()
1638 inst->extra_size = 0; in vpu_malone_input_frame()
1641 ret = vpu_malone_input_ts(inst, vb->timestamp, size); in vpu_malone_input_frame()
1650 struct malone_iface *iface = shared->iface; in vpu_malone_check_ready()
1651 struct vpu_rpc_buffer_desc *desc = &iface->api_cmd_buffer_desc[instance]; in vpu_malone_check_ready()
1652 u32 size = desc->end - desc->start; in vpu_malone_check_ready()
1653 u32 rptr = desc->rptr; in vpu_malone_check_ready()
1654 u32 wptr = desc->wptr; in vpu_malone_check_ready()
1660 used = (wptr + size - rptr) % size; in vpu_malone_check_ready()
1683 return -EINVAL; in vpu_malone_pre_cmd()
1690 struct malone_iface *iface = shared->iface; in vpu_malone_post_cmd()
1691 struct vpu_rpc_buffer_desc *desc = &iface->api_cmd_buffer_desc[instance]; in vpu_malone_post_cmd()
1693 desc->wptr++; in vpu_malone_post_cmd()
1694 if (desc->wptr == desc->end) in vpu_malone_post_cmd()
1695 desc->wptr = desc->start; in vpu_malone_post_cmd()
1702 struct malone_iface *iface = shared->iface; in vpu_malone_init_instance()
1703 struct vpu_rpc_buffer_desc *desc = &iface->api_cmd_buffer_desc[instance]; in vpu_malone_init_instance()
1705 desc->wptr = desc->rptr; in vpu_malone_init_instance()
1706 if (desc->wptr == desc->end) in vpu_malone_init_instance()
1707 desc->wptr = desc->start; in vpu_malone_init_instance()
1714 struct malone_iface *iface = shared->iface; in vpu_malone_get_max_instance_count()
1716 return iface->max_streams; in vpu_malone_get_max_instance_count()