Lines Matching +full:0 +full:x00070000
9 #define SCB_XREG_SLV_BASE 0x00000000
10 #define SCB_SCB_BLK_CTRL 0x00070000
11 #define SCB_BLK_CTRL_XMEM_RESET_SET 0x00000090
12 #define SCB_BLK_CTRL_CACHE_RESET_SET 0x000000A0
13 #define SCB_BLK_CTRL_CACHE_RESET_CLR 0x000000A4
14 #define SCB_BLK_CTRL_SCB_CLK_ENABLE_SET 0x00000100
16 #define XMEM_CONTROL 0x00041000
18 #define MC_CACHE_0_BASE 0x00060000
19 #define MC_CACHE_1_BASE 0x00068000
21 #define DEC_MFD_XREG_SLV_BASE 0x00180000
22 #define ENC_MFD_XREG_SLV_0_BASE 0x00800000
23 #define ENC_MFD_XREG_SLV_1_BASE 0x00A00000
25 #define MFD_HIF 0x0001C000
26 #define MFD_HIF_MSD_REG_INTERRUPT_STATUS 0x00000018
27 #define MFD_SIF 0x0001D000
28 #define MFD_SIF_CTRL_STATUS 0x000000F0
29 #define MFD_SIF_INTR_STATUS 0x000000F4
30 #define MFD_MCX 0x00020800
31 #define MFD_MCX_OFF 0x00000020
32 #define MFD_PIX_IF 0x00020000
34 #define MFD_BLK_CTRL 0x00030000
35 #define MFD_BLK_CTRL_MFD_SYS_RESET_SET 0x00000000
36 #define MFD_BLK_CTRL_MFD_SYS_RESET_CLR 0x00000004
37 #define MFD_BLK_CTRL_MFD_SYS_CLOCK_ENABLE_SET 0x00000100
38 #define MFD_BLK_CTRL_MFD_SYS_CLOCK_ENABLE_CLR 0x00000104
52 #define WINDSOR_PAL_IRQ_PIN_L 0x4
53 #define WINDSOR_PAL_IRQ_PIN_H 0x5