Lines Matching +full:0 +full:x0680

20 #define SOLO_SYS_CFG				0x0000
21 #define SOLO_SYS_CFG_FOUT_EN 0x00000001
22 #define SOLO_SYS_CFG_PLL_BYPASS 0x00000002
23 #define SOLO_SYS_CFG_PLL_PWDN 0x00000004
24 #define SOLO_SYS_CFG_OUTDIV(__n) (((__n) & 0x003) << 3)
25 #define SOLO_SYS_CFG_FEEDBACKDIV(__n) (((__n) & 0x1ff) << 5)
26 #define SOLO_SYS_CFG_INPUTDIV(__n) (((__n) & 0x01f) << 14)
27 #define SOLO_SYS_CFG_CLOCK_DIV 0x00080000
28 #define SOLO_SYS_CFG_NCLK_DELAY(__n) (((__n) & 0x003) << 24)
29 #define SOLO_SYS_CFG_PCLK_DELAY(__n) (((__n) & 0x00f) << 26)
30 #define SOLO_SYS_CFG_SDRAM64BIT 0x40000000
31 #define SOLO_SYS_CFG_RESET 0x80000000
33 #define SOLO_DMA_CTRL 0x0004
35 /* 0=16/32MB, 1=32/64MB, 2=64/128MB, 3=128/256MB */
41 #define SOLO_DMA_CTRL_LATENCY(n) ((n)<<0)
44 #define SOLO_DMA_CTRL1 0x0008
46 #define SOLO_SYS_VCLK 0x000C
48 /* 0=sys_clk/4, 1=sys_clk/2, 2=clk_in/2 of system input */
57 #define SOLO_VCLK_VIN0001_DELAY(n) ((n)<<0)
59 #define SOLO_IRQ_STAT 0x0010
60 #define SOLO_IRQ_MASK 0x0014
76 #define SOLO_IRQ_ENCODER BIT(0)
78 #define SOLO_CHIP_OPTION 0x001C
79 #define SOLO_CHIP_ID_MASK 0x00000007
81 #define SOLO_PLL_CONFIG 0x0020 /* 6110 Only */
83 #define SOLO_EEPROM_CTRL 0x0060
88 #define SOLO_EEPROM_DI BIT(0)
91 #define SOLO_PCI_ERR 0x0070
92 #define SOLO_PCI_ERR_FATAL 0x00000001
93 #define SOLO_PCI_ERR_PARITY 0x00000002
94 #define SOLO_PCI_ERR_TARGET 0x00000004
95 #define SOLO_PCI_ERR_TIMEOUT 0x00000008
96 #define SOLO_PCI_ERR_P2M 0x00000010
97 #define SOLO_PCI_ERR_ATA 0x00000020
98 #define SOLO_PCI_ERR_P2M_DESC 0x00000040
99 #define SOLO_PCI_ERR_FSM0(__s) (((__s) >> 16) & 0x0f)
100 #define SOLO_PCI_ERR_FSM1(__s) (((__s) >> 20) & 0x0f)
101 #define SOLO_PCI_ERR_FSM2(__s) (((__s) >> 24) & 0x1f)
103 #define SOLO_P2M_BASE 0x0080
105 #define SOLO_P2M_CONFIG(n) (0x0080 + ((n)*0x20))
108 /* 0:r=[14:10] g=[9:5] b=[4:0], 1:r=[15:11] g=[10:5] b=[4:0] */
112 #define SOLO_P2M_DESC_INTR_OPT BIT(1) /* 1:Empty, 0:Each */
113 #define SOLO_P2M_DESC_MODE BIT(0)
115 #define SOLO_P2M_DES_ADR(n) (0x0084 + ((n)*0x20))
117 #define SOLO_P2M_DESC_ID(n) (0x0088 + ((n)*0x20))
118 #define SOLO_P2M_UPDATE_ID(n) ((n)<<0)
120 #define SOLO_P2M_STATUS(n) (0x008C + ((n)*0x20))
122 #define SOLO_P2M_CURRENT_ID(stat) (0xff & (stat))
124 #define SOLO_P2M_CONTROL(n) (0x0090 + ((n)*0x20))
127 /* 0:512, 1:256, 2:128, 3:64, 4:32, 5:128(2page) */
129 #define SOLO_P2M_BURST_512 0
134 #define SOLO_P2M_CSC_16BIT BIT(6) /* 0:24bit, 1:16bit */
135 /* 0:Y[0]<-0(OFF), 1:Y[0]<-1(ON), 2:Y[0]<-G[0], 3:Y[0]<-Bit[15] */
140 #define SOLO_P2M_TRANS_ON BIT(0)
142 #define SOLO_P2M_EXT_CFG(n) (0x0094 + ((n)*0x20))
144 #define SOLO_P2M_COPY_SIZE(n) ((n)<<0)
146 #define SOLO_P2M_TAR_ADR(n) (0x0098 + ((n)*0x20))
148 #define SOLO_P2M_EXT_ADR(n) (0x009C + ((n)*0x20))
150 #define SOLO_P2M_BUFFER(i) (0x2000 + ((i)*4))
152 #define SOLO_VI_CH_SWITCH_0 0x0100
153 #define SOLO_VI_CH_SWITCH_1 0x0104
154 #define SOLO_VI_CH_SWITCH_2 0x0108
156 #define SOLO_VI_CH_ENA 0x010C
157 #define SOLO_VI_CH_FORMAT 0x0110
159 #define SOLO_VI_PROG_MASK(n) ((n)<<0)
161 #define SOLO_VI_FMT_CFG 0x0114
166 #define SOLO_VI_PAGE_SW 0x0118
171 #define SOLO_NORMAL_PAGE_ADD(n) ((n)<<0)
173 #define SOLO_VI_ACT_I_P 0x011C
174 #define SOLO_VI_ACT_I_S 0x0120
175 #define SOLO_VI_ACT_P 0x0124
179 #define SOLO_VI_V_STOP(n) ((n)<<0)
181 #define SOLO_VI_STATUS0 0x0128
182 #define SOLO_VI_STATUS0_PAGE(__n) ((__n) & 0x07)
183 #define SOLO_VI_STATUS1 0x012C
186 #define DISP_PAGE(stat) ((stat) & 0x07)
188 #define SOLO_VI_PB_CONFIG 0x0130
190 #define SOLO_VI_PB_PAL BIT(0)
191 #define SOLO_VI_PB_RANGE_HV 0x0134
193 #define SOLO_VI_PB_VSIZE(v) ((v)<<0)
194 #define SOLO_VI_PB_ACT_H 0x0138
196 #define SOLO_VI_PB_HSTOP(n) ((n)<<0)
197 #define SOLO_VI_PB_ACT_V 0x013C
199 #define SOLO_VI_PB_VSTOP(n) ((n)<<0)
201 #define SOLO_VI_MOSAIC(ch) (0x0140 + ((ch)*4))
205 #define SOLO_VI_MOSAIC_EY(x) ((x)<<0)
207 #define SOLO_VI_WIN_CTRL0(ch) (0x0180 + ((ch)*4))
208 #define SOLO_VI_WIN_CTRL1(ch) (0x01C0 + ((ch)*4))
216 #define SOLO_VI_WIN_EX(x) ((x)<<0)
219 #define SOLO_VI_WIN_EY(x) ((x)<<0)
221 #define SOLO_VI_WIN_ON(ch) (0x0200 + ((ch)*4))
223 #define SOLO_VI_WIN_SW 0x0240
224 #define SOLO_VI_WIN_LIVE_AUTO_MUTE 0x0244
226 #define SOLO_VI_MOT_ADR 0x0260
228 #define SOLO_VI_MOT_CTRL 0x0264
233 #define SOLO_VI_MOTION_SAMPLE_COUNT(n) ((n)<<0)
234 #define SOLO_VI_MOT_CLEAR 0x0268
235 #define SOLO_VI_MOT_STATUS 0x026C
236 #define SOLO_VI_MOTION_CNT(n) ((n)<<0)
237 #define SOLO_VI_MOTION_BORDER 0x0270
238 #define SOLO_VI_MOTION_BAR 0x0274
247 #define SOLO_VI_MOTION_CR_VALUE(v) ((v)<<0)
249 #define SOLO_VO_FMT_ENC 0x0300
252 #define SOLO_VO_FMT_TYPE_NTSC 0
262 #define SOLO_VO_NA_COLOR_CR(CR) (((CR)/16)<<0)
264 #define SOLO_VO_ACT_H 0x0304
267 #define SOLO_VO_H_STOP(n) ((n)<<0)
269 #define SOLO_VO_ACT_V 0x0308
272 #define SOLO_VO_V_STOP(n) ((n)<<0)
274 #define SOLO_VO_RANGE_HV 0x030C
279 #define SOLO_VO_V_LEN(n) ((n)<<0)
281 #define SOLO_VO_DISP_CTRL 0x0310
283 #define SOLO_VO_DISP_ERASE_COUNT(n) ((n&0xf)<<24)
286 #define SOLO_VO_DISP_BASE(n) (((n)>>16) & 0xffff)
288 #define SOLO_VO_DISP_ERASE 0x0314
289 #define SOLO_VO_DISP_ERASE_ON BIT(0)
291 #define SOLO_VO_ZOOM_CTRL 0x0318
296 #define SOLO_VO_ZOOM_SY(v) (((v)/2)<<0)
298 #define SOLO_VO_FREEZE_CTRL 0x031C
300 #define SOLO_VO_FREEZE_INTERPOLATION BIT(0)
302 #define SOLO_VO_BKG_COLOR 0x0320
305 #define SOLO_BG_V(v) ((v)<<0)
307 #define SOLO_VO_DEINTERLACE 0x0324
309 #define SOLO_VO_DEINTERLACE_EDGE_VALUE(n) ((n)<<0)
311 #define SOLO_VO_BORDER_LINE_COLOR 0x0330
312 #define SOLO_VO_BORDER_FILL_COLOR 0x0334
313 #define SOLO_VO_BORDER_LINE_MASK 0x0338
314 #define SOLO_VO_BORDER_FILL_MASK 0x033c
316 #define SOLO_VO_BORDER_X(n) (0x0340+((n)*4))
317 #define SOLO_VO_BORDER_Y(n) (0x0354+((n)*4))
319 #define SOLO_VO_CELL_EXT_SET 0x0368
320 #define SOLO_VO_CELL_EXT_START 0x036c
321 #define SOLO_VO_CELL_EXT_STOP 0x0370
323 #define SOLO_VO_CELL_EXT_SET2 0x0374
324 #define SOLO_VO_CELL_EXT_START2 0x0378
325 #define SOLO_VO_CELL_EXT_STOP2 0x037c
327 #define SOLO_VO_RECTANGLE_CTRL(n) (0x0368+((n)*12))
328 #define SOLO_VO_RECTANGLE_START(n) (0x036c+((n)*12))
329 #define SOLO_VO_RECTANGLE_STOP(n) (0x0370+((n)*12))
331 #define SOLO_VO_CURSOR_POS (0x0380)
332 #define SOLO_VO_CURSOR_CLR (0x0384)
333 #define SOLO_VO_CURSOR_CLR2 (0x0388)
334 #define SOLO_VO_CURSOR_MASK(id) (0x0390+((id)*4))
336 #define SOLO_VO_EXPANSION(id) (0x0250+((id)*4))
338 #define SOLO_OSG_CONFIG 0x03E0
343 #define SOLO_VO_OSG_BASE(offset) (((offset)>>16)&0xffff)
345 #define SOLO_OSG_ERASE 0x03E4
346 #define SOLO_OSG_ERASE_ON (0x80)
347 #define SOLO_OSG_ERASE_OFF (0x00)
349 #define SOLO_VO_OSG_BLINK 0x03E8
351 #define SOLO_VO_OSG_BLINK_INTREVAL18 BIT(0)
353 #define SOLO_CAP_BASE 0x0400
355 #define SOLO_CAP_BASE_ADDR(n) ((n)<<0)
356 #define SOLO_CAP_BTW 0x0404
358 #define SOLO_CAP_MAX_BANDWIDTH(n) ((n)<<0)
360 #define SOLO_DIM_SCALE1 0x0408
361 #define SOLO_DIM_SCALE2 0x040C
362 #define SOLO_DIM_SCALE3 0x0410
363 #define SOLO_DIM_SCALE4 0x0414
364 #define SOLO_DIM_SCALE5 0x0418
367 #define SOLO_DIM_H_MB_NUM(n) ((n)<<0)
369 #define SOLO_DIM_PROG 0x041C
370 #define SOLO_CAP_STATUS 0x0420
372 #define SOLO_CAP_CH_SCALE(ch) (0x0440+((ch)*4))
373 #define SOLO_CAP_CH_COMP_ENA_E(ch) (0x0480+((ch)*4))
374 #define SOLO_CAP_CH_INTV(ch) (0x04C0+((ch)*4))
375 #define SOLO_CAP_CH_INTV_E(ch) (0x0500+((ch)*4))
378 #define SOLO_VE_CFG0 0x0610
382 #define SOLO_VE_BLOCK_BASE(n) ((n)<<0)
384 #define SOLO_VE_CFG1 0x0614
388 #define SOLO_VE_MOTION_BASE(n) ((n)<<0)
393 #define SOLO_VE_WMRK_POLY 0x061C
394 #define SOLO_VE_VMRK_INIT_KEY 0x0620
395 #define SOLO_VE_WMRK_STRL 0x0624
396 #define SOLO_VE_ENCRYP_POLY 0x0628
397 #define SOLO_VE_ENCRYP_INIT 0x062C
398 #define SOLO_VE_ATTR 0x0630
405 #define SOLO_VE_COMPT_MOT 0x0634 /* 6110 Only */
407 #define SOLO_VE_STATE(n) (0x0640+((n)*4))
409 #define SOLO_VE_JPEG_QP_TBL 0x0670
410 #define SOLO_VE_JPEG_QP_CH_L 0x0674
411 #define SOLO_VE_JPEG_QP_CH_H 0x0678
412 #define SOLO_VE_JPEG_CFG 0x067C
413 #define SOLO_VE_JPEG_CTRL 0x0680
414 #define SOLO_VE_CODE_ENCRYPT 0x0684 /* 6110 Only */
415 #define SOLO_VE_JPEG_CFG1 0x0688 /* 6110 Only */
416 #define SOLO_VE_WMRK_ENABLE 0x068C /* 6110 Only */
417 #define SOLO_VE_OSD_CH 0x0690
418 #define SOLO_VE_OSD_BASE 0x0694
419 #define SOLO_VE_OSD_CLR 0x0698
420 #define SOLO_VE_OSD_OPT 0x069C
424 #define SOLO_VE_OSD_H_OFFSET(n) ((n & 0x7f)<<7)
425 #define SOLO_VE_OSD_V_OFFSET(n) (n & 0x7f)
427 #define SOLO_VE_CH_INTL(ch) (0x0700+((ch)*4))
428 #define SOLO_VE_CH_MOT(ch) (0x0740+((ch)*4))
429 #define SOLO_VE_CH_QP(ch) (0x0780+((ch)*4))
430 #define SOLO_VE_CH_QP_E(ch) (0x07C0+((ch)*4))
431 #define SOLO_VE_CH_GOP(ch) (0x0800+((ch)*4))
432 #define SOLO_VE_CH_GOP_E(ch) (0x0840+((ch)*4))
433 #define SOLO_VE_CH_REF_BASE(ch) (0x0880+((ch)*4))
434 #define SOLO_VE_CH_REF_BASE_E(ch) (0x08C0+((ch)*4))
436 #define SOLO_VE_MPEG4_QUE(n) (0x0A00+((n)*8))
437 #define SOLO_VE_JPEG_QUE(n) (0x0A04+((n)*8))
439 #define SOLO_VD_CFG0 0x0900
453 #define SOLO_VD_CFG_DCT_INTERVAL(n) ((n)<<0)
455 #define SOLO_VD_CFG1 0x0904
457 #define SOLO_VD_DEINTERLACE 0x0908
459 #define SOLO_VD_DEINTERLACE_EDGE_VALUE(n) ((n)<<0)
461 #define SOLO_VD_CODE_ADR 0x090C
463 #define SOLO_VD_CTRL 0x0910
465 #define SOLO_VD_MAX_ITEM(n) ((n)<<0)
467 #define SOLO_VD_STATUS0 0x0920
472 #define SOLO_VD_STATUS1 0x0924
474 #define SOLO_VD_IDX0 0x0930
477 #define SOLO_VD_IDX_SIZE(n) ((n)<<0)
479 #define SOLO_VD_IDX1 0x0934
484 #define SOLO_VD_IDX_V_BLOCK(n) ((n)<<0)
486 #define SOLO_VD_IDX2 0x0938
488 #define SOLO_VD_IDX_REF_BASE(n) (((n)>>16)&0xffff)
490 #define SOLO_VD_IDX3 0x093C
496 #define SOLO_VD_IDX_OFFSET_Y(n) ((n)<<0)
498 #define SOLO_VD_IDX4 0x0940
500 #define SOLO_VD_IDX_DISP_RD_PAGE(n) ((n)<<0)
502 #define SOLO_VD_WR_PAGE(n) (0x03F0 + ((n) * 4))
505 #define SOLO_GPIO_CONFIG_0 0x0B00
506 #define SOLO_GPIO_CONFIG_1 0x0B04
507 #define SOLO_GPIO_DATA_OUT 0x0B08
508 #define SOLO_GPIO_DATA_IN 0x0B0C
509 #define SOLO_GPIO_INT_ACK_STA 0x0B10
510 #define SOLO_GPIO_INT_ENA 0x0B14
511 #define SOLO_GPIO_INT_CFG_0 0x0B18
512 #define SOLO_GPIO_INT_CFG_1 0x0B1C
515 #define SOLO_IIC_CFG 0x0B20
517 #define SOLO_IIC_PRESCALE(n) ((n)<<0)
519 #define SOLO_IIC_CTRL 0x0B24
530 #define SOLO_IIC_WRITE BIT(0)
532 #define SOLO_IIC_TXD 0x0B28
533 #define SOLO_IIC_RXD 0x0B2C
538 #define SOLO_UART_CONTROL(n) (0x0BA0 + ((n)*0x20))
550 #define SOLO_BAUDRATE_230400 ((0<<9)|(0<<6))
551 #define SOLO_BAUDRATE_115200 ((0<<9)|(1<<6))
552 #define SOLO_BAUDRATE_57600 ((0<<9)|(2<<6))
553 #define SOLO_BAUDRATE_38400 ((0<<9)|(3<<6))
554 #define SOLO_BAUDRATE_19200 ((0<<9)|(4<<6))
555 #define SOLO_BAUDRATE_9600 ((0<<9)|(5<<6))
556 #define SOLO_BAUDRATE_4800 ((0<<9)|(6<<6))
564 #define SOLO_UART_DATA_BIT_5 (0<<4)
566 #define SOLO_UART_STOP_BIT_1 (0<<2)
569 #define SOLO_UART_PARITY_NONE (0<<0)
570 #define SOLO_UART_PARITY_EVEN (2<<0)
571 #define SOLO_UART_PARITY_ODD (3<<0)
573 #define SOLO_UART_STATUS(n) (0x0BA4 + ((n)*0x20))
581 #define SOLO_UART_RX_BUFF_CNT(stat) (((stat)>>6) & 0x1f)
583 #define SOLO_UART_TX_BUFF_CNT(stat) (((stat)>>0) & 0x1f)
586 #define SOLO_UART_TX_DATA(n) (0x0BA8 + ((n)*0x20))
588 #define SOLO_UART_RX_DATA(n) (0x0BAC + ((n)*0x20))
591 #define SOLO_TIMER_CLOCK_NUM 0x0be0
592 #define SOLO_TIMER_USEC 0x0be8
593 #define SOLO_TIMER_SEC 0x0bec
594 #define SOLO_TIMER_USEC_LSB 0x0d20 /* 6110 Only */
596 #define SOLO_AUDIO_CONTROL 0x0D00
607 #define SOLO_AUDIO_MODE(n) ((n)<<0)
608 #define SOLO_AUDIO_SAMPLE 0x0D04
612 #define SOLO_AUDIO_CLK_DIV(n) ((n)<<0)
613 #define SOLO_AUDIO_FDMA_INTR 0x0D08
616 #define SOLO_AUDIO_FDMA_BASE(n) ((n)<<0)
617 #define SOLO_AUDIO_EVOL_0 0x0D0C
618 #define SOLO_AUDIO_EVOL_1 0x0D10
620 #define SOLO_AUDIO_STA 0x0D14
625 #define SOLO_WATCHDOG 0x0be4
626 #define SOLO_WATCHDOG_SET(status, sec) (status << 8 | (sec & 0xff))