Lines Matching +full:0 +full:x300
39 i2c_reg = MGB4_IS_GMSL(mgbdev) ? 0x1CE : 0x49; in oldi_lane_width_show()
40 i2c_mask = MGB4_IS_GMSL(mgbdev) ? 0x0E : 0x03; in oldi_lane_width_show()
41 i2c_single_val = MGB4_IS_GMSL(mgbdev) ? 0x00 : 0x02; in oldi_lane_width_show()
42 i2c_dual_val = MGB4_IS_GMSL(mgbdev) ? 0x0E : 0x00; in oldi_lane_width_show()
47 if (ret < 0) in oldi_lane_width_show()
58 return sprintf(buf, "%s\n", config & (1U << 9) ? "1" : "0"); in oldi_lane_width_show()
83 case 0: /* single */ in oldi_lane_width_store()
84 fpga_data = 0; in oldi_lane_width_store()
85 i2c_data = MGB4_IS_GMSL(mgbdev) ? 0x00 : 0x02; in oldi_lane_width_store()
89 i2c_data = MGB4_IS_GMSL(mgbdev) ? 0x0E : 0x00; in oldi_lane_width_store()
95 i2c_reg = MGB4_IS_GMSL(mgbdev) ? 0x1CE : 0x49; in oldi_lane_width_store()
96 i2c_mask = MGB4_IS_GMSL(mgbdev) ? 0x0E : 0x03; in oldi_lane_width_store()
101 if (ret < 0) in oldi_lane_width_store()
108 ret = mgb4_i2c_mask_byte(&vindev->deser, 0x10, 1U << 5, 1U << 5); in oldi_lane_width_store()
110 if (ret < 0) in oldi_lane_width_store()
125 return sprintf(buf, "%s\n", config & (1U << 8) ? "0" : "1"); in color_mapping_show()
147 case 0: /* OLDI/JEIDA */ in color_mapping_store()
151 fpga_data = 0; in color_mapping_store()
171 return sprintf(buf, "%s\n", status & (1U << 2) ? "1" : "0"); in link_status_show()
183 (status & (1 << 2)) && (status & (3 << 9))) ? "1" : "0"); in stream_status_show()
205 return sprintf(buf, "%u\n", config & 0xFFFF); in video_height_show()
218 res = 0x02; // not available in hsync_status_show()
220 res = 0x01; // active high in hsync_status_show()
222 res = 0x00; // active low in hsync_status_show()
237 res = 0x02; // not available in vsync_status_show()
239 res = 0x01; // active high in vsync_status_show()
241 res = 0x00; // active low in vsync_status_show()
274 if (val > 0xFFFF) in hsync_gap_length_store()
278 0xFFFF0000, val << 16); in hsync_gap_length_store()
291 return sprintf(buf, "%u\n", sync & 0xFFFF); in vsync_gap_length_show()
310 if (val > 0xFFFF) in vsync_gap_length_store()
313 mgb4_mask_reg(&vindev->mgbdev->video, vindev->config->regs.sync, 0xFFFF, in vsync_gap_length_store()
338 return sprintf(buf, "%u\n", (sig & 0x00FF0000) >> 16); in hsync_width_show()
349 return sprintf(buf, "%u\n", (sig & 0x00FF0000) >> 16); in vsync_width_show()
360 return sprintf(buf, "%u\n", (sig & 0x0000FF00) >> 8); in hback_porch_show()
371 return sprintf(buf, "%u\n", (sig & 0x000000FF)); in hfront_porch_show()
382 return sprintf(buf, "%u\n", (sig & 0x0000FF00) >> 8); in vback_porch_show()
393 return sprintf(buf, "%u\n", (sig & 0x000000FF)); in vfront_porch_show()
444 ret = mgb4_i2c_read_byte(&vindev->deser, 0x34); in fpdl3_input_width_show()
446 if (ret < 0) in fpdl3_input_width_show()
449 switch ((u8)ret & 0x18) { in fpdl3_input_width_show()
450 case 0: in fpdl3_input_width_show()
451 return sprintf(buf, "0\n"); in fpdl3_input_width_show()
452 case 0x10: in fpdl3_input_width_show()
454 case 0x08: in fpdl3_input_width_show()
480 case 0: /* auto */ in fpdl3_input_width_store()
481 i2c_data = 0x00; in fpdl3_input_width_store()
484 i2c_data = 0x10; in fpdl3_input_width_store()
487 i2c_data = 0x08; in fpdl3_input_width_store()
494 ret = mgb4_i2c_mask_byte(&vindev->deser, 0x34, 0x18, i2c_data); in fpdl3_input_width_store()
496 if (ret < 0) in fpdl3_input_width_store()
512 r1 = mgb4_i2c_read_byte(&vindev->deser, 0x01); in gmsl_mode_show()
513 r300 = mgb4_i2c_read_byte(&vindev->deser, 0x300); in gmsl_mode_show()
514 r3 = mgb4_i2c_read_byte(&vindev->deser, 0x03); in gmsl_mode_show()
516 if (r1 < 0 || r300 < 0 || r3 < 0) in gmsl_mode_show()
519 if ((r1 & 0x03) == 0x03 && (r300 & 0x0C) == 0x0C && (r3 & 0xC0) == 0xC0) in gmsl_mode_show()
520 return sprintf(buf, "0\n"); in gmsl_mode_show()
521 else if ((r1 & 0x03) == 0x02 && (r300 & 0x0C) == 0x08 && (r3 & 0xC0) == 0x00) in gmsl_mode_show()
523 else if ((r1 & 0x03) == 0x01 && (r300 & 0x0C) == 0x04 && (r3 & 0xC0) == 0x00) in gmsl_mode_show()
525 else if ((r1 & 0x03) == 0x00 && (r300 & 0x0C) == 0x00 && (r3 & 0xC0) == 0x00) in gmsl_mode_show()
540 {0x01, 0x03, 0x03}, {0x300, 0x0C, 0x0C}, {0x03, 0xC0, 0xC0}}; in gmsl_mode_store()
542 {0x01, 0x03, 0x02}, {0x300, 0x0C, 0x08}, {0x03, 0xC0, 0x00}}; in gmsl_mode_store()
544 {0x01, 0x03, 0x01}, {0x300, 0x0C, 0x04}, {0x03, 0xC0, 0x00}}; in gmsl_mode_store()
546 {0x01, 0x03, 0x00}, {0x300, 0x0C, 0x00}, {0x03, 0xC0, 0x00}}; in gmsl_mode_store()
548 {0x10, 1U << 5, 1U << 5}, {0x300, 1U << 6, 1U << 6}}; in gmsl_mode_store()
560 case 0: /* 12Gb/s */ in gmsl_mode_store()
580 if (ret < 0) in gmsl_mode_store()
594 ret = mgb4_i2c_read_byte(&vindev->deser, 0xA0); in gmsl_stream_id_show()
596 if (ret < 0) in gmsl_stream_id_show()
599 return sprintf(buf, "%d\n", ret & 0x03); in gmsl_stream_id_show()
624 ret = mgb4_i2c_mask_byte(&vindev->deser, 0xA0, 0x03, (u8)val); in gmsl_stream_id_store()
629 return (ret < 0) ? -EIO : count; in gmsl_stream_id_store()
640 r3e0 = mgb4_i2c_read_byte(&vindev->deser, 0x3E0); in gmsl_fec_show()
641 r308 = mgb4_i2c_read_byte(&vindev->deser, 0x308); in gmsl_fec_show()
643 if (r3e0 < 0 || r308 < 0) in gmsl_fec_show()
646 if ((r3e0 & 0x07) == 0x00 && (r308 & 0x01) == 0x00) in gmsl_fec_show()
647 return sprintf(buf, "0\n"); in gmsl_fec_show()
648 else if ((r3e0 & 0x07) == 0x07 && (r308 & 0x01) == 0x01) in gmsl_fec_show()
664 {0x3E0, 0x07, 0x07}, {0x308, 0x01, 0x01}}; in gmsl_fec_store()
666 {0x3E0, 0x07, 0x00}, {0x308, 0x01, 0x00}}; in gmsl_fec_store()
668 {0x10, 1U << 5, 1U << 5}, {0x300, 1U << 6, 1U << 6}}; in gmsl_fec_store()
678 case 0: /* disabled */ in gmsl_fec_store()
692 if (ret < 0) in gmsl_fec_store()