Lines Matching +full:udma +full:- +full:p
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
9 #include "ivtv-driver.h"
10 #include "ivtv-queue.h"
11 #include "ivtv-udma.h"
12 #include "ivtv-irq.h"
13 #include "ivtv-mailbox.h"
14 #include "ivtv-vbi.h"
15 #include "ivtv-yuv.h"
16 #include <media/v4l2-event.h>
31 struct ivtv_stream *s = &itv->streams[IVTV_ENC_STREAM_TYPE_PCM]; in ivtv_pcm_work_handler()
34 /* Pass the PCM data to ivtv-alsa */ in ivtv_pcm_work_handler()
43 buf = ivtv_dequeue(s, &s->q_io); in ivtv_pcm_work_handler()
45 buf = ivtv_dequeue(s, &s->q_full); in ivtv_pcm_work_handler()
49 if (buf->readpos < buf->bytesused) in ivtv_pcm_work_handler()
50 itv->pcm_announce_callback(itv->alsa, in ivtv_pcm_work_handler()
51 (u8 *)(buf->buf + buf->readpos), in ivtv_pcm_work_handler()
52 (size_t)(buf->bytesused - buf->readpos)); in ivtv_pcm_work_handler()
54 ivtv_enqueue(s, buf, &s->q_free); in ivtv_pcm_work_handler()
60 struct ivtv_stream *s = &itv->streams[itv->cur_pio_stream]; in ivtv_pio_work_handler()
65 if (itv->cur_pio_stream < 0 || itv->cur_pio_stream >= IVTV_MAX_STREAMS || in ivtv_pio_work_handler()
66 s->vdev.v4l2_dev == NULL || !ivtv_use_pio(s)) { in ivtv_pio_work_handler()
67 itv->cur_pio_stream = -1; in ivtv_pio_work_handler()
72 IVTV_DEBUG_HI_DMA("Process PIO %s\n", s->name); in ivtv_pio_work_handler()
73 list_for_each_entry(buf, &s->q_dma.list, list) { in ivtv_pio_work_handler()
74 u32 size = s->sg_processing[i].size & 0x3ffff; in ivtv_pio_work_handler()
77 if (s->type == IVTV_DEC_STREAM_TYPE_VBI) { in ivtv_pio_work_handler()
78 memcpy_fromio(buf->buf, itv->dec_mem + s->sg_processing[i].src - IVTV_DECODER_OFFSET, size); in ivtv_pio_work_handler()
81 memcpy_fromio(buf->buf, itv->enc_mem + s->sg_processing[i].src, size); in ivtv_pio_work_handler()
84 if (i == s->sg_processing_size) in ivtv_pio_work_handler()
94 if (test_and_clear_bit(IVTV_F_I_WORK_HANDLER_PIO, &itv->i_flags)) in ivtv_irq_work_handler()
97 if (test_and_clear_bit(IVTV_F_I_WORK_HANDLER_VBI, &itv->i_flags)) in ivtv_irq_work_handler()
100 if (test_and_clear_bit(IVTV_F_I_WORK_HANDLER_YUV, &itv->i_flags)) in ivtv_irq_work_handler()
103 if (test_and_clear_bit(IVTV_F_I_WORK_HANDLER_PCM, &itv->i_flags)) in ivtv_irq_work_handler()
113 struct ivtv *itv = s->itv; in stream_enc_dma_append()
118 int skip_bufs = s->q_predma.buffers; in stream_enc_dma_append()
119 int idx = s->sg_pending_size; in stream_enc_dma_append()
123 if (s->vdev.v4l2_dev == NULL) { in stream_enc_dma_append()
124 IVTV_DEBUG_WARN("Stream %s not started\n", s->name); in stream_enc_dma_append()
125 return -1; in stream_enc_dma_append()
127 if (!test_bit(IVTV_F_S_CLAIMED, &s->s_flags)) { in stream_enc_dma_append()
128 IVTV_DEBUG_WARN("Stream %s not open\n", s->name); in stream_enc_dma_append()
129 return -1; in stream_enc_dma_append()
133 switch (s->type) { in stream_enc_dma_append()
137 s->pending_pts = 0; in stream_enc_dma_append()
145 s->pending_pts = ((u64) data[5] << 32) | data[6]; in stream_enc_dma_append()
150 size = data[2] - 12; in stream_enc_dma_append()
151 s->pending_pts = read_dec(offset - 8) | in stream_enc_dma_append()
152 ((u64)(read_dec(offset - 12)) << 32); in stream_enc_dma_append()
153 if (itv->has_cx23415) in stream_enc_dma_append()
158 size = itv->vbi.enc_size * itv->vbi.fpi; in stream_enc_dma_append()
159 offset = read_enc(itv->vbi.enc_start - 4) + 12; in stream_enc_dma_append()
162 return -1; in stream_enc_dma_append()
164 s->pending_pts = read_enc(offset - 4) | ((u64)read_enc(offset - 8) << 32); in stream_enc_dma_append()
168 size = read_dec(itv->vbi.dec_start + 4) + 8; in stream_enc_dma_append()
169 offset = read_dec(itv->vbi.dec_start) + itv->vbi.dec_start; in stream_enc_dma_append()
170 s->pending_pts = 0; in stream_enc_dma_append()
175 return -1; in stream_enc_dma_append()
179 if (s->sg_pending_size == 0 && ivtv_use_dma(s)) { in stream_enc_dma_append()
180 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM || in stream_enc_dma_append()
181 s->type == IVTV_DEC_STREAM_TYPE_VBI)) { in stream_enc_dma_append()
182 s->pending_backup = read_dec(offset - IVTV_DECODER_OFFSET); in stream_enc_dma_append()
183 write_dec_sync(DMA_MAGIC_COOKIE, offset - IVTV_DECODER_OFFSET); in stream_enc_dma_append()
186 s->pending_backup = read_enc(offset); in stream_enc_dma_append()
189 s->pending_offset = offset; in stream_enc_dma_append()
193 if (s->type == IVTV_ENC_STREAM_TYPE_YUV) { in stream_enc_dma_append()
197 bytes_needed = s->buf_size * ((bytes_needed + s->buf_size - 1) / s->buf_size); in stream_enc_dma_append()
202 ivtv_use_pio(s) ? "PIO" : "DMA", s->name, bytes_needed, offset); in stream_enc_dma_append()
204 rc = ivtv_queue_move(s, &s->q_free, &s->q_full, &s->q_predma, bytes_needed); in stream_enc_dma_append()
207 bytes_needed, s->name); in stream_enc_dma_append()
208 return -1; in stream_enc_dma_append()
210 if (rc && !s->buffers_stolen && test_bit(IVTV_F_S_APPL_IO, &s->s_flags)) { in stream_enc_dma_append()
211 IVTV_WARN("All %s stream buffers are full. Dropping data.\n", s->name); in stream_enc_dma_append()
214 s->buffers_stolen = rc; in stream_enc_dma_append()
217 buf = list_entry(s->q_predma.list.next, struct ivtv_buffer, list); in stream_enc_dma_append()
218 memset(buf->buf, 0, 128); in stream_enc_dma_append()
219 list_for_each_entry(buf, &s->q_predma.list, list) { in stream_enc_dma_append()
220 if (skip_bufs-- > 0) in stream_enc_dma_append()
222 s->sg_pending[idx].dst = buf->dma_handle; in stream_enc_dma_append()
223 s->sg_pending[idx].src = offset; in stream_enc_dma_append()
224 s->sg_pending[idx].size = s->buf_size; in stream_enc_dma_append()
225 buf->bytesused = min(size, s->buf_size); in stream_enc_dma_append()
226 buf->dma_xfer_cnt = s->dma_xfer_cnt; in stream_enc_dma_append()
228 s->q_predma.bytesused += buf->bytesused; in stream_enc_dma_append()
229 size -= buf->bytesused; in stream_enc_dma_append()
230 offset += s->buf_size; in stream_enc_dma_append()
242 s->sg_pending_size = idx; in stream_enc_dma_append()
248 struct ivtv *itv = s->itv; in dma_post()
250 struct list_head *p; in dma_post() local
256 s->name, s->dma_offset); in dma_post()
257 list_for_each(p, &s->q_dma.list) { in dma_post()
258 buf = list_entry(p, struct ivtv_buffer, list); in dma_post()
259 u32buf = (__le32 *)buf->buf; in dma_post()
265 offset = s->dma_last_offset; in dma_post()
273 IVTV_DEBUG_WARN("%s: Couldn't find start of buffer within the first 256 bytes\n", s->name); in dma_post()
274 offset = s->dma_last_offset; in dma_post()
276 if (s->dma_last_offset != offset) in dma_post()
277 IVTV_DEBUG_WARN("%s: offset %d -> %d\n", s->name, s->dma_last_offset, offset); in dma_post()
278 s->dma_last_offset = offset; in dma_post()
280 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM || in dma_post()
281 s->type == IVTV_DEC_STREAM_TYPE_VBI)) { in dma_post()
282 write_dec_sync(0, s->dma_offset - IVTV_DECODER_OFFSET); in dma_post()
285 write_enc_sync(0, s->dma_offset); in dma_post()
288 buf->bytesused -= offset; in dma_post()
289 memcpy(buf->buf, buf->buf + offset, buf->bytesused + offset); in dma_post()
291 *u32buf = cpu_to_le32(s->dma_backup); in dma_post()
294 /* flag byteswap ABCD -> DCBA for MPG & VBI data outside irq */ in dma_post()
295 if (s->type == IVTV_ENC_STREAM_TYPE_MPG || in dma_post()
296 s->type == IVTV_ENC_STREAM_TYPE_VBI) in dma_post()
297 buf->b_flags |= IVTV_F_B_NEED_BUF_SWAP; in dma_post()
300 buf->bytesused += s->dma_last_offset; in dma_post()
301 if (buf && s->type == IVTV_DEC_STREAM_TYPE_VBI) { in dma_post()
302 list_for_each_entry(buf, &s->q_dma.list, list) { in dma_post()
304 s->q_dma.bytesused -= buf->bytesused; in dma_post()
305 ivtv_process_vbi_data(itv, buf, 0, s->type); in dma_post()
306 s->q_dma.bytesused += buf->bytesused; in dma_post()
308 if (s->fh == NULL) { in dma_post()
309 ivtv_queue_move(s, &s->q_dma, NULL, &s->q_free, 0); in dma_post()
314 ivtv_queue_move(s, &s->q_dma, NULL, &s->q_full, s->q_dma.bytesused); in dma_post()
316 if (s->type == IVTV_ENC_STREAM_TYPE_PCM && in dma_post()
317 itv->pcm_announce_callback != NULL) { in dma_post()
319 * Set up the work handler to pass the data to ivtv-alsa. in dma_post()
322 * making ivtv-fileops.c calls on the PCM device node. in dma_post()
329 set_bit(IVTV_F_I_WORK_HANDLER_PCM, &itv->i_flags); in dma_post()
330 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); in dma_post()
333 if (s->fh) in dma_post()
334 wake_up(&s->waitq); in dma_post()
339 struct ivtv *itv = s->itv; in ivtv_dma_stream_dec_prepare()
340 struct yuv_playback_info *yi = &itv->yuv_info; in ivtv_dma_stream_dec_prepare()
341 u8 frame = yi->draw_frame; in ivtv_dma_stream_dec_prepare()
342 struct yuv_frame_info *f = &yi->new_frame_info[frame]; in ivtv_dma_stream_dec_prepare()
344 u32 y_size = 720 * ((f->src_h + 31) & ~31); in ivtv_dma_stream_dec_prepare()
350 IVTV_DEBUG_HI_DMA("DEC PREPARE DMA %s: %08x %08x\n", s->name, s->q_predma.bytesused, offset); in ivtv_dma_stream_dec_prepare()
353 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && f->offset_y) { in ivtv_dma_stream_dec_prepare()
354 if (yi->blanking_dmaptr) { in ivtv_dma_stream_dec_prepare()
355 s->sg_pending[idx].src = yi->blanking_dmaptr; in ivtv_dma_stream_dec_prepare()
356 s->sg_pending[idx].dst = offset; in ivtv_dma_stream_dec_prepare()
357 s->sg_pending[idx].size = 720 * 16; in ivtv_dma_stream_dec_prepare()
363 list_for_each_entry(buf, &s->q_predma.list, list) { in ivtv_dma_stream_dec_prepare()
365 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && !y_done && in ivtv_dma_stream_dec_prepare()
366 (bytes_written + buf->bytesused) >= y_size) { in ivtv_dma_stream_dec_prepare()
367 s->sg_pending[idx].src = buf->dma_handle; in ivtv_dma_stream_dec_prepare()
368 s->sg_pending[idx].dst = offset; in ivtv_dma_stream_dec_prepare()
369 s->sg_pending[idx].size = y_size - bytes_written; in ivtv_dma_stream_dec_prepare()
371 if (s->sg_pending[idx].size != buf->bytesused) { in ivtv_dma_stream_dec_prepare()
373 s->sg_pending[idx].src = in ivtv_dma_stream_dec_prepare()
374 buf->dma_handle + s->sg_pending[idx - 1].size; in ivtv_dma_stream_dec_prepare()
375 s->sg_pending[idx].dst = offset; in ivtv_dma_stream_dec_prepare()
376 s->sg_pending[idx].size = in ivtv_dma_stream_dec_prepare()
377 buf->bytesused - s->sg_pending[idx - 1].size; in ivtv_dma_stream_dec_prepare()
378 offset += s->sg_pending[idx].size; in ivtv_dma_stream_dec_prepare()
382 s->sg_pending[idx].src = buf->dma_handle; in ivtv_dma_stream_dec_prepare()
383 s->sg_pending[idx].dst = offset; in ivtv_dma_stream_dec_prepare()
384 s->sg_pending[idx].size = buf->bytesused; in ivtv_dma_stream_dec_prepare()
385 offset += buf->bytesused; in ivtv_dma_stream_dec_prepare()
387 bytes_written += buf->bytesused; in ivtv_dma_stream_dec_prepare()
393 s->sg_pending_size = idx; in ivtv_dma_stream_dec_prepare()
400 spin_lock_irqsave(&itv->dma_reg_lock, flags); in ivtv_dma_stream_dec_prepare()
401 if (!test_bit(IVTV_F_I_DMA, &itv->i_flags)) in ivtv_dma_stream_dec_prepare()
404 set_bit(IVTV_F_S_DMA_PENDING, &s->s_flags); in ivtv_dma_stream_dec_prepare()
405 spin_unlock_irqrestore(&itv->dma_reg_lock, flags); in ivtv_dma_stream_dec_prepare()
407 if (!test_bit(IVTV_F_I_DMA, &itv->i_flags)) in ivtv_dma_stream_dec_prepare()
410 set_bit(IVTV_F_S_DMA_PENDING, &s->s_flags); in ivtv_dma_stream_dec_prepare()
416 struct ivtv *itv = s->itv; in ivtv_dma_enc_start_xfer()
418 s->sg_dma->src = cpu_to_le32(s->sg_processing[s->sg_processed].src); in ivtv_dma_enc_start_xfer()
419 s->sg_dma->dst = cpu_to_le32(s->sg_processing[s->sg_processed].dst); in ivtv_dma_enc_start_xfer()
420 s->sg_dma->size = cpu_to_le32(s->sg_processing[s->sg_processed].size | 0x80000000); in ivtv_dma_enc_start_xfer()
421 s->sg_processed++; in ivtv_dma_enc_start_xfer()
424 write_reg(s->sg_handle, IVTV_REG_ENCDMAADDR); in ivtv_dma_enc_start_xfer()
426 itv->dma_timer.expires = jiffies + msecs_to_jiffies(300); in ivtv_dma_enc_start_xfer()
427 add_timer(&itv->dma_timer); in ivtv_dma_enc_start_xfer()
432 struct ivtv *itv = s->itv; in ivtv_dma_dec_start_xfer()
434 s->sg_dma->src = cpu_to_le32(s->sg_processing[s->sg_processed].src); in ivtv_dma_dec_start_xfer()
435 s->sg_dma->dst = cpu_to_le32(s->sg_processing[s->sg_processed].dst); in ivtv_dma_dec_start_xfer()
436 s->sg_dma->size = cpu_to_le32(s->sg_processing[s->sg_processed].size | 0x80000000); in ivtv_dma_dec_start_xfer()
437 s->sg_processed++; in ivtv_dma_dec_start_xfer()
440 write_reg(s->sg_handle, IVTV_REG_DECDMAADDR); in ivtv_dma_dec_start_xfer()
442 itv->dma_timer.expires = jiffies + msecs_to_jiffies(300); in ivtv_dma_dec_start_xfer()
443 add_timer(&itv->dma_timer); in ivtv_dma_dec_start_xfer()
449 struct ivtv *itv = s->itv; in ivtv_dma_enc_start()
450 struct ivtv_stream *s_vbi = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI]; in ivtv_dma_enc_start()
453 IVTV_DEBUG_HI_DMA("start %s for %s\n", ivtv_use_dma(s) ? "DMA" : "PIO", s->name); in ivtv_dma_enc_start()
455 if (s->q_predma.bytesused) in ivtv_dma_enc_start()
456 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused); in ivtv_dma_enc_start()
459 s->sg_pending[s->sg_pending_size - 1].size += 256; in ivtv_dma_enc_start()
469 clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags); in ivtv_dma_enc_start()
470 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && s_vbi->sg_pending_size && in ivtv_dma_enc_start()
471 s->sg_pending_size + s_vbi->sg_pending_size <= s->buffers) { in ivtv_dma_enc_start()
472 ivtv_queue_move(s_vbi, &s_vbi->q_predma, NULL, &s_vbi->q_dma, s_vbi->q_predma.bytesused); in ivtv_dma_enc_start()
474 s_vbi->sg_pending[s_vbi->sg_pending_size - 1].size += 256; in ivtv_dma_enc_start()
475 for (i = 0; i < s_vbi->sg_pending_size; i++) { in ivtv_dma_enc_start()
476 s->sg_pending[s->sg_pending_size++] = s_vbi->sg_pending[i]; in ivtv_dma_enc_start()
478 s_vbi->dma_offset = s_vbi->pending_offset; in ivtv_dma_enc_start()
479 s_vbi->sg_pending_size = 0; in ivtv_dma_enc_start()
480 s_vbi->dma_xfer_cnt++; in ivtv_dma_enc_start()
481 set_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags); in ivtv_dma_enc_start()
482 IVTV_DEBUG_HI_DMA("include DMA for %s\n", s_vbi->name); in ivtv_dma_enc_start()
485 s->dma_xfer_cnt++; in ivtv_dma_enc_start()
486 memcpy(s->sg_processing, s->sg_pending, sizeof(struct ivtv_sg_host_element) * s->sg_pending_size); in ivtv_dma_enc_start()
487 s->sg_processing_size = s->sg_pending_size; in ivtv_dma_enc_start()
488 s->sg_pending_size = 0; in ivtv_dma_enc_start()
489 s->sg_processed = 0; in ivtv_dma_enc_start()
490 s->dma_offset = s->pending_offset; in ivtv_dma_enc_start()
491 s->dma_backup = s->pending_backup; in ivtv_dma_enc_start()
492 s->dma_pts = s->pending_pts; in ivtv_dma_enc_start()
495 set_bit(IVTV_F_I_WORK_HANDLER_PIO, &itv->i_flags); in ivtv_dma_enc_start()
496 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); in ivtv_dma_enc_start()
497 set_bit(IVTV_F_I_PIO, &itv->i_flags); in ivtv_dma_enc_start()
498 itv->cur_pio_stream = s->type; in ivtv_dma_enc_start()
501 itv->dma_retries = 0; in ivtv_dma_enc_start()
503 set_bit(IVTV_F_I_DMA, &itv->i_flags); in ivtv_dma_enc_start()
504 itv->cur_dma_stream = s->type; in ivtv_dma_enc_start()
510 struct ivtv *itv = s->itv; in ivtv_dma_dec_start()
512 if (s->q_predma.bytesused) in ivtv_dma_dec_start()
513 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused); in ivtv_dma_dec_start()
514 s->dma_xfer_cnt++; in ivtv_dma_dec_start()
515 memcpy(s->sg_processing, s->sg_pending, sizeof(struct ivtv_sg_host_element) * s->sg_pending_size); in ivtv_dma_dec_start()
516 s->sg_processing_size = s->sg_pending_size; in ivtv_dma_dec_start()
517 s->sg_pending_size = 0; in ivtv_dma_dec_start()
518 s->sg_processed = 0; in ivtv_dma_dec_start()
520 IVTV_DEBUG_HI_DMA("start DMA for %s\n", s->name); in ivtv_dma_dec_start()
521 itv->dma_retries = 0; in ivtv_dma_dec_start()
523 set_bit(IVTV_F_I_DMA, &itv->i_flags); in ivtv_dma_dec_start()
524 itv->cur_dma_stream = s->type; in ivtv_dma_dec_start()
535 del_timer(&itv->dma_timer); in ivtv_irq_dma_read()
537 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && itv->cur_dma_stream < 0) in ivtv_irq_dma_read()
540 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags)) { in ivtv_irq_dma_read()
541 s = &itv->streams[itv->cur_dma_stream]; in ivtv_irq_dma_read()
547 s->sg_processed, s->sg_processing_size, itv->dma_retries); in ivtv_irq_dma_read()
549 if (itv->dma_retries == 3) { in ivtv_irq_dma_read()
551 itv->dma_retries = 0; in ivtv_irq_dma_read()
552 s->sg_processed = s->sg_processing_size; in ivtv_irq_dma_read()
557 s->sg_processed = 0; in ivtv_irq_dma_read()
558 itv->dma_retries++; in ivtv_irq_dma_read()
561 if (s->sg_processed < s->sg_processing_size) { in ivtv_irq_dma_read()
566 if (s->type == IVTV_DEC_STREAM_TYPE_YUV) in ivtv_irq_dma_read()
568 IVTV_DEBUG_HI_DMA("DEC DATA READ %s: %d\n", s->name, s->q_dma.bytesused); in ivtv_irq_dma_read()
576 ivtv_vapi(itv, CX2341X_DEC_SCHED_DMA_FROM_HOST, 3, 0, s->q_dma.bytesused, in ivtv_irq_dma_read()
580 while ((buf = ivtv_dequeue(s, &s->q_dma)) != NULL) { in ivtv_irq_dma_read()
582 ivtv_enqueue(s, buf, &s->q_free); in ivtv_irq_dma_read()
584 wake_up(&s->waitq); in ivtv_irq_dma_read()
586 clear_bit(IVTV_F_I_UDMA, &itv->i_flags); in ivtv_irq_dma_read()
587 clear_bit(IVTV_F_I_DMA, &itv->i_flags); in ivtv_irq_dma_read()
588 itv->cur_dma_stream = -1; in ivtv_irq_dma_read()
589 wake_up(&itv->dma_waitq); in ivtv_irq_dma_read()
597 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data); in ivtv_irq_enc_dma_complete()
598 IVTV_DEBUG_HI_IRQ("ENC DMA COMPLETE %x %d (%d)\n", data[0], data[1], itv->cur_dma_stream); in ivtv_irq_enc_dma_complete()
600 del_timer(&itv->dma_timer); in ivtv_irq_enc_dma_complete()
602 if (itv->cur_dma_stream < 0) in ivtv_irq_enc_dma_complete()
605 s = &itv->streams[itv->cur_dma_stream]; in ivtv_irq_enc_dma_complete()
610 s->dma_offset, s->sg_processed, s->sg_processing_size, itv->dma_retries); in ivtv_irq_enc_dma_complete()
612 if (itv->dma_retries == 3) { in ivtv_irq_enc_dma_complete()
614 itv->dma_retries = 0; in ivtv_irq_enc_dma_complete()
615 s->sg_processed = s->sg_processing_size; in ivtv_irq_enc_dma_complete()
620 s->sg_processed = 0; in ivtv_irq_enc_dma_complete()
621 itv->dma_retries++; in ivtv_irq_enc_dma_complete()
624 if (s->sg_processed < s->sg_processing_size) { in ivtv_irq_enc_dma_complete()
629 clear_bit(IVTV_F_I_DMA, &itv->i_flags); in ivtv_irq_enc_dma_complete()
630 itv->cur_dma_stream = -1; in ivtv_irq_enc_dma_complete()
632 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) { in ivtv_irq_enc_dma_complete()
633 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI]; in ivtv_irq_enc_dma_complete()
636 s->sg_processing_size = 0; in ivtv_irq_enc_dma_complete()
637 s->sg_processed = 0; in ivtv_irq_enc_dma_complete()
638 wake_up(&itv->dma_waitq); in ivtv_irq_enc_dma_complete()
645 if (itv->cur_pio_stream < 0 || itv->cur_pio_stream >= IVTV_MAX_STREAMS) { in ivtv_irq_enc_pio_complete()
646 itv->cur_pio_stream = -1; in ivtv_irq_enc_pio_complete()
649 s = &itv->streams[itv->cur_pio_stream]; in ivtv_irq_enc_pio_complete()
650 IVTV_DEBUG_HI_IRQ("ENC PIO COMPLETE %s\n", s->name); in ivtv_irq_enc_pio_complete()
651 clear_bit(IVTV_F_I_PIO, &itv->i_flags); in ivtv_irq_enc_pio_complete()
652 itv->cur_pio_stream = -1; in ivtv_irq_enc_pio_complete()
654 if (s->type == IVTV_ENC_STREAM_TYPE_MPG) in ivtv_irq_enc_pio_complete()
656 else if (s->type == IVTV_ENC_STREAM_TYPE_YUV) in ivtv_irq_enc_pio_complete()
658 else if (s->type == IVTV_ENC_STREAM_TYPE_PCM) in ivtv_irq_enc_pio_complete()
660 clear_bit(IVTV_F_I_PIO, &itv->i_flags); in ivtv_irq_enc_pio_complete()
661 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) { in ivtv_irq_enc_pio_complete()
662 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI]; in ivtv_irq_enc_pio_complete()
665 wake_up(&itv->dma_waitq); in ivtv_irq_enc_pio_complete()
673 del_timer(&itv->dma_timer); in ivtv_irq_dma_err()
675 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data); in ivtv_irq_dma_err()
678 status, itv->cur_dma_stream); in ivtv_irq_dma_err()
692 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && in ivtv_irq_dma_err()
693 itv->cur_dma_stream >= 0 && itv->cur_dma_stream < IVTV_MAX_STREAMS) { in ivtv_irq_dma_err()
694 struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream]; in ivtv_irq_dma_err()
696 if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) { in ivtv_irq_dma_err()
699 * FIXME - handle cases of DMA error similar to in ivtv_irq_dma_err()
710 itv->dma_timer.expires = in ivtv_irq_dma_err()
712 add_timer(&itv->dma_timer); in ivtv_irq_dma_err()
716 if (itv->dma_retries < 3) { in ivtv_irq_dma_err()
723 s->sg_processed = 0; in ivtv_irq_dma_err()
724 itv->dma_retries++; in ivtv_irq_dma_err()
732 if (test_bit(IVTV_F_I_UDMA, &itv->i_flags)) { in ivtv_irq_dma_err()
736 clear_bit(IVTV_F_I_UDMA, &itv->i_flags); in ivtv_irq_dma_err()
737 clear_bit(IVTV_F_I_DMA, &itv->i_flags); in ivtv_irq_dma_err()
738 itv->cur_dma_stream = -1; in ivtv_irq_dma_err()
739 wake_up(&itv->dma_waitq); in ivtv_irq_dma_err()
748 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA, 7, data); in ivtv_irq_enc_start_cap()
756 s = &itv->streams[ivtv_stream_map[data[0]]]; in ivtv_irq_enc_start_cap()
758 set_bit(ivtv_use_pio(s) ? IVTV_F_S_PIO_PENDING : IVTV_F_S_DMA_PENDING, &s->s_flags); in ivtv_irq_enc_start_cap()
768 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI]; in ivtv_irq_enc_vbi_cap()
771 set_bit(ivtv_use_pio(s) ? IVTV_F_S_PIO_PENDING : IVTV_F_S_DMA_PENDING, &s->s_flags); in ivtv_irq_enc_vbi_cap()
777 struct ivtv_stream *s = &itv->streams[IVTV_DEC_STREAM_TYPE_VBI]; in ivtv_irq_dec_vbi_reinsert()
780 if (test_bit(IVTV_F_S_CLAIMED, &s->s_flags) && in ivtv_irq_dec_vbi_reinsert()
782 set_bit(IVTV_F_S_PIO_PENDING, &s->s_flags); in ivtv_irq_dec_vbi_reinsert()
793 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags)) { in ivtv_irq_dec_data_req()
794 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, 2, data); in ivtv_irq_dec_data_req()
795 itv->dma_data_req_size = in ivtv_irq_dec_data_req()
796 1080 * ((itv->yuv_info.v4l2_src_h + 31) & ~31); in ivtv_irq_dec_data_req()
797 itv->dma_data_req_offset = data[1]; in ivtv_irq_dec_data_req()
798 if (atomic_read(&itv->yuv_info.next_dma_frame) >= 0) in ivtv_irq_dec_data_req()
800 s = &itv->streams[IVTV_DEC_STREAM_TYPE_YUV]; in ivtv_irq_dec_data_req()
803 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, 3, data); in ivtv_irq_dec_data_req()
804 itv->dma_data_req_size = min_t(u32, data[2], 0x10000); in ivtv_irq_dec_data_req()
805 itv->dma_data_req_offset = data[1]; in ivtv_irq_dec_data_req()
806 s = &itv->streams[IVTV_DEC_STREAM_TYPE_MPG]; in ivtv_irq_dec_data_req()
808 IVTV_DEBUG_HI_IRQ("DEC DATA REQ %s: %d %08x %u\n", s->name, s->q_full.bytesused, in ivtv_irq_dec_data_req()
809 itv->dma_data_req_offset, itv->dma_data_req_size); in ivtv_irq_dec_data_req()
810 if (itv->dma_data_req_size == 0 || s->q_full.bytesused < itv->dma_data_req_size) { in ivtv_irq_dec_data_req()
811 set_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags); in ivtv_irq_dec_data_req()
814 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags)) in ivtv_irq_dec_data_req()
816 clear_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags); in ivtv_irq_dec_data_req()
817 ivtv_queue_move(s, &s->q_full, NULL, &s->q_predma, itv->dma_data_req_size); in ivtv_irq_dec_data_req()
818 ivtv_dma_stream_dec_prepare(s, itv->dma_data_req_offset + IVTV_DECODER_OFFSET, 0); in ivtv_irq_dec_data_req()
832 struct yuv_playback_info *yi = &itv->yuv_info; in ivtv_irq_vsync()
833 int last_dma_frame = atomic_read(&yi->next_dma_frame); in ivtv_irq_vsync()
834 struct yuv_frame_info *f = &yi->new_frame_info[last_dma_frame]; in ivtv_irq_vsync()
838 if (((frame ^ f->sync_field) == 0 && in ivtv_irq_vsync()
839 ((itv->last_vsync_field & 1) ^ f->sync_field)) || in ivtv_irq_vsync()
840 (frame != (itv->last_vsync_field & 1) && !f->interlaced)) { in ivtv_irq_vsync()
843 if (!(f->interlaced && f->delay && yi->fields_lapsed < 1)) { in ivtv_irq_vsync()
844 if (next_dma_frame >= 0 && next_dma_frame != atomic_read(&yi->next_fill_frame)) { in ivtv_irq_vsync()
850 atomic_set(&yi->next_dma_frame, next_dma_frame); in ivtv_irq_vsync()
851 yi->fields_lapsed = -1; in ivtv_irq_vsync()
852 yi->running = 1; in ivtv_irq_vsync()
856 if (frame != (itv->last_vsync_field & 1)) { in ivtv_irq_vsync()
867 itv->last_vsync_field += 1; in ivtv_irq_vsync()
869 clear_bit(IVTV_F_I_VALID_DEC_TIMINGS, &itv->i_flags); in ivtv_irq_vsync()
870 clear_bit(IVTV_F_I_EV_VSYNC_FIELD, &itv->i_flags); in ivtv_irq_vsync()
873 set_bit(IVTV_F_I_EV_VSYNC_FIELD, &itv->i_flags); in ivtv_irq_vsync()
875 if (test_bit(IVTV_F_I_EV_VSYNC_ENABLED, &itv->i_flags)) { in ivtv_irq_vsync()
876 set_bit(IVTV_F_I_EV_VSYNC, &itv->i_flags); in ivtv_irq_vsync()
877 wake_up(&itv->event_waitq); in ivtv_irq_vsync()
879 wake_up(&s->waitq); in ivtv_irq_vsync()
881 if (s && s->vdev.v4l2_dev) in ivtv_irq_vsync()
882 v4l2_event_queue(&s->vdev, frame ? &evtop : &evbottom); in ivtv_irq_vsync()
883 wake_up(&itv->vsync_waitq); in ivtv_irq_vsync()
886 if (frame && (itv->output_mode == OUT_PASSTHROUGH || in ivtv_irq_vsync()
887 test_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags) || in ivtv_irq_vsync()
888 test_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags) || in ivtv_irq_vsync()
889 test_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags))) { in ivtv_irq_vsync()
890 set_bit(IVTV_F_I_WORK_HANDLER_VBI, &itv->i_flags); in ivtv_irq_vsync()
891 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); in ivtv_irq_vsync()
895 if (yi->running && (yi->yuv_forced_update || f->update)) { in ivtv_irq_vsync()
896 if (!f->update) { in ivtv_irq_vsync()
898 (u8)(atomic_read(&yi->next_dma_frame) - in ivtv_irq_vsync()
900 f = &yi->new_frame_info[last_dma_frame]; in ivtv_irq_vsync()
903 if (f->src_w) { in ivtv_irq_vsync()
904 yi->update_frame = last_dma_frame; in ivtv_irq_vsync()
905 f->update = 0; in ivtv_irq_vsync()
906 yi->yuv_forced_update = 0; in ivtv_irq_vsync()
907 set_bit(IVTV_F_I_WORK_HANDLER_YUV, &itv->i_flags); in ivtv_irq_vsync()
908 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); in ivtv_irq_vsync()
912 yi->fields_lapsed++; in ivtv_irq_vsync()
926 spin_lock(&itv->dma_reg_lock); in ivtv_irq_handler()
930 combo = ~itv->irqmask & stat; in ivtv_irq_handler()
939 if (~itv->irqmask & IVTV_IRQ_DEC_VSYNC) { in ivtv_irq_handler()
941 if ((itv->last_vsync_field & 1) != in ivtv_irq_handler()
952 spin_unlock(&itv->dma_reg_lock); in ivtv_irq_handler()
996 set_bit(IVTV_F_I_EOS, &itv->i_flags); in ivtv_irq_handler()
997 wake_up(&itv->eos_waitq); in ivtv_irq_handler()
1004 /* Decoder Vertical Sync - We can't rely on 'combo', so check if vsync enabled */ in ivtv_irq_handler()
1005 if (~itv->irqmask & IVTV_IRQ_DEC_VSYNC) { in ivtv_irq_handler()
1018 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_DMA, &itv->i_flags)) { in ivtv_irq_handler()
1019 itv->irq_rr_idx++; in ivtv_irq_handler()
1021 int idx = (i + itv->irq_rr_idx) % IVTV_MAX_STREAMS; in ivtv_irq_handler()
1022 struct ivtv_stream *s = &itv->streams[idx]; in ivtv_irq_handler()
1024 if (!test_and_clear_bit(IVTV_F_S_DMA_PENDING, &s->s_flags)) in ivtv_irq_handler()
1026 if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) in ivtv_irq_handler()
1034 test_bit(IVTV_F_I_UDMA_PENDING, &itv->i_flags)) in ivtv_irq_handler()
1038 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_PIO, &itv->i_flags)) { in ivtv_irq_handler()
1039 itv->irq_rr_idx++; in ivtv_irq_handler()
1041 int idx = (i + itv->irq_rr_idx) % IVTV_MAX_STREAMS; in ivtv_irq_handler()
1042 struct ivtv_stream *s = &itv->streams[idx]; in ivtv_irq_handler()
1044 if (!test_and_clear_bit(IVTV_F_S_PIO_PENDING, &s->s_flags)) in ivtv_irq_handler()
1046 if (s->type == IVTV_DEC_STREAM_TYPE_VBI || s->type < IVTV_DEC_STREAM_TYPE_MPG) in ivtv_irq_handler()
1052 if (test_and_clear_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags)) { in ivtv_irq_handler()
1053 kthread_queue_work(&itv->irq_worker, &itv->irq_work); in ivtv_irq_handler()
1056 spin_unlock(&itv->dma_reg_lock); in ivtv_irq_handler()
1069 if (!test_bit(IVTV_F_I_DMA, &itv->i_flags)) in ivtv_unfinished_dma()
1071 IVTV_ERR("DMA TIMEOUT %08x %d\n", read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); in ivtv_unfinished_dma()
1074 clear_bit(IVTV_F_I_UDMA, &itv->i_flags); in ivtv_unfinished_dma()
1075 clear_bit(IVTV_F_I_DMA, &itv->i_flags); in ivtv_unfinished_dma()
1076 itv->cur_dma_stream = -1; in ivtv_unfinished_dma()
1077 wake_up(&itv->dma_waitq); in ivtv_unfinished_dma()