Lines Matching +full:0 +full:xc5000
32 #include "xc5000.h"
71 } while (0)
84 sizes[0] = dev->ts_packet_size * dev->ts_packet_count; in queue_setup()
86 return 0; in queue_setup()
108 memset(risc, 0, sizeof(*risc)); in buffer_finish()
128 return 0; in start_streaming()
167 int ret = 0; in cx88_dvb_bus_ctrl()
184 dev->frontends.active_fe_id = 0; in cx88_dvb_bus_ctrl()
218 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 }; in dvico_fusionhdtv_demod_init()
219 static const u8 reset[] = { RESET, 0x80 }; in dvico_fusionhdtv_demod_init()
220 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; in dvico_fusionhdtv_demod_init()
221 static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 }; in dvico_fusionhdtv_demod_init()
222 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 }; in dvico_fusionhdtv_demod_init()
223 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; in dvico_fusionhdtv_demod_init()
233 return 0; in dvico_fusionhdtv_demod_init()
238 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 }; in dvico_dual_demod_init()
239 static const u8 reset[] = { RESET, 0x80 }; in dvico_dual_demod_init()
240 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; in dvico_dual_demod_init()
241 static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 }; in dvico_dual_demod_init()
242 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 }; in dvico_dual_demod_init()
243 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; in dvico_dual_demod_init()
254 return 0; in dvico_dual_demod_init()
259 static const u8 clock_config[] = { 0x89, 0x38, 0x39 }; in dntv_live_dvbt_demod_init()
260 static const u8 reset[] = { 0x50, 0x80 }; in dntv_live_dvbt_demod_init()
261 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 }; in dntv_live_dvbt_demod_init()
262 static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, in dntv_live_dvbt_demod_init()
263 0x00, 0xFF, 0x00, 0x40, 0x40 }; in dntv_live_dvbt_demod_init()
264 static const u8 dntv_extra[] = { 0xB5, 0x7A }; in dntv_live_dvbt_demod_init()
265 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; in dntv_live_dvbt_demod_init()
277 return 0; in dntv_live_dvbt_demod_init()
281 .demod_address = 0x0f,
286 .demod_address = 0x0f,
291 .demod_address = 0x0f,
296 .demod_address = (0x1e >> 1),
302 .demod_address = 0x08,
308 static const u8 clock_config[] = { 0x89, 0x38, 0x38 }; in dntv_live_dvbt_pro_demod_init()
309 static const u8 reset[] = { 0x50, 0x80 }; in dntv_live_dvbt_pro_demod_init()
310 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 }; in dntv_live_dvbt_pro_demod_init()
311 static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF, in dntv_live_dvbt_pro_demod_init()
312 0x00, 0xFF, 0x00, 0x40, 0x40 }; in dntv_live_dvbt_pro_demod_init()
313 static const u8 dntv_extra[] = { 0xB5, 0x7A }; in dntv_live_dvbt_pro_demod_init()
314 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; in dntv_live_dvbt_pro_demod_init()
326 return 0; in dntv_live_dvbt_pro_demod_init()
330 .demod_address = 0x0f,
337 .demod_address = 0x0f,
342 .demod_address = 0x0f,
348 .demod_address = 0x0f,
355 .demod_address = 0x0f,
359 .demod_address = 0x43,
364 .demod_address = 0x63,
372 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; in or51132_set_ts_param()
373 return 0; in or51132_set_ts_param()
377 .demod_address = 0x15,
387 if (index == 0) in lgdt330x_pll_rf_set()
391 return 0; in lgdt330x_pll_rf_set()
399 dev->ts_gen_cntrl |= 0x04; in lgdt330x_set_ts_param()
401 dev->ts_gen_cntrl &= ~0x04; in lgdt330x_set_ts_param()
402 return 0; in lgdt330x_set_ts_param()
407 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
413 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
419 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
427 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; in nxt200x_set_ts_param()
428 return 0; in nxt200x_set_ts_param()
432 .demod_address = 0x0a,
441 dev->ts_gen_cntrl = 0x02; in cx24123_set_ts_param()
442 return 0; in cx24123_set_ts_param()
452 cx_write(MO_GP0_IO, 0x000006fb); in kworld_dvbs_100_set_voltage()
454 cx_write(MO_GP0_IO, 0x000006f9); in kworld_dvbs_100_set_voltage()
458 return 0; in kworld_dvbs_100_set_voltage()
469 cx_write(MO_GP0_IO, 0x0000efff); in geniatech_dvbs_set_voltage()
474 return 0; in geniatech_dvbs_set_voltage()
483 cx_set(MO_GP0_IO, 0x6040); in tevii_dvbs_set_voltage()
486 cx_clear(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
489 cx_set(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
492 cx_clear(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
498 return 0; in tevii_dvbs_set_voltage()
510 cx_write(MO_GP0_IO, 0x00001220); in vp1027_set_voltage()
514 cx_write(MO_GP0_IO, 0x00001222); in vp1027_set_voltage()
518 cx_write(MO_GP0_IO, 0x00001230); in vp1027_set_voltage()
524 return 0; in vp1027_set_voltage()
528 .demod_address = 0x55,
533 .demod_address = 0x55,
538 .demod_address = 0x15,
544 .demod_address = 0x32 >> 1,
554 .demod_address = 0x32 >> 1,
563 .demod_address = 0x32 >> 1,
572 .i2c_address = 0x64,
577 .demod_address = (0x1e >> 1),
583 .demod_address = (0x1e >> 1),
599 .i2c_address = 0xc2 >> 1,
642 return 0; in attach_xc3028()
672 return 0; in attach_xc4000()
680 dev->ts_gen_cntrl = 0x2; in cx24116_set_ts_param()
682 return 0; in cx24116_set_ts_param()
690 dev->ts_gen_cntrl = 0; in stv0900_set_ts_param()
692 return 0; in stv0900_set_ts_param()
702 cx_write(MO_SRST_IO, 0); in cx24116_reset_device()
708 return 0; in cx24116_reset_device()
712 .demod_address = 0x05,
718 .demod_address = 0x55,
730 return 0; in ds3000_set_ts_param()
734 .demod_address = 0x68,
739 .tuner_address = 0x60,
744 .demod_address = 0x6a,
745 /* demod_mode = 0,*/
747 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
749 .tun1_maddress = 0,/* 0x60 */
750 .tun1_adc = 0,/* 2 Vpp */
756 .tuner_address = 0x60,
761 .demod_address = 0x68,
765 .skip_reinit = 0,
774 .demod_address = 0x68,
801 return 0; in cx8802_alloc_frontends()
805 0x01, 0x15,
806 0x02, 0x00,
807 0x03, 0x00,
808 0x04, 0x7D,
809 0x05, 0x0F,
810 0x06, 0x02,
811 0x07, 0x00,
812 0x08, 0x60,
814 0x0A, 0xC2,
815 0x0B, 0x00,
816 0x0C, 0x01,
817 0x0D, 0x81,
818 0x0E, 0x44,
819 0x0F, 0x09,
820 0x10, 0x3C,
821 0x11, 0x84,
822 0x12, 0xDA,
823 0x13, 0x99,
824 0x14, 0x8D,
825 0x15, 0xCE,
826 0x16, 0xE8,
827 0x17, 0x43,
828 0x18, 0x1C,
829 0x19, 0x1B,
830 0x1A, 0x1D,
832 0x1C, 0x12,
833 0x1D, 0x00,
834 0x1E, 0x00,
835 0x1F, 0x00,
836 0x20, 0x00,
837 0x21, 0x00,
838 0x22, 0x00,
839 0x23, 0x00,
841 0x28, 0x02,
842 0x29, 0x28,
843 0x2A, 0x14,
844 0x2B, 0x0F,
845 0x2C, 0x09,
846 0x2D, 0x05,
848 0x31, 0x1F,
849 0x32, 0x19,
850 0x33, 0xFC,
851 0x34, 0x13,
852 0xff, 0xff,
862 .addr = 0x61, in samsung_smt_7020_tuner_set_params()
863 .flags = 0, in samsung_smt_7020_tuner_set_params()
869 buf[0] = (div >> 8) & 0x7f; in samsung_smt_7020_tuner_set_params()
870 buf[1] = div & 0xff; in samsung_smt_7020_tuner_set_params()
871 buf[2] = 0x84; /* 0xC4 */ in samsung_smt_7020_tuner_set_params()
872 buf[3] = 0x00; in samsung_smt_7020_tuner_set_params()
875 buf[3] |= 0x10; in samsung_smt_7020_tuner_set_params()
883 return 0; in samsung_smt_7020_tuner_set_params()
892 cx_set(MO_GP0_IO, 0x0800); in samsung_smt_7020_set_tone()
896 cx_set(MO_GP0_IO, 0x08); in samsung_smt_7020_set_tone()
899 cx_clear(MO_GP0_IO, 0x08); in samsung_smt_7020_set_tone()
905 return 0; in samsung_smt_7020_set_tone()
917 .flags = 0, in samsung_smt_7020_set_voltage()
921 cx_set(MO_GP0_IO, 0x8000); in samsung_smt_7020_set_voltage()
928 cx_clear(MO_GP0_IO, 0x80); in samsung_smt_7020_set_voltage()
932 cx_clear(MO_GP0_IO, 0x80); in samsung_smt_7020_set_voltage()
938 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO; in samsung_smt_7020_set_voltage()
944 u8 aclk = 0; in samsung_smt_7020_stv0299_set_symbol_rate()
945 u8 bclk = 0; in samsung_smt_7020_stv0299_set_symbol_rate()
948 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
949 bclk = 0x47; in samsung_smt_7020_stv0299_set_symbol_rate()
951 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
952 bclk = 0x4b; in samsung_smt_7020_stv0299_set_symbol_rate()
954 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
955 bclk = 0x4f; in samsung_smt_7020_stv0299_set_symbol_rate()
957 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
958 bclk = 0x53; in samsung_smt_7020_stv0299_set_symbol_rate()
960 aclk = 0xb6; in samsung_smt_7020_stv0299_set_symbol_rate()
961 bclk = 0x53; in samsung_smt_7020_stv0299_set_symbol_rate()
963 aclk = 0xb4; in samsung_smt_7020_stv0299_set_symbol_rate()
964 bclk = 0x51; in samsung_smt_7020_stv0299_set_symbol_rate()
967 stv0299_writereg(fe, 0x13, aclk); in samsung_smt_7020_stv0299_set_symbol_rate()
968 stv0299_writereg(fe, 0x14, bclk); in samsung_smt_7020_stv0299_set_symbol_rate()
969 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); in samsung_smt_7020_stv0299_set_symbol_rate()
970 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); in samsung_smt_7020_stv0299_set_symbol_rate()
971 stv0299_writereg(fe, 0x21, ratio & 0xf0); in samsung_smt_7020_stv0299_set_symbol_rate()
973 return 0; in samsung_smt_7020_stv0299_set_symbol_rate()
977 .demod_address = 0x68,
980 .invert = 0,
981 .skip_reinit = 0,
992 int mfe_shared = 0; /* bus not shared by default */ in dvb_register()
995 if (core->i2c_rc != 0) { in dvb_register()
1006 dev->frontends.gate = 0; in dvb_register()
1019 0x61, &core->i2c_adap, in dvb_register()
1033 0x60, &core->i2c_adap, in dvb_register()
1047 &core->i2c_adap, 0x61, in dvb_register()
1058 &core->i2c_adap, 0x61, in dvb_register()
1075 0x08, ISL6421_DCL, 0x00, false)) in dvb_register()
1091 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) in dvb_register()
1101 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1111 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1125 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1135 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1145 0x61, NULL, DVB_PLL_LG_Z201)) in dvb_register()
1157 0x61, NULL, DVB_PLL_UNKNOWN_1)) in dvb_register()
1169 &core->i2c_adap, 0x61, in dvb_register()
1183 &core->i2c_adap, 0x61, in dvb_register()
1203 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1211 &core->i2c_adap, 0x61, in dvb_register()
1217 dev->ts_gen_cntrl = 0x08; in dvb_register()
1229 0x0e, in dvb_register()
1233 &core->i2c_adap, 0x61, in dvb_register()
1239 dev->ts_gen_cntrl = 0x08; in dvb_register()
1248 0x0e, in dvb_register()
1252 &core->i2c_adap, 0x61, in dvb_register()
1258 dev->ts_gen_cntrl = 0x08; in dvb_register()
1267 0x0e, in dvb_register()
1271 &core->i2c_adap, 0x61, in dvb_register()
1275 &core->i2c_adap, 0x43)) in dvb_register()
1280 dev->ts_gen_cntrl = 0x08; in dvb_register()
1289 0x59, in dvb_register()
1293 &core->i2c_adap, 0x61, in dvb_register()
1297 &core->i2c_adap, 0x43)) in dvb_register()
1307 &core->i2c_adap, 0x61, in dvb_register()
1326 &core->i2c_adap, 0x08, ISL6421_DCL, in dvb_register()
1327 0x00, override_tone)) in dvb_register()
1368 .i2c_addr = 0x61, in dvb_register()
1390 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1401 .i2c_address = 0x61, in dvb_register()
1402 .default_pm = 0, in dvb_register()
1408 if (attach_xc4000(dev, &cfg) < 0) in dvb_register()
1413 dev->ts_gen_cntrl = 0x00; in dvb_register()
1418 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1425 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1451 0x08, ISL6421_DCL, 0x00, false)) in dvb_register()
1467 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) in dvb_register()
1479 0x08, ISL6421_DCL, 0x00, false)) in dvb_register()
1490 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, in dvb_register()
1502 fe0->dvb.frontend, 0x61, in dvb_register()
1544 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1553 &core->i2c_adap, 0); in dvb_register()
1574 dev->ts_gen_cntrl = 0x08; in dvb_register()
1576 cx_set(MO_GP0_IO, 0x0101); in dvb_register()
1578 cx_clear(MO_GP0_IO, 0x01); in dvb_register()
1580 cx_set(MO_GP0_IO, 0x01); in dvb_register()
1599 dev->ts_gen_cntrl = 0x00; in dvb_register()
1651 int err = 0; in cx8802_dvb_advise_acquire()
1662 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1664 cx_clear(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1666 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1669 cx_clear(MO_GP0_IO, 0x00000004); in cx8802_dvb_advise_acquire()
1676 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1678 cx_clear(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1680 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1685 cx_set(MO_GP0_IO, 0x00000004); in cx8802_dvb_advise_acquire()
1688 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */ in cx8802_dvb_advise_acquire()
1692 cx_write(MO_SRST_IO, 0); in cx8802_dvb_advise_acquire()
1694 cx_clear(MO_GP0_IO, 0x00000004); in cx8802_dvb_advise_acquire()
1695 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */ in cx8802_dvb_advise_acquire()
1703 cx_write(MO_GP2_IO, 0x0101); in cx8802_dvb_advise_acquire()
1716 int err = 0; in cx8802_dvb_advise_release()
1752 /* If vp3054 isn't enabled, a stub will just return 0 */ in cx8802_dvb_probe()
1754 if (err != 0) in cx8802_dvb_probe()
1759 dev->ts_gen_cntrl = 0x0c; in cx8802_dvb_probe()
1789 if (err < 0) in cx8802_dvb_probe()
1820 return 0; in cx8802_dvb_remove()