Lines Matching refs:cx_read

378 	v = cx_read(PCI_INT_MSK);  in cx23885_irq_get_mask()
553 cx_read(ch->cmds_start + 4*i)); in cx23885_sram_channel_dump()
556 risc = cx_read(ch->cmds_start + 4 * (i + 14)); in cx23885_sram_channel_dump()
561 risc = cx_read(ch->ctrl_start + 4 * i); in cx23885_sram_channel_dump()
568 risc = cx_read(ch->ctrl_start + 4 * (i + j)); in cx23885_sram_channel_dump()
579 dev->name, cx_read(ch->ptr1_reg)); in cx23885_sram_channel_dump()
581 dev->name, cx_read(ch->ptr2_reg)); in cx23885_sram_channel_dump()
583 dev->name, cx_read(ch->cnt1_reg)); in cx23885_sram_channel_dump()
585 dev->name, cx_read(ch->cnt2_reg)); in cx23885_sram_channel_dump()
614 reg1_val = cx_read(TC_REQ); /* read-only */ in cx23885_clear_bridge_error()
615 reg2_val = cx_read(TC_REQ_SET); in cx23885_clear_bridge_error()
620 cx_read(VID_B_DMA); in cx23885_clear_bridge_error()
621 cx_read(VBI_B_DMA); in cx23885_clear_bridge_error()
622 cx_read(VID_C_DMA); in cx23885_clear_bridge_error()
623 cx_read(VBI_C_DMA); in cx23885_clear_bridge_error()
673 cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000); in cx23885_reset()
804 switch (cx_read(RDR_CFG2) & 0xff) { in cx23885_dev_checkrevision()
1339 cx_read(DEV_CNTRL2)); in cx23885_tsport_reg_dump()
1343 cx_read(AUDIO_INT_INT_MSK)); in cx23885_tsport_reg_dump()
1345 cx_read(AUD_INT_DMA_CTL)); in cx23885_tsport_reg_dump()
1347 cx_read(AUDIO_EXT_INT_MSK)); in cx23885_tsport_reg_dump()
1349 cx_read(AUD_EXT_DMA_CTL)); in cx23885_tsport_reg_dump()
1351 cx_read(PAD_CTRL)); in cx23885_tsport_reg_dump()
1353 cx_read(ALT_PIN_OUT_SEL)); in cx23885_tsport_reg_dump()
1355 cx_read(GPIO2)); in cx23885_tsport_reg_dump()
1357 port->reg_gpcnt, cx_read(port->reg_gpcnt)); in cx23885_tsport_reg_dump()
1359 port->reg_gpcnt_ctl, cx_read(port->reg_gpcnt_ctl)); in cx23885_tsport_reg_dump()
1361 port->reg_dma_ctl, cx_read(port->reg_dma_ctl)); in cx23885_tsport_reg_dump()
1364 port->reg_src_sel, cx_read(port->reg_src_sel)); in cx23885_tsport_reg_dump()
1366 port->reg_lngth, cx_read(port->reg_lngth)); in cx23885_tsport_reg_dump()
1368 port->reg_hw_sop_ctrl, cx_read(port->reg_hw_sop_ctrl)); in cx23885_tsport_reg_dump()
1370 port->reg_gen_ctrl, cx_read(port->reg_gen_ctrl)); in cx23885_tsport_reg_dump()
1372 port->reg_bd_pkt_status, cx_read(port->reg_bd_pkt_status)); in cx23885_tsport_reg_dump()
1374 port->reg_sop_status, cx_read(port->reg_sop_status)); in cx23885_tsport_reg_dump()
1376 port->reg_fifo_ovfl_stat, cx_read(port->reg_fifo_ovfl_stat)); in cx23885_tsport_reg_dump()
1378 port->reg_vld_misc, cx_read(port->reg_vld_misc)); in cx23885_tsport_reg_dump()
1380 port->reg_ts_clk_en, cx_read(port->reg_ts_clk_en)); in cx23885_tsport_reg_dump()
1382 port->reg_ts_int_msk, cx_read(port->reg_ts_int_msk)); in cx23885_tsport_reg_dump()
1384 port->reg_ts_int_stat, cx_read(port->reg_ts_int_stat)); in cx23885_tsport_reg_dump()
1386 cx_read(PCI_INT_STAT)); in cx23885_tsport_reg_dump()
1388 cx_read(VID_B_INT_MSTAT)); in cx23885_tsport_reg_dump()
1390 cx_read(VID_B_INT_SSTAT)); in cx23885_tsport_reg_dump()
1392 cx_read(VID_C_INT_MSTAT)); in cx23885_tsport_reg_dump()
1394 cx_read(VID_C_INT_SSTAT)); in cx23885_tsport_reg_dump()
1457 reg = cx_read(PAD_CTRL); in cx23885_start_dma()
1464 reg = cx_read(PAD_CTRL); in cx23885_start_dma()
1471 reg = cx_read(PAD_CTRL); in cx23885_start_dma()
1481 cx_write(CLK_DELAY, cx_read(CLK_DELAY) | 0x80000011); in cx23885_start_dma()
1548 reg1_val = cx_read(TC_REQ); in cx23885_stop_dma()
1549 reg2_val = cx_read(TC_REQ_SET); in cx23885_stop_dma()
1558 reg = cx_read(PAD_CTRL); in cx23885_stop_dma()
1683 count = cx_read(port->reg_gpcnt); in cx23885_irq_417()
1685 status, cx_read(port->reg_ts_int_msk), count); in cx23885_irq_417()
1767 count = cx_read(port->reg_gpcnt); in cx23885_irq_ts()
1794 pci_status = cx_read(PCI_INT_STAT); in cx23885_irq()
1802 vida_status = cx_read(VID_A_INT_STAT); in cx23885_irq()
1803 vida_mask = cx_read(VID_A_INT_MSK); in cx23885_irq()
1804 audint_status = cx_read(AUDIO_INT_INT_STAT); in cx23885_irq()
1805 audint_mask = cx_read(AUDIO_INT_INT_MSK); in cx23885_irq()
1806 ts1_status = cx_read(VID_B_INT_STAT); in cx23885_irq()
1807 ts1_mask = cx_read(VID_B_INT_MSK); in cx23885_irq()
1808 ts2_status = cx_read(VID_C_INT_STAT); in cx23885_irq()
1809 ts2_mask = cx_read(VID_C_INT_MSK); in cx23885_irq()
1816 vida_count = cx_read(VID_A_GPCNT); in cx23885_irq()
1817 audint_count = cx_read(AUD_INT_A_GPCNT); in cx23885_irq()
1818 ts1_count = cx_read(ts1->reg_gpcnt); in cx23885_irq()
1819 ts2_count = cx_read(ts2->reg_gpcnt); in cx23885_irq()
2034 return (cx_read(GP0_IO) >> 8) & mask & 0x7; in cx23885_gpio_get()
2040 return (cx_read(MC417_RWD) & ((mask & 0x7fff8) >> 3)) << 3; in cx23885_gpio_get()