Lines Matching +full:0 +full:x0a60
30 #define VGXY61_REG_MODEL_ID CCI_REG16_LE(0x0000)
31 #define VG5661_MODEL_ID 0x5661
32 #define VG5761_MODEL_ID 0x5761
33 #define VGXY61_REG_REVISION CCI_REG16_LE(0x0002)
34 #define VGXY61_REG_FWPATCH_REVISION CCI_REG16_LE(0x0014)
35 #define VGXY61_REG_FWPATCH_START_ADDR CCI_REG8(0x2000)
36 #define VGXY61_REG_SYSTEM_FSM CCI_REG8(0x0020)
37 #define VGXY61_SYSTEM_FSM_SW_STBY 0x03
38 #define VGXY61_SYSTEM_FSM_STREAMING 0x04
39 #define VGXY61_REG_NVM CCI_REG8(0x0023)
40 #define VGXY61_NVM_OK 0x04
41 #define VGXY61_REG_STBY CCI_REG8(0x0201)
42 #define VGXY61_STBY_NO_REQ 0
44 #define VGXY61_REG_STREAMING CCI_REG8(0x0202)
45 #define VGXY61_STREAMING_NO_REQ 0
46 #define VGXY61_STREAMING_REQ_STOP BIT(0)
48 #define VGXY61_REG_EXT_CLOCK CCI_REG32_LE(0x0220)
49 #define VGXY61_REG_CLK_PLL_PREDIV CCI_REG8(0x0224)
50 #define VGXY61_REG_CLK_SYS_PLL_MULT CCI_REG8(0x0225)
51 #define VGXY61_REG_GPIO_0_CTRL CCI_REG8(0x0236)
52 #define VGXY61_REG_GPIO_1_CTRL CCI_REG8(0x0237)
53 #define VGXY61_REG_GPIO_2_CTRL CCI_REG8(0x0238)
54 #define VGXY61_REG_GPIO_3_CTRL CCI_REG8(0x0239)
55 #define VGXY61_REG_SIGNALS_POLARITY_CTRL CCI_REG8(0x023b)
56 #define VGXY61_REG_LINE_LENGTH CCI_REG16_LE(0x0300)
57 #define VGXY61_REG_ORIENTATION CCI_REG8(0x0302)
58 #define VGXY61_REG_VT_CTRL CCI_REG8(0x0304)
59 #define VGXY61_REG_FORMAT_CTRL CCI_REG8(0x0305)
60 #define VGXY61_REG_OIF_CTRL CCI_REG16_LE(0x0306)
61 #define VGXY61_REG_OIF_ROI0_CTRL CCI_REG8(0x030a)
62 #define VGXY61_REG_ROI0_START_H CCI_REG16_LE(0x0400)
63 #define VGXY61_REG_ROI0_START_V CCI_REG16_LE(0x0402)
64 #define VGXY61_REG_ROI0_END_H CCI_REG16_LE(0x0404)
65 #define VGXY61_REG_ROI0_END_V CCI_REG16_LE(0x0406)
66 #define VGXY61_REG_PATGEN_CTRL CCI_REG32_LE(0x0440)
68 #define VGXY61_PATGEN_SHORT_ENABLE BIT(0)
71 #define VGXY61_REG_FRAME_CONTENT_CTRL CCI_REG8(0x0478)
72 #define VGXY61_REG_COARSE_EXPOSURE_LONG CCI_REG16_LE(0x0500)
73 #define VGXY61_REG_COARSE_EXPOSURE_SHORT CCI_REG16_LE(0x0504)
74 #define VGXY61_REG_ANALOG_GAIN CCI_REG8(0x0508)
75 #define VGXY61_REG_DIGITAL_GAIN_LONG CCI_REG16_LE(0x050a)
76 #define VGXY61_REG_DIGITAL_GAIN_SHORT CCI_REG16_LE(0x0512)
77 #define VGXY61_REG_FRAME_LENGTH CCI_REG16_LE(0x051a)
78 #define VGXY61_REG_SIGNALS_CTRL CCI_REG16_LE(0x0522)
80 #define VGXY61_REG_READOUT_CTRL CCI_REG8(0x0530)
81 #define VGXY61_REG_HDR_CTRL CCI_REG8(0x0532)
82 #define VGXY61_REG_PATGEN_LONG_DATA_GR CCI_REG16_LE(0x092c)
83 #define VGXY61_REG_PATGEN_LONG_DATA_R CCI_REG16_LE(0x092e)
84 #define VGXY61_REG_PATGEN_LONG_DATA_B CCI_REG16_LE(0x0930)
85 #define VGXY61_REG_PATGEN_LONG_DATA_GB CCI_REG16_LE(0x0932)
86 #define VGXY61_REG_PATGEN_SHORT_DATA_GR CCI_REG16_LE(0x0950)
87 #define VGXY61_REG_PATGEN_SHORT_DATA_R CCI_REG16_LE(0x0952)
88 #define VGXY61_REG_PATGEN_SHORT_DATA_B CCI_REG16_LE(0x0954)
89 #define VGXY61_REG_PATGEN_SHORT_DATA_GB CCI_REG16_LE(0x0956)
90 #define VGXY61_REG_BYPASS_CTRL CCI_REG8(0x0a60)
112 #define VGXY61_FWPATCH_REVISION_MINOR 0
116 0xbf, 0x00, 0x05, 0x20, 0x06, 0x01, 0xe0, 0xe0, 0x04, 0x80, 0xe6, 0x45,
117 0xed, 0x6f, 0xfe, 0xff, 0x14, 0x80, 0x1f, 0x84, 0x10, 0x42, 0x05, 0x7c,
118 0x01, 0xc4, 0x1e, 0x80, 0xb6, 0x42, 0x00, 0xe0, 0x1e, 0x82, 0x1e, 0xc0,
119 0x93, 0xdd, 0xc3, 0xc1, 0x0c, 0x04, 0x00, 0xfa, 0x86, 0x0d, 0x70, 0xe1,
120 0x04, 0x98, 0x15, 0x00, 0x28, 0xe0, 0x14, 0x02, 0x08, 0xfc, 0x15, 0x40,
121 0x28, 0xe0, 0x98, 0x58, 0xe0, 0xef, 0x04, 0x98, 0x0e, 0x04, 0x00, 0xf0,
122 0x15, 0x00, 0x28, 0xe0, 0x19, 0xc8, 0x15, 0x40, 0x28, 0xe0, 0xc6, 0x41,
123 0xfc, 0xe0, 0x14, 0x80, 0x1f, 0x84, 0x14, 0x02, 0xa0, 0xfc, 0x1e, 0x80,
124 0x14, 0x80, 0x14, 0x02, 0x80, 0xfb, 0x14, 0x02, 0xe0, 0xfc, 0x1e, 0x80,
125 0x14, 0xc0, 0x1f, 0x84, 0x14, 0x02, 0xa4, 0xfc, 0x1e, 0xc0, 0x14, 0xc0,
126 0x14, 0x02, 0x80, 0xfb, 0x14, 0x02, 0xe4, 0xfc, 0x1e, 0xc0, 0x0c, 0x0c,
127 0x00, 0xf2, 0x93, 0xdd, 0x86, 0x00, 0xf8, 0xe0, 0x04, 0x80, 0xc6, 0x03,
128 0x70, 0xe1, 0x0e, 0x84, 0x93, 0xdd, 0xc3, 0xc1, 0x0c, 0x04, 0x00, 0xfa,
129 0x6b, 0x80, 0x06, 0x40, 0x6c, 0xe1, 0x04, 0x80, 0x09, 0x00, 0xe0, 0xe0,
130 0x0b, 0xa1, 0x95, 0x84, 0x05, 0x0c, 0x1c, 0xe0, 0x86, 0x02, 0xf9, 0x60,
131 0xe0, 0xcf, 0x78, 0x6e, 0x80, 0xef, 0x25, 0x0c, 0x18, 0xe0, 0x05, 0x4c,
132 0x1c, 0xe0, 0x86, 0x02, 0xf9, 0x60, 0xe0, 0xcf, 0x0b, 0x84, 0xd8, 0x6d,
133 0x80, 0xef, 0x05, 0x4c, 0x18, 0xe0, 0x04, 0xd8, 0x0b, 0xa5, 0x95, 0x84,
134 0x05, 0x0c, 0x2c, 0xe0, 0x06, 0x02, 0x01, 0x60, 0xe0, 0xce, 0x18, 0x6d,
135 0x80, 0xef, 0x25, 0x0c, 0x30, 0xe0, 0x05, 0x4c, 0x2c, 0xe0, 0x06, 0x02,
136 0x01, 0x60, 0xe0, 0xce, 0x0b, 0x84, 0x78, 0x6c, 0x80, 0xef, 0x05, 0x4c,
137 0x30, 0xe0, 0x0c, 0x0c, 0x00, 0xf2, 0x93, 0xdd, 0x46, 0x01, 0x70, 0xe1,
138 0x08, 0x80, 0x0b, 0xa1, 0x08, 0x5c, 0x00, 0xda, 0x06, 0x01, 0x68, 0xe1,
139 0x04, 0x80, 0x4a, 0x40, 0x84, 0xe0, 0x08, 0x5c, 0x00, 0x9a, 0x06, 0x01,
140 0xe0, 0xe0, 0x04, 0x80, 0x15, 0x00, 0x60, 0xe0, 0x19, 0xc4, 0x15, 0x40,
141 0x60, 0xe0, 0x15, 0x00, 0x78, 0xe0, 0x19, 0xc4, 0x15, 0x40, 0x78, 0xe0,
142 0x93, 0xdd, 0xc3, 0xc1, 0x46, 0x01, 0x70, 0xe1, 0x08, 0x80, 0x0b, 0xa1,
143 0x08, 0x5c, 0x00, 0xda, 0x06, 0x01, 0x68, 0xe1, 0x04, 0x80, 0x4a, 0x40,
144 0x84, 0xe0, 0x08, 0x5c, 0x00, 0x9a, 0x06, 0x01, 0xe0, 0xe0, 0x14, 0x80,
145 0x25, 0x02, 0x54, 0xe0, 0x29, 0xc4, 0x25, 0x42, 0x54, 0xe0, 0x24, 0x80,
146 0x35, 0x04, 0x6c, 0xe0, 0x39, 0xc4, 0x35, 0x44, 0x6c, 0xe0, 0x25, 0x02,
147 0x64, 0xe0, 0x29, 0xc4, 0x25, 0x42, 0x64, 0xe0, 0x04, 0x80, 0x15, 0x00,
148 0x7c, 0xe0, 0x19, 0xc4, 0x15, 0x40, 0x7c, 0xe0, 0x93, 0xdd, 0xc3, 0xc1,
149 0x4c, 0x04, 0x7c, 0xfa, 0x86, 0x40, 0x98, 0xe0, 0x14, 0x80, 0x1b, 0xa1,
150 0x06, 0x00, 0x00, 0xc0, 0x08, 0x42, 0x38, 0xdc, 0x08, 0x64, 0xa0, 0xef,
151 0x86, 0x42, 0x3c, 0xe0, 0x68, 0x49, 0x80, 0xef, 0x6b, 0x80, 0x78, 0x53,
152 0xc8, 0xef, 0xc6, 0x54, 0x6c, 0xe1, 0x7b, 0x80, 0xb5, 0x14, 0x0c, 0xf8,
153 0x05, 0x14, 0x14, 0xf8, 0x1a, 0xac, 0x8a, 0x80, 0x0b, 0x90, 0x38, 0x55,
154 0x80, 0xef, 0x1a, 0xae, 0x17, 0xc2, 0x03, 0x82, 0x88, 0x65, 0x80, 0xef,
155 0x1b, 0x80, 0x0b, 0x8e, 0x68, 0x65, 0x80, 0xef, 0x9b, 0x80, 0x0b, 0x8c,
156 0x08, 0x65, 0x80, 0xef, 0x6b, 0x80, 0x0b, 0x92, 0x1b, 0x8c, 0x98, 0x64,
157 0x80, 0xef, 0x1a, 0xec, 0x9b, 0x80, 0x0b, 0x90, 0x95, 0x54, 0x10, 0xe0,
158 0xa8, 0x53, 0x80, 0xef, 0x1a, 0xee, 0x17, 0xc2, 0x03, 0x82, 0xf8, 0x63,
159 0x80, 0xef, 0x1b, 0x80, 0x0b, 0x8e, 0xd8, 0x63, 0x80, 0xef, 0x1b, 0x8c,
160 0x68, 0x63, 0x80, 0xef, 0x6b, 0x80, 0x0b, 0x92, 0x65, 0x54, 0x14, 0xe0,
161 0x08, 0x65, 0x84, 0xef, 0x68, 0x63, 0x80, 0xef, 0x7b, 0x80, 0x0b, 0x8c,
162 0xa8, 0x64, 0x84, 0xef, 0x08, 0x63, 0x80, 0xef, 0x14, 0xe8, 0x46, 0x44,
163 0x94, 0xe1, 0x24, 0x88, 0x4a, 0x4e, 0x04, 0xe0, 0x14, 0xea, 0x1a, 0x04,
164 0x08, 0xe0, 0x0a, 0x40, 0x84, 0xed, 0x0c, 0x04, 0x00, 0xe2, 0x4a, 0x40,
165 0x04, 0xe0, 0x19, 0x16, 0xc0, 0xe0, 0x0a, 0x40, 0x84, 0xed, 0x21, 0x54,
166 0x60, 0xe0, 0x0c, 0x04, 0x00, 0xe2, 0x1b, 0xa5, 0x0e, 0xea, 0x01, 0x89,
167 0x21, 0x54, 0x64, 0xe0, 0x7e, 0xe8, 0x65, 0x82, 0x1b, 0xa7, 0x26, 0x00,
168 0x00, 0x80, 0xa5, 0x82, 0x1b, 0xa9, 0x65, 0x82, 0x1b, 0xa3, 0x01, 0x85,
169 0x16, 0x00, 0x00, 0xc0, 0x01, 0x54, 0x04, 0xf8, 0x06, 0xaa, 0x01, 0x83,
170 0x06, 0xa8, 0x65, 0x81, 0x06, 0xa8, 0x01, 0x54, 0x04, 0xf8, 0x01, 0x83,
171 0x06, 0xaa, 0x09, 0x14, 0x18, 0xf8, 0x0b, 0xa1, 0x05, 0x84, 0xc6, 0x42,
172 0xd4, 0xe0, 0x14, 0x84, 0x01, 0x83, 0x01, 0x54, 0x60, 0xe0, 0x01, 0x54,
173 0x64, 0xe0, 0x0b, 0x02, 0x90, 0xe0, 0x10, 0x02, 0x90, 0xe5, 0x01, 0x54,
174 0x88, 0xe0, 0xb5, 0x81, 0xc6, 0x40, 0xd4, 0xe0, 0x14, 0x80, 0x0b, 0x02,
175 0xe0, 0xe4, 0x10, 0x02, 0x31, 0x66, 0x02, 0xc0, 0x01, 0x54, 0x88, 0xe0,
176 0x1a, 0x84, 0x29, 0x14, 0x10, 0xe0, 0x1c, 0xaa, 0x2b, 0xa1, 0xf5, 0x82,
177 0x25, 0x14, 0x10, 0xf8, 0x2b, 0x04, 0xa8, 0xe0, 0x20, 0x44, 0x0d, 0x70,
178 0x03, 0xc0, 0x2b, 0xa1, 0x04, 0x00, 0x80, 0x9a, 0x02, 0x40, 0x84, 0x90,
179 0x03, 0x54, 0x04, 0x80, 0x4c, 0x0c, 0x7c, 0xf2, 0x93, 0xdd, 0x00, 0x00,
180 0x02, 0xa9, 0x00, 0x00, 0x64, 0x4a, 0x40, 0x00, 0x08, 0x2d, 0x58, 0xe0,
181 0xa8, 0x98, 0x40, 0x00, 0x28, 0x07, 0x34, 0xe0, 0x05, 0xb9, 0x00, 0x00,
182 0x28, 0x00, 0x41, 0x05, 0x88, 0x00, 0x41, 0x3c, 0x98, 0x00, 0x41, 0x52,
183 0x04, 0x01, 0x41, 0x79, 0x3c, 0x01, 0x41, 0x6a, 0x3d, 0xfe, 0x00, 0x00,
282 .left = 0,
283 .top = 0,
329 .left = 0,
330 .top = 0,
434 for (i = 0; i < ARRAY_SIZE(vgxy61_supported_codes); i++) { in get_bpp_by_code()
447 for (i = 0; i < ARRAY_SIZE(vgxy61_supported_codes); i++) { in get_data_type_by_code()
466 for (i = 0; i < ARRAY_SIZE(predivs); i++) { in compute_pll_parameters_by_freq()
521 if (ret < 0) in vgxy61_write_array()
528 return 0; in vgxy61_write_array()
539 ((ret < 0) || (val == poll_val)), in vgxy61_poll_reg()
572 return bit_per_line > max_bit_per_line ? -EINVAL : 0; in vgxy61_check_bw()
577 int ret = 0; in vgxy61_apply_exposure()
580 cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_SHORT, 0, &ret); in vgxy61_apply_exposure()
593 for (i = 0; i < ARRAY_SIZE(vgxy61_supply_name); i++) in vgxy61_get_regulators()
603 gpiod_set_value_cansleep(sensor->reset_gpio, 0); in vgxy61_apply_reset()
607 gpiod_set_value_cansleep(sensor->reset_gpio, 0); in vgxy61_apply_reset()
635 for (index = 0; index < ARRAY_SIZE(vgxy61_supported_codes); index++) { in vgxy61_try_fmt_internal()
640 index = 0; in vgxy61_try_fmt_internal()
651 return 0; in vgxy61_try_fmt_internal()
663 return 0; in vgxy61_get_selection()
667 sel->r.top = 0; in vgxy61_get_selection()
668 sel->r.left = 0; in vgxy61_get_selection()
671 return 0; in vgxy61_get_selection()
686 return 0; in vgxy61_enum_mbus_code()
707 return 0; in vgxy61_get_fmt()
737 return 0; in vgxy61_enum_frame_size()
747 return 0; in vgxy61_update_analog_gain()
753 int ret = 0; in vgxy61_apply_digital_gain()
774 return 0; in vgxy61_update_digital_gain()
780 0x0, 0x1, 0x2, 0x3, 0x10, 0x11, 0x12, 0x13 in vgxy61_apply_patgen()
797 return 0; in vgxy61_update_patgen()
804 static const u8 index2val[] = {0x0, 0x1, 0x3}; in vgxy61_apply_gpiox_strobe_mode()
807 mask = 0xf << (idx * VGXY61_SIGNALS_GPIO_ID_SHIFT); in vgxy61_apply_gpiox_strobe_mode()
835 return 0; in vgxy61_update_gpios_strobe_mode()
837 for (i = 0; i < VGXY61_NB_GPIOS; i++) { in vgxy61_update_gpios_strobe_mode()
845 return 0; in vgxy61_update_gpios_strobe_mode()
851 int ret = 0; in vgxy61_update_gpios_strobe_polarity()
903 u16 new_expo_short = 0; in vgxy61_update_exposure()
904 u16 expo_short_max = 0; in vgxy61_update_exposure()
906 u16 expo_long_max = 0; in vgxy61_update_exposure()
940 * As short expo is 0 here, only the second rule of thumb in vgxy61_update_exposure()
968 return 0; in vgxy61_update_exposure()
994 return 0; in vgxy61_update_vblank()
1000 static const u8 index2val[] = {0x1, 0x4, 0xa}; in vgxy61_apply_hdr()
1029 return 0; in vgxy61_update_hdr()
1066 for (i = 0; i < VGXY61_NB_GPIOS; i++) { in vgxy61_apply_settings()
1073 return 0; in vgxy61_apply_settings()
1080 int ret = 0; in vgxy61_stream_enable()
1129 return 0; in vgxy61_stream_enable()
1170 int ret = 0; in vgxy61_s_stream()
1205 fmt = v4l2_subdev_state_get_format(sd_state, 0); in vgxy61_set_fmt()
1225 0xffff - new_mode->crop.height, in vgxy61_set_fmt()
1243 struct v4l2_subdev_format fmt = { 0 }; in vgxy61_init_state()
1279 ret = 0; in vgxy61_s_ctrl()
1289 0xffff - cur_mode->crop.height, in vgxy61_s_ctrl()
1326 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, 0, 0x1c, 1, in vgxy61_init_controls()
1328 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_DIGITAL_GAIN, 0, 0xfff, 1, in vgxy61_init_controls()
1332 0, 0, vgxy61_test_pattern_menu); in vgxy61_init_controls()
1333 ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, 0, in vgxy61_init_controls()
1339 ARRAY_SIZE(link_freq) - 1, 0, link_freq); in vgxy61_init_controls()
1343 ARRAY_SIZE(vgxy61_hdr_mode_menu) - 1, 0, in vgxy61_init_controls()
1362 0xffff - cur_mode->crop.height, in vgxy61_init_controls()
1365 0, 1, 1, sensor->vflip); in vgxy61_init_controls()
1367 0, 1, 1, sensor->hflip); in vgxy61_init_controls()
1383 return 0; in vgxy61_init_controls()
1426 u32 log2phy[VGXY61_NB_POLARITIES] = {~0, ~0, ~0, ~0, ~0}; in vgxy61_tx_from_ep()
1427 u32 phy2log[VGXY61_NB_POLARITIES] = {~0, ~0, ~0, ~0, ~0}; in vgxy61_tx_from_ep()
1428 int polarities[VGXY61_NB_POLARITIES] = {0, 0, 0, 0, 0}; in vgxy61_tx_from_ep()
1444 log2phy[0] = ep.bus.mipi_csi2.clock_lane; in vgxy61_tx_from_ep()
1445 phy2log[log2phy[0]] = 0; in vgxy61_tx_from_ep()
1454 for (p = 0; p < VGXY61_NB_POLARITIES; p++) { in vgxy61_tx_from_ep()
1455 if (phy2log[p] != ~0) in vgxy61_tx_from_ep()
1461 for (l = 0; l < l_nb + 1; l++) in vgxy61_tx_from_ep()
1464 if (log2phy[0] != 0) { in vgxy61_tx_from_ep()
1465 dev_err(&client->dev, "clk lane must be map to physical lane 0\n"); in vgxy61_tx_from_ep()
1472 (polarities[0] << 3) + in vgxy61_tx_from_ep()
1477 for (i = 0; i < VGXY61_NB_POLARITIES; i++) { in vgxy61_tx_from_ep()
1482 dev_dbg(&client->dev, "oif_ctrl = 0x%04x\n", sensor->oif_ctrl); in vgxy61_tx_from_ep()
1486 return 0; in vgxy61_tx_from_ep()
1499 int ret = 0; in vgxy61_configure()
1509 if (ret < 0) in vgxy61_configure()
1516 cci_write(sensor->regmap, VGXY61_REG_FRAME_CONTENT_CTRL, 0, &ret); in vgxy61_configure()
1522 cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_GR, 0x800, &ret); in vgxy61_configure()
1523 cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_R, 0x800, &ret); in vgxy61_configure()
1524 cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_B, 0x800, &ret); in vgxy61_configure()
1525 cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_GB, 0x800, &ret); in vgxy61_configure()
1526 cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_GR, 0x800, &ret); in vgxy61_configure()
1527 cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_R, 0x800, &ret); in vgxy61_configure()
1528 cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_B, 0x800, &ret); in vgxy61_configure()
1529 cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_GB, 0x800, &ret); in vgxy61_configure()
1533 return 0; in vgxy61_configure()
1544 cci_write(sensor->regmap, VGXY61_REG_STBY, 0x10, &ret); in vgxy61_patch()
1548 ret = vgxy61_poll_reg(sensor, VGXY61_REG_STBY, 0, VGXY61_TIMEOUT_MS); in vgxy61_patch()
1550 if (ret < 0) in vgxy61_patch()
1561 (u16)patch >> 12, ((u16)patch >> 8) & 0x0f, (u16)patch & 0xff); in vgxy61_patch()
1565 (u16)patch >> 12, ((u16)patch >> 8) & 0x0f, (u16)patch & 0xff); in vgxy61_patch()
1567 return 0; in vgxy61_patch()
1577 if (ret < 0) in vgxy61_detect_cut_version()
1581 case 0xA: in vgxy61_detect_cut_version()
1585 case 0xB: in vgxy61_detect_cut_version()
1587 return 0; in vgxy61_detect_cut_version()
1588 case 0xC: in vgxy61_detect_cut_version()
1590 return 0; in vgxy61_detect_cut_version()
1600 u64 st, id = 0; in vgxy61_detect()
1604 if (ret < 0) in vgxy61_detect()
1610 dev_dbg(&client->dev, "detected sensor id = 0x%04x\n", (u16)id); in vgxy61_detect()
1619 if (ret < 0) in vgxy61_detect()
1628 return 0; in vgxy61_detect()
1678 return 0; in vgxy61_power_on()
1698 return 0; in vgxy61_power_off()
1739 sensor->expo_short = 0; in vgxy61_probe()
1742 sensor->analog_gain = 0; in vgxy61_probe()
1751 handle = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0, 0); in vgxy61_probe()
1839 return 0; in vgxy61_probe()