Lines Matching +full:0 +full:b00000000
161 if (subaddr < 0) { in chip_write()
162 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val); in chip_write()
164 buffer[0] = val; in chip_write()
167 v4l2_warn(sd, "I/O error (write 0x%x)\n", val); in chip_write()
168 if (rc < 0) in chip_write()
180 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n", in chip_write()
183 buffer[0] = subaddr; in chip_write()
187 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n", in chip_write()
189 if (rc < 0) in chip_write()
194 return 0; in chip_write()
202 if (mask != 0) { in chip_write_masked()
203 if (subaddr < 0) { in chip_write_masked()
229 if (rc < 0) in chip_read()
233 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer); in chip_read()
258 write[0] = subaddr; in chip_read2()
263 if (rc < 0) in chip_read2()
267 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n", in chip_read2()
268 subaddr, read[0]); in chip_read2()
269 return read[0]; in chip_read2()
278 if (0 == cmd->count) in chip_cmd()
279 return 0; in chip_cmd()
281 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) { in chip_cmd()
284 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1); in chip_cmd()
290 /* update our shadow register set; print bytes if (debug > 0) */ in chip_cmd()
292 name, cmd->bytes[0]); in chip_cmd()
295 printk(KERN_CONT " 0x%x", cmd->bytes[i]); in chip_cmd()
296 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i]; in chip_cmd()
305 if (rc < 0) in chip_cmd()
309 return 0; in chip_cmd()
390 return 0; in chip_thread()
396 #define TDA9840_SW 0x00
397 #define TDA9840_LVADJ 0x02
398 #define TDA9840_STADJ 0x03
399 #define TDA9840_TEST 0x04
401 #define TDA9840_MONO 0x10
402 #define TDA9840_STEREO 0x2a
403 #define TDA9840_DUALA 0x12
404 #define TDA9840_DUALB 0x1e
405 #define TDA9840_DUALAB 0x1a
406 #define TDA9840_DUALBA 0x16
407 #define TDA9840_EXTERNAL 0x7a
409 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
410 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
411 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
413 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
414 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
424 if (val < 0) in tda9840_getrxsubchans()
441 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e; in tda9840_setaudmode()
460 update = 0; in tda9840_setaudmode()
472 if (rc < 0) in tda9840_checkit()
473 return 0; in tda9840_checkit()
476 /* lower 5 bits should be 0 */ in tda9840_checkit()
477 return ((rc & 0x1f) == 0) ? 1 : 0; in tda9840_checkit()
484 #define TDA9855_VR 0x00 /* Volume, right */
485 #define TDA9855_VL 0x01 /* Volume, left */
486 #define TDA9855_BA 0x02 /* Bass */
487 #define TDA9855_TR 0x03 /* Treble */
488 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
491 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
494 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
495 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
496 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
497 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
498 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
499 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
502 /* 0x00 - VR in TDA9855 */
503 /* 0x01 - VL in TDA9855 */
504 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
505 * in 1dB steps - mute is 0x27 */
508 /* 0x02 - BA in TDA9855 */
509 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
510 * in .5dB steps - 0 is 0x0E */
513 /* 0x03 - TR in TDA9855 */
514 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
515 * in 3dB steps - 0 is 0x7 */
518 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
520 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
521 * in 3dB steps - mute is 0x0 */
525 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
528 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
533 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
534 /* Bits 0 to 3 select various combinations
538 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
542 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
545 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
550 #define TDA985x_MONO 0 /* Forces Mono output */
556 #define TDA9855_LINEAR 0 /* Linear Stereo */
562 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
564 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
565 * in .5dB steps - 0dB is 0x7 */
567 /* 0x08, 0x09 - A1 and A2 (read/write) */
570 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
573 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
575 /* 0x0a - A3 */
577 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
578 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
581 static int tda9855_volume(int val) { return val/0x2e8+0x27; } in tda9855_volume()
582 static int tda9855_bass(int val) { return val/0xccc+0x06; } in tda9855_bass()
583 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; } in tda9855_treble()
593 if (val < 0) in tda985x_getrxsubchans()
606 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f; in tda985x_setaudmode()
623 update = 0; in tda985x_setaudmode()
635 #define TDA9873_SW 0x00 /* Switching */
636 #define TDA9873_AD 0x01 /* Adjust */
637 #define TDA9873_PT 0x02 /* Port */
639 /* Subaddress 0x00: Switching Data
643 * 0, 0 internal
644 * 1, 0 external stereo
645 * 0, 1 external mono
648 #define TDA9873_INTERNAL 0
654 * 0, 0, 1 Mono
655 * 1, 0, 0 Stereo
657 * 0, 0, 0 Dual AB
658 * 0, 0, 1 Dual AA
659 * 0, 1, 0 Dual BB
660 * 0, 1, 1 Dual BA
669 #define TDA9873_TR_DUALAB 0
672 * B5: output level switch (0 = reduced gain, 1 = normal gain)
681 /* Subaddress 0x01: Adjust/standard */
684 * Recommended value is +0 dB
687 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
691 * 0, 0, 0 B/G (PAL FM)
692 * 0, 0, 1 M
693 * 0, 1, 0 D/K(1)
694 * 0, 1, 1 D/K(2)
695 * 1, 0, 0 D/K(3)
696 * 1, 0, 1 I
698 #define TDA9873_BG 0
705 /* C7 controls identification response time (1=fast/0=normal)
707 #define TDA9873_IDR_NORM 0
711 /* Subaddress 0x02: Port data */
714 0, 0 both ports low
715 0, 1 P1 high
716 1, 0 P2 high
728 * 0 0 0 0 mono
729 * 0 0 1 0 DUAL B
730 * 0 1 0 1 mono (from stereo decoder)
732 #define TDA9873_MOUT_MONO 0
733 #define TDA9873_MOUT_FMONO 0
734 #define TDA9873_MOUT_DUALA 0
744 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
756 if (val < 0) in tda9873_getrxsubchans()
818 if (rc < 0) in tda9873_checkit()
819 return 0; in tda9873_checkit()
820 return (rc & ~0x1f) == 0x80; in tda9873_checkit()
829 #define TDA9874A_AGCGR 0x00 /* AGC gain */
830 #define TDA9874A_GCONR 0x01 /* general config */
831 #define TDA9874A_MSR 0x02 /* monitor select */
832 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
833 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
834 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
835 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
836 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
837 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
838 #define TDA9874A_DCR 0x09 /* demodulator config */
839 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
840 #define TDA9874A_FMMR 0x0b /* FM dematrix */
841 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
842 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
843 #define TDA9874A_NCONR 0x0e /* NICAM config */
844 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
845 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
846 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
847 #define TDA9874A_AMCONR 0x12 /* audio mute control */
848 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
849 #define TDA9874A_AOSR 0x14 /* analog output select */
850 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
851 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
852 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
853 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
854 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
857 #define TDA9874A_DSR 0x00 /* device status */
858 #define TDA9874A_NSR 0x01 /* NICAM status */
859 #define TDA9874A_NECR 0x02 /* NICAM error count */
860 #define TDA9874A_DR1 0x03 /* add. data LSB */
861 #define TDA9874A_DR2 0x04 /* add. data MSB */
862 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
863 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
864 #define TDA9874A_SIFLR 0x07 /* SIF level */
871 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
872 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
873 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
874 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
898 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
900 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
902 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
904 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
906 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
908 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
910 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
912 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
914 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
921 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */ in tda9874a_setup()
923 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02); in tda9874a_setup()
924 if(tda9874a_dic == 0x11) { in tda9874a_setup()
925 chip_write(chip, TDA9874A_FMMR, 0x80); in tda9874a_setup()
926 } else { /* dic == 0x07 */ in tda9874a_setup()
928 chip_write(chip, TDA9874A_FMMR, 0x00); in tda9874a_setup()
930 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */ in tda9874a_setup()
931 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */ in tda9874a_setup()
933 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */ in tda9874a_setup()
937 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */ in tda9874a_setup()
938 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */ in tda9874a_setup()
940 if(tda9874a_dic == 0x11) { in tda9874a_setup()
941 chip_write(chip, TDA9874A_AMCONR, 0xf9); in tda9874a_setup()
942 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80); in tda9874a_setup()
943 chip_write(chip, TDA9874A_AOSR, 0x80); in tda9874a_setup()
944 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80); in tda9874a_setup()
946 } else { /* dic == 0x07 */ in tda9874a_setup()
947 chip_write(chip, TDA9874A_AMCONR, 0xfb); in tda9874a_setup()
948 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80); in tda9874a_setup()
949 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */ in tda9874a_setup()
951 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n", in tda9874a_setup()
965 if (dsr < 0) in tda9874a_getrxsubchans()
968 if (nsr < 0) in tda9874a_getrxsubchans()
971 if (necr < 0) in tda9874a_getrxsubchans()
987 if(nsr & 0x02) /* NSR.S/MB=1 */ in tda9874a_getrxsubchans()
989 if(nsr & 0x01) /* NSR.D/SB=1 */ in tda9874a_getrxsubchans()
992 if(dsr & 0x02) /* DSR.IDSTE=1 */ in tda9874a_getrxsubchans()
994 if(dsr & 0x04) /* DSR.IDDUA=1 */ in tda9874a_getrxsubchans()
999 "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n", in tda9874a_getrxsubchans()
1011 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */ in tda9874a_setaudmode()
1012 tda9874a_NCONR &= 0xfe; /* enable */ in tda9874a_setaudmode()
1014 tda9874a_NCONR |= 0x01; /* disable */ in tda9874a_setaudmode()
1024 if(tda9874a_dic == 0x11) { in tda9874a_setaudmode()
1025 int aosr = 0x80; in tda9874a_setaudmode()
1026 int mdacosr = (tda9874a_mode) ? 0x82:0x80; in tda9874a_setaudmode()
1033 aosr = 0x80; /* auto-select, dual A/A */ in tda9874a_setaudmode()
1034 mdacosr = (tda9874a_mode) ? 0x82:0x80; in tda9874a_setaudmode()
1037 aosr = 0xa0; /* auto-select, dual B/B */ in tda9874a_setaudmode()
1038 mdacosr = (tda9874a_mode) ? 0x83:0x81; in tda9874a_setaudmode()
1041 aosr = 0x00; /* always route L to L and R to R */ in tda9874a_setaudmode()
1042 mdacosr = (tda9874a_mode) ? 0x82:0x80; in tda9874a_setaudmode()
1051 "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n", in tda9874a_setaudmode()
1054 } else { /* dic == 0x07 */ in tda9874a_setaudmode()
1059 fmmr = 0x00; /* mono */ in tda9874a_setaudmode()
1060 aosr = 0x10; /* A/A */ in tda9874a_setaudmode()
1064 fmmr = 0x00; in tda9874a_setaudmode()
1065 aosr = 0x00; /* handled by NICAM auto-mute */ in tda9874a_setaudmode()
1067 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */ in tda9874a_setaudmode()
1068 aosr = 0x00; in tda9874a_setaudmode()
1072 fmmr = 0x02; /* dual */ in tda9874a_setaudmode()
1073 aosr = 0x10; /* dual A/A */ in tda9874a_setaudmode()
1076 fmmr = 0x02; /* dual */ in tda9874a_setaudmode()
1077 aosr = 0x20; /* dual B/B */ in tda9874a_setaudmode()
1080 fmmr = 0x02; /* dual */ in tda9874a_setaudmode()
1081 aosr = 0x00; /* dual A/B */ in tda9874a_setaudmode()
1090 "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n", in tda9874a_setaudmode()
1101 if (dic < 0) in tda9874a_checkit()
1102 return 0; in tda9874a_checkit()
1104 if (sic < 0) in tda9874a_checkit()
1105 return 0; in tda9874a_checkit()
1107 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic); in tda9874a_checkit()
1109 if((dic == 0x11)||(dic == 0x07)) { in tda9874a_checkit()
1110 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h"); in tda9874a_checkit()
1114 return 0; /* not found */ in tda9874a_checkit()
1122 tda9874a_STD = 0; in tda9874a_initialize()
1124 tda9874a_AMSEL = 0; in tda9874a_initialize()
1127 tda9874a_GCONR = 0xc0; /* sound IF input 1 */ in tda9874a_initialize()
1129 tda9874a_GCONR = 0xc1; /* sound IF input 2 */ in tda9874a_initialize()
1132 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1; in tda9874a_initialize()
1134 if(tda9874a_AMSEL == 0) in tda9874a_initialize()
1135 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */ in tda9874a_initialize()
1137 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */ in tda9874a_initialize()
1140 return 0; in tda9874a_initialize()
1152 #define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/
1153 #define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */
1154 #define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/
1155 #define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/
1157 #define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/
1158 #define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/
1159 #define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/
1160 #define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/
1162 #define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/
1163 #define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/
1164 #define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/
1165 #define TDA9875_MVL 0x1a /* Main volume gauche */
1166 #define TDA9875_MVR 0x1b /* Main volume droite */
1167 #define TDA9875_MBA 0x1d /* Main Basse */
1168 #define TDA9875_MTR 0x1e /* Main treble */
1169 #define TDA9875_ACS 0x1f /* Auxiliary channel select (FM) 0b0000000*/
1170 #define TDA9875_AVL 0x20 /* Auxiliary volume gauche */
1171 #define TDA9875_AVR 0x21 /* Auxiliary volume droite */
1172 #define TDA9875_ABA 0x22 /* Auxiliary Basse */
1173 #define TDA9875_ATR 0x23 /* Auxiliary treble */
1175 #define TDA9875_MSR 0x02 /* Monitor select register */
1176 #define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */
1177 #define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */
1178 #define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */
1179 #define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */
1180 #define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */
1181 #define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */
1182 #define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/
1183 #define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/
1184 #define TDA9875_FMAT 0x0b /* FM Matrix regirter*/
1187 #define TDA9875_MUTE_ON 0xff /* general mute */
1188 #define TDA9875_MUTE_OFF 0xcc /* general no mute */
1192 chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/ in tda9875_initialize()
1193 chip_write(chip, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/ in tda9875_initialize()
1194 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/ in tda9875_initialize()
1195 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/ in tda9875_initialize()
1196 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/ in tda9875_initialize()
1197 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/ in tda9875_initialize()
1198 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/ in tda9875_initialize()
1199 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/ in tda9875_initialize()
1200 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/ in tda9875_initialize()
1201 chip_write(chip, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/ in tda9875_initialize()
1202 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/ in tda9875_initialize()
1203 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/ in tda9875_initialize()
1204 chip_write(chip, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/ in tda9875_initialize()
1206 chip_write(chip, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/ in tda9875_initialize()
1207 chip_write(chip, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */ in tda9875_initialize()
1208 chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/ in tda9875_initialize()
1209 chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/ in tda9875_initialize()
1210 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/ in tda9875_initialize()
1211 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */ in tda9875_initialize()
1212 chip_write(chip, TDA9875_MCS, 0x44); /* Main ch select (DAC) */ in tda9875_initialize()
1213 chip_write(chip, TDA9875_MVL, 0x03); /* Vol Main left 10dB */ in tda9875_initialize()
1214 chip_write(chip, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/ in tda9875_initialize()
1215 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/ in tda9875_initialize()
1216 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/ in tda9875_initialize()
1217 chip_write(chip, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/ in tda9875_initialize()
1218 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/ in tda9875_initialize()
1219 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/ in tda9875_initialize()
1220 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/ in tda9875_initialize()
1221 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/ in tda9875_initialize()
1223 chip_write(chip, TDA9875_MUT, 0xcc); /* General mute */ in tda9875_initialize()
1224 return 0; in tda9875_initialize()
1244 if (dic < 0) in tda9875_checkit()
1245 return 0; in tda9875_checkit()
1247 if (rev < 0) in tda9875_checkit()
1248 return 0; in tda9875_checkit()
1250 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */ in tda9875_checkit()
1252 dic == 0 ? "" : "A", rev); in tda9875_checkit()
1255 return 0; in tda9875_checkit()
1261 #define TEA6300_VL 0x00 /* volume left */
1262 #define TEA6300_VR 0x01 /* volume right */
1263 #define TEA6300_BA 0x02 /* bass */
1264 #define TEA6300_TR 0x03 /* treble */
1265 #define TEA6300_FA 0x04 /* fader control */
1266 #define TEA6300_S 0x05 /* switch register */
1268 #define TEA6300_S_SA 0x01 /* stereo A input */
1269 #define TEA6300_S_SB 0x02 /* stereo B */
1270 #define TEA6300_S_SC 0x04 /* stereo C */
1271 #define TEA6300_S_GMU 0x80 /* general mute */
1273 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1274 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1275 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1276 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1277 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1278 #define TEA6320_BA 0x05 /* bass (0-4) */
1279 #define TEA6320_TR 0x06 /* treble (0-4) */
1280 #define TEA6320_S 0x07 /* switch register */
1282 #define TEA6320_S_SA 0x07 /* stereo A input */
1283 #define TEA6320_S_SB 0x06 /* stereo B */
1284 #define TEA6320_S_SC 0x05 /* stereo C */
1285 #define TEA6320_S_SD 0x04 /* stereo D */
1286 #define TEA6320_S_GMU 0x80 /* general mute */
1288 #define TEA6420_S_SA 0x00 /* stereo A input */
1289 #define TEA6420_S_SB 0x01 /* stereo B */
1290 #define TEA6420_S_SC 0x02 /* stereo C */
1291 #define TEA6420_S_SD 0x03 /* stereo D */
1292 #define TEA6420_S_SE 0x04 /* stereo E */
1293 #define TEA6420_S_GMU 0x05 /* general mute */
1298 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1299 /* 0x0c mirror those immediately higher) */
1300 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; } in tea6320_volume()
1304 chip_write(chip, TEA6320_FFR, 0x3f); in tea6320_initialize()
1305 chip_write(chip, TEA6320_FFL, 0x3f); in tea6320_initialize()
1306 chip_write(chip, TEA6320_FRR, 0x3f); in tea6320_initialize()
1307 chip_write(chip, TEA6320_FRL, 0x3f); in tea6320_initialize()
1309 return 0; in tea6320_initialize()
1316 #define TDA8425_VL 0x00 /* volume left */
1317 #define TDA8425_VR 0x01 /* volume right */
1318 #define TDA8425_BA 0x02 /* bass */
1319 #define TDA8425_TR 0x03 /* treble */
1320 #define TDA8425_S1 0x08 /* switch functions */
1322 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1323 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1324 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1325 #define TDA8425_S1_MU 0x20 /* mute bit */
1326 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1327 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1328 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1329 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1330 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1331 #define TDA8425_S1_ML 0x06 /* language selector */
1332 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1333 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1334 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1335 #define TDA8425_S1_IS 0x01 /* channel selector */
1338 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; } in tda8425_shift10()
1339 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; } in tda8425_shift12()
1343 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1; in tda8425_setaudmode()
1377 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1378 #define PIC16C54_REG_MISC 0x02
1381 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1383 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1384 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1385 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1386 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1387 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1388 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1389 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1395 #define TA8874Z_LED_STE 0x80
1396 #define TA8874Z_LED_BIL 0x40
1397 #define TA8874Z_LED_EXT 0x20
1398 #define TA8874Z_MONO_SET 0x10
1399 #define TA8874Z_MUTE 0x08
1400 #define TA8874Z_F_MONO 0x04
1401 #define TA8874Z_MODE_SUB 0x02
1402 #define TA8874Z_MODE_MAIN 0x01
1405 /*#define TA8874Z_TI 0x80 */ /* test mode */
1406 #define TA8874Z_SEPARATION 0x3f
1407 #define TA8874Z_SEPARATION_DEFAULT 0x10
1410 #define TA8874Z_B1 0x80
1411 #define TA8874Z_B0 0x40
1412 #define TA8874Z_CHAG_FLAG 0x20
1427 if (val < 0) in ta8874z_getrxsubchans()
1436 "ta8874z_getrxsubchans(): raw chip read: 0x%02x, return: 0x%02x\n", in ta8874z_getrxsubchans()
1441 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1443 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1453 v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n", mode); in ta8874z_setaudmode()
1472 update = 0; in ta8874z_setaudmode()
1484 if (rc < 0) in ta8874z_checkit()
1487 return ((rc & 0x1f) == 0x1f) ? 1 : 0; in ta8874z_checkit()
1501 static int tea6300; /* default 0 - address clash with msp34xx */
1502 static int tea6320; /* default 0 - address clash with msp34xx */
1505 static int ta8874z; /* default 0 - address clash with tda9840 */
1550 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1553 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1599 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1621 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1624 0x07, 0x10, 0x10, 0x03 }}
1682 .inputmask = 0x07,
1757 return 0; in tvaudio_s_ctrl()
1769 return 0; in tvaudio_s_ctrl()
1773 return 0; in tvaudio_s_ctrl()
1776 return 0; in tvaudio_s_ctrl()
1791 return 0; in tvaudio_s_radio()
1801 return 0; in tvaudio_s_routing()
1807 return 0; in tvaudio_s_routing()
1810 return 0; in tvaudio_s_routing()
1819 return 0; in tvaudio_s_tuner()
1821 return 0; in tvaudio_s_tuner()
1840 return 0; in tvaudio_s_tuner()
1849 return 0; in tvaudio_g_tuner()
1851 return 0; in tvaudio_g_tuner()
1858 return 0; in tvaudio_g_tuner()
1865 chip->radio = 0; in tvaudio_s_std()
1866 return 0; in tvaudio_s_std()
1887 return 0; in tvaudio_s_frequency()
1897 return 0; in tvaudio_log_status()
1960 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1); in tvaudio_probe()
1962 if (0 == *(desc->insmodopt)) in tvaudio_probe()
1975 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name); in tvaudio_probe()
2000 V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0); in tvaudio_probe()
2011 0, 65535, 65535 / 100, in tvaudio_probe()
2015 0, 65535, 65535 / 100, 32768); in tvaudio_probe()
2029 0, 65535, 65535 / 100, in tvaudio_probe()
2033 0, 65535, 65535 / 100, in tvaudio_probe()
2049 timer_setup(&chip->wt, chip_thread_wake, 0); in tvaudio_probe()
2056 return 0; in tvaudio_probe()
2066 return 0; in tvaudio_probe()