Lines Matching +full:clkout +full:- +full:fmt
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
14 #include <linux/i2c-mux.h>
18 #include <media/v4l2-cci.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
154 priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev, in max96717_i2c_mux_init()
157 if (!priv->mux) in max96717_i2c_mux_init()
158 return -ENOMEM; in max96717_i2c_mux_init()
160 return i2c_mux_add_adapter(priv->mux, 0, 0); in max96717_i2c_mux_init()
165 return cci_update_bits(priv->regmap, MAX96717_FRONTOP0, in max96717_start_csi()
173 struct v4l2_mbus_framefmt *fmt = in max96717_apply_patgen_timing() local
175 const u32 h_active = fmt->width; in max96717_apply_patgen_timing()
180 const u32 v_active = fmt->height; in max96717_apply_patgen_timing()
191 cci_update_bits(priv->regmap, MAX96717_VTX1, in max96717_apply_patgen_timing()
194 dev_info(&priv->client->dev, "height: %d width: %d\n", fmt->height, in max96717_apply_patgen_timing()
195 fmt->width); in max96717_apply_patgen_timing()
197 cci_write(priv->regmap, MAX96717_VTX_VS_DLY, 0, &ret); in max96717_apply_patgen_timing()
198 cci_write(priv->regmap, MAX96717_VTX_VS_HIGH, v_sw * h_tot, &ret); in max96717_apply_patgen_timing()
199 cci_write(priv->regmap, MAX96717_VTX_VS_LOW, in max96717_apply_patgen_timing()
201 cci_write(priv->regmap, MAX96717_VTX_HS_HIGH, h_sw, &ret); in max96717_apply_patgen_timing()
202 cci_write(priv->regmap, MAX96717_VTX_HS_LOW, h_active + h_fp + h_bp, in max96717_apply_patgen_timing()
204 cci_write(priv->regmap, MAX96717_VTX_V2D, in max96717_apply_patgen_timing()
206 cci_write(priv->regmap, MAX96717_VTX_HS_CNT, v_tot, &ret); in max96717_apply_patgen_timing()
207 cci_write(priv->regmap, MAX96717_VTX_DE_HIGH, h_active, &ret); in max96717_apply_patgen_timing()
208 cci_write(priv->regmap, MAX96717_VTX_DE_LOW, h_fp + h_sw + h_bp, in max96717_apply_patgen_timing()
210 cci_write(priv->regmap, MAX96717_VTX_DE_CNT, v_active, &ret); in max96717_apply_patgen_timing()
212 cci_write(priv->regmap, MAX96717_VTX_CHKB_COLOR_A, 0xfecc00, &ret); in max96717_apply_patgen_timing()
214 cci_write(priv->regmap, MAX96717_VTX_CHKB_COLOR_B, 0x006aa7, &ret); in max96717_apply_patgen_timing()
215 cci_write(priv->regmap, MAX96717_VTX_CHKB_RPT_CNT_A, 0x3c, &ret); in max96717_apply_patgen_timing()
216 cci_write(priv->regmap, MAX96717_VTX_CHKB_RPT_CNT_B, 0x3c, &ret); in max96717_apply_patgen_timing()
217 cci_write(priv->regmap, MAX96717_VTX_CHKB_ALT, 0x3c, &ret); in max96717_apply_patgen_timing()
218 cci_write(priv->regmap, MAX96717_VTX_GRAD_INC, 0x10, &ret); in max96717_apply_patgen_timing()
229 if (priv->pattern) in max96717_apply_patgen()
232 cci_write(priv->regmap, MAX96717_VTX0, priv->pattern ? 0xfb : 0, in max96717_apply_patgen()
235 val = FIELD_PREP(MAX96717_VTX_MODE, priv->pattern); in max96717_apply_patgen()
236 cci_update_bits(priv->regmap, MAX96717_VTX29, MAX96717_VTX_MODE, in max96717_apply_patgen()
244 container_of(ctrl->handler, struct max96717_priv, ctrl_handler); in max96717_s_ctrl()
247 switch (ctrl->id) { in max96717_s_ctrl()
249 if (priv->enabled_source_streams) in max96717_s_ctrl()
250 return -EBUSY; in max96717_s_ctrl()
251 priv->pattern = ctrl->val; in max96717_s_ctrl()
254 return -EINVAL; in max96717_s_ctrl()
258 ret = cci_update_bits(priv->regmap, MAX96717_VIDEO_TX0, in max96717_s_ctrl()
260 priv->pattern ? 0 : MAX96717_VIDEO_AUTO_BPP, in max96717_s_ctrl()
267 return cci_update_bits(priv->regmap, MAX96717_MIPI_RX_EXT11, in max96717_s_ctrl()
269 priv->pattern ? 0 : MAX96717_TUN_MODE, &ret); in max96717_s_ctrl()
289 ret = cci_read(priv->regmap, MAX96717_GPIO_REG_A(offset), in max96717_gpiochip_get()
305 cci_update_bits(priv->regmap, MAX96717_GPIO_REG_A(offset), in max96717_gpiochip_set()
316 ret = cci_read(priv->regmap, MAX96717_GPIO_REG_A(offset), &val, NULL); in max96717_gpio_get_direction()
328 return cci_update_bits(priv->regmap, MAX96717_GPIO_REG_A(offset), in max96717_gpio_direction_out()
338 return cci_update_bits(priv->regmap, MAX96717_GPIO_REG_A(offset), in max96717_gpio_direction_in()
345 struct device *dev = &priv->client->dev; in max96717_gpiochip_probe()
346 struct gpio_chip *gc = &priv->gpio_chip; in max96717_gpiochip_probe()
349 gc->label = dev_name(dev); in max96717_gpiochip_probe()
350 gc->parent = dev; in max96717_gpiochip_probe()
351 gc->owner = THIS_MODULE; in max96717_gpiochip_probe()
352 gc->ngpio = MAX96717_NUM_GPIO; in max96717_gpiochip_probe()
353 gc->base = -1; in max96717_gpiochip_probe()
354 gc->can_sleep = true; in max96717_gpiochip_probe()
355 gc->get_direction = max96717_gpio_get_direction; in max96717_gpiochip_probe()
356 gc->direction_input = max96717_gpio_direction_in; in max96717_gpiochip_probe()
357 gc->direction_output = max96717_gpio_direction_out; in max96717_gpiochip_probe()
358 gc->set = max96717_gpiochip_set; in max96717_gpiochip_probe()
359 gc->get = max96717_gpiochip_get; in max96717_gpiochip_probe()
360 gc->of_gpio_n_cells = 2; in max96717_gpiochip_probe()
363 for (i = 0; i < gc->ngpio; i++) in max96717_gpiochip_probe()
364 cci_update_bits(priv->regmap, MAX96717_GPIO_REG_A(i), in max96717_gpiochip_probe()
411 if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams) in max96717_set_routing()
412 return -EBUSY; in max96717_set_routing()
422 struct v4l2_mbus_framefmt *fmt; in max96717_set_fmt() local
425 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE && in max96717_set_fmt()
426 priv->enabled_source_streams) in max96717_set_fmt()
427 return -EBUSY; in max96717_set_fmt()
430 if (format->pad == MAX96717_PAD_SOURCE) in max96717_set_fmt()
434 fmt = v4l2_subdev_state_get_format(state, format->pad, format->stream); in max96717_set_fmt()
435 if (!fmt) in max96717_set_fmt()
436 return -EINVAL; in max96717_set_fmt()
438 *fmt = format->format; in max96717_set_fmt()
441 fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad, in max96717_set_fmt()
442 format->stream); in max96717_set_fmt()
443 if (!fmt) in max96717_set_fmt()
444 return -EINVAL; in max96717_set_fmt()
445 *fmt = format->format; in max96717_set_fmt()
447 stream_source_mask = BIT(format->stream); in max96717_set_fmt()
478 cci_read(priv->regmap, MAX96717_VIDEO_TX2, &val, NULL); in max96717_pipe_pclkdet()
486 struct device *dev = &priv->client->dev; in max96717_log_status()
502 if (!priv->enabled_source_streams) in max96717_enable_streams()
509 if (!priv->pattern) { in max96717_enable_streams()
516 ret = v4l2_subdev_enable_streams(priv->source_sd, in max96717_enable_streams()
517 priv->source_sd_pad, in max96717_enable_streams()
523 priv->enabled_source_streams |= streams_mask; in max96717_enable_streams()
528 if (!priv->enabled_source_streams) in max96717_enable_streams()
546 priv->enabled_source_streams &= ~streams_mask; in max96717_disable_streams()
547 if (!priv->enabled_source_streams) in max96717_disable_streams()
550 if (!priv->pattern) { in max96717_disable_streams()
559 ret = v4l2_subdev_disable_streams(priv->source_sd, in max96717_disable_streams()
560 priv->source_sd_pad, in max96717_disable_streams()
598 struct max96717_priv *priv = sd_to_max96717(notifier->sd); in max96717_notify_bound()
599 struct device *dev = &priv->client->dev; in max96717_notify_bound()
602 ret = media_entity_get_fwnode_pad(&source_subdev->entity, in max96717_notify_bound()
603 source_subdev->fwnode, in max96717_notify_bound()
607 source_subdev->name); in max96717_notify_bound()
611 priv->source_sd = source_subdev; in max96717_notify_bound()
612 priv->source_sd_pad = ret; in max96717_notify_bound()
614 ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad, in max96717_notify_bound()
615 &priv->sd.entity, 0, in max96717_notify_bound()
619 dev_err(dev, "Unable to link %s:%u -> %s:0\n", in max96717_notify_bound()
620 source_subdev->name, priv->source_sd_pad, in max96717_notify_bound()
621 priv->sd.name); in max96717_notify_bound()
634 struct device *dev = &priv->client->dev; in max96717_v4l2_notifier_register()
643 return -ENODEV; in max96717_v4l2_notifier_register()
646 v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd); in max96717_v4l2_notifier_register()
648 asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode, in max96717_v4l2_notifier_register()
655 v4l2_async_nf_cleanup(&priv->notifier); in max96717_v4l2_notifier_register()
659 priv->notifier.ops = &max96717_notify_ops; in max96717_v4l2_notifier_register()
661 ret = v4l2_async_nf_register(&priv->notifier); in max96717_v4l2_notifier_register()
664 v4l2_async_nf_cleanup(&priv->notifier); in max96717_v4l2_notifier_register()
673 struct device *dev = &priv->client->dev; in max96717_subdev_init()
676 v4l2_i2c_subdev_init(&priv->sd, priv->client, &max96717_subdev_ops); in max96717_subdev_init()
677 priv->sd.internal_ops = &max96717_internal_ops; in max96717_subdev_init()
679 v4l2_ctrl_handler_init(&priv->ctrl_handler, 1); in max96717_subdev_init()
680 priv->sd.ctrl_handler = &priv->ctrl_handler; in max96717_subdev_init()
682 v4l2_ctrl_new_std_menu_items(&priv->ctrl_handler, in max96717_subdev_init()
685 ARRAY_SIZE(max96717_test_pattern) - 1, in max96717_subdev_init()
687 if (priv->ctrl_handler.error) { in max96717_subdev_init()
688 ret = priv->ctrl_handler.error; in max96717_subdev_init()
692 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS; in max96717_subdev_init()
693 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; in max96717_subdev_init()
694 priv->sd.entity.ops = &max96717_entity_ops; in max96717_subdev_init()
696 priv->pads[MAX96717_PAD_SINK].flags = MEDIA_PAD_FL_SINK; in max96717_subdev_init()
697 priv->pads[MAX96717_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; in max96717_subdev_init()
699 ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads); in max96717_subdev_init()
703 ret = v4l2_subdev_init_finalize(&priv->sd); in max96717_subdev_init()
716 ret = v4l2_async_register_subdev(&priv->sd); in max96717_subdev_init()
725 v4l2_async_nf_unregister(&priv->notifier); in max96717_subdev_init()
726 v4l2_async_nf_cleanup(&priv->notifier); in max96717_subdev_init()
728 v4l2_subdev_cleanup(&priv->sd); in max96717_subdev_init()
730 media_entity_cleanup(&priv->sd.entity); in max96717_subdev_init()
732 v4l2_ctrl_handler_free(&priv->ctrl_handler); in max96717_subdev_init()
739 v4l2_async_unregister_subdev(&priv->sd); in max96717_subdev_uninit()
740 v4l2_async_nf_unregister(&priv->notifier); in max96717_subdev_uninit()
741 v4l2_async_nf_cleanup(&priv->notifier); in max96717_subdev_uninit()
742 v4l2_subdev_cleanup(&priv->sd); in max96717_subdev_uninit()
743 media_entity_cleanup(&priv->sd.entity); in max96717_subdev_uninit()
744 v4l2_ctrl_handler_free(&priv->ctrl_handler); in max96717_subdev_uninit()
764 return max96717_predef_freqs[priv->pll_predef_index].freq; in max96717_clk_recalc_rate()
774 diff_new = abs(rate - max96717_predef_freqs[i].freq); in max96717_clk_find_best_index()
788 struct device *dev = &priv->client->dev; in max96717_clk_round_rate()
818 cci_write(priv->regmap, REF_VTG0, val, &ret); in max96717_clk_set_rate()
819 cci_update_bits(priv->regmap, REF_VTG0, REFGEN_RST | REFGEN_EN, in max96717_clk_set_rate()
824 priv->pll_predef_index = idx; in max96717_clk_set_rate()
833 return cci_update_bits(priv->regmap, MAX96717_REG6, RCLKEN, in max96717_clk_prepare()
841 cci_update_bits(priv->regmap, MAX96717_REG6, RCLKEN, 0, NULL); in max96717_clk_unprepare()
854 struct device *dev = &priv->client->dev; in max96717_register_clkout()
860 return -ENOMEM; in max96717_register_clkout()
863 ret = cci_update_bits(priv->regmap, MAX96717_REG3, MAX96717_RCLKSEL, in max96717_register_clkout()
866 cci_update_bits(priv->regmap, PIO_SLEW_1, BIT(5) | BIT(4), 0, &ret); in max96717_register_clkout()
870 priv->clk_hw.init = &init; in max96717_register_clkout()
873 ret = max96717_clk_set_rate(&priv->clk_hw, in max96717_register_clkout()
878 ret = devm_clk_hw_register(dev, &priv->clk_hw); in max96717_register_clkout()
884 &priv->clk_hw); in max96717_register_clkout()
898 struct v4l2_mbus_config_mipi_csi2 *mipi = &priv->mipi_csi2; in max96717_init_csi_lanes()
903 nlanes = mipi->num_data_lanes; in max96717_init_csi_lanes()
905 ret = cci_update_bits(priv->regmap, MAX96717_MIPI_RX1, in max96717_init_csi_lanes()
908 nlanes - 1), NULL); in max96717_init_csi_lanes()
912 if (!mipi->lane_polarities[lane]) in max96717_init_csi_lanes()
918 val |= BIT(lane - 1); in max96717_init_csi_lanes()
923 cci_update_bits(priv->regmap, MAX96717_MIPI_RX5, in max96717_init_csi_lanes()
927 cci_update_bits(priv->regmap, MAX96717_MIPI_RX4, in max96717_init_csi_lanes()
933 val |= (mipi->data_lanes[lane] - 1) << (lane * 2); in max96717_init_csi_lanes()
934 lanes_used |= BIT(mipi->data_lanes[lane] - 1); in max96717_init_csi_lanes()
949 cci_update_bits(priv->regmap, MAX96717_MIPI_RX3, in max96717_init_csi_lanes()
953 return cci_update_bits(priv->regmap, MAX96717_MIPI_RX2, in max96717_init_csi_lanes()
961 struct device *dev = &priv->client->dev; in max96717_hw_init()
965 ret = cci_read(priv->regmap, MAX96717_DEV_ID, &dev_id, NULL); in max96717_hw_init()
971 return dev_err_probe(dev, -EOPNOTSUPP, in max96717_hw_init()
974 ret = cci_read(priv->regmap, MAX96717_DEV_REV, &val, NULL); in max96717_hw_init()
982 ret = cci_read(priv->regmap, MAX96717_MIPI_RX_EXT11, &val, NULL); in max96717_hw_init()
988 return dev_err_probe(dev, -EOPNOTSUPP, in max96717_hw_init()
996 struct device *dev = &priv->client->dev; in max96717_parse_dt()
1005 return dev_err_probe(dev, -ENOENT, "no endpoint found\n"); in max96717_parse_dt()
1016 return dev_err_probe(dev, -EINVAL, in max96717_parse_dt()
1019 priv->mipi_csi2 = vep.bus.mipi_csi2; in max96717_parse_dt()
1026 struct device *dev = &client->dev; in max96717_probe()
1032 return -ENOMEM; in max96717_probe()
1034 priv->client = client; in max96717_probe()
1035 priv->regmap = devm_cci_regmap_init_i2c(client, 16); in max96717_probe()
1036 if (IS_ERR(priv->regmap)) { in max96717_probe()
1037 ret = PTR_ERR(priv->regmap); in max96717_probe()
1052 return dev_err_probe(&client->dev, ret, in max96717_probe()
1057 return dev_err_probe(dev, ret, "Failed to register clkout\n"); in max96717_probe()
1079 i2c_mux_del_adapters(priv->mux); in max96717_remove()