Lines Matching refs:nport
430 u8 nport; /* RX port number, and index in priv->rxport[] */ member
486 u8 nport; /* TX port number, and index in priv->txport[] */ member
679 static int ub960_rxport_select(struct ub960_data *priv, u8 nport) in ub960_rxport_select() argument
686 if (priv->reg_current.rxport == nport) in ub960_rxport_select()
690 (nport << 4) | BIT(nport)); in ub960_rxport_select()
693 nport, ret); in ub960_rxport_select()
697 priv->reg_current.rxport = nport; in ub960_rxport_select()
702 static int ub960_rxport_read(struct ub960_data *priv, u8 nport, u8 reg, u8 *val) in ub960_rxport_read() argument
710 ret = ub960_rxport_select(priv, nport); in ub960_rxport_read()
729 static int ub960_rxport_write(struct ub960_data *priv, u8 nport, u8 reg, u8 val) in ub960_rxport_write() argument
736 ret = ub960_rxport_select(priv, nport); in ub960_rxport_write()
751 static int ub960_rxport_update_bits(struct ub960_data *priv, u8 nport, u8 reg, in ub960_rxport_update_bits() argument
759 ret = ub960_rxport_select(priv, nport); in ub960_rxport_update_bits()
774 static int ub960_rxport_read16(struct ub960_data *priv, u8 nport, u8 reg, in ub960_rxport_read16() argument
783 ret = ub960_rxport_select(priv, nport); in ub960_rxport_read16()
802 static int ub960_txport_select(struct ub960_data *priv, u8 nport) in ub960_txport_select() argument
809 if (priv->reg_current.txport == nport) in ub960_txport_select()
813 (nport << 4) | BIT(nport)); in ub960_txport_select()
816 nport, ret); in ub960_txport_select()
820 priv->reg_current.txport = nport; in ub960_txport_select()
825 static int ub960_txport_read(struct ub960_data *priv, u8 nport, u8 reg, u8 *val) in ub960_txport_read() argument
833 ret = ub960_txport_select(priv, nport); in ub960_txport_read()
852 static int ub960_txport_write(struct ub960_data *priv, u8 nport, u8 reg, u8 val) in ub960_txport_write() argument
859 ret = ub960_txport_select(priv, nport); in ub960_txport_write()
874 static int ub960_txport_update_bits(struct ub960_data *priv, u8 nport, u8 reg, in ub960_txport_update_bits() argument
882 ret = ub960_txport_select(priv, nport); in ub960_txport_update_bits()
1041 dev_err(dev, "rx%u: alias pool exhausted\n", rxport->nport); in ub960_atr_attach_client()
1053 rxport->nport, client->addr, alias, reg_idx); in ub960_atr_attach_client()
1073 rxport->nport, client->addr); in ub960_atr_detach_client()
1081 dev_dbg(dev, "rx%u: client 0x%02x released at slot %u\n", rxport->nport, in ub960_atr_detach_client()
1117 u8 nport) in ub960_parse_dt_txport() argument
1129 txport->nport = nport; in ub960_parse_dt_txport()
1134 dev_err(dev, "tx%u: failed to parse endpoint data\n", nport); in ub960_parse_dt_txport()
1155 dev_err(dev, "tx%u: invalid 'link-frequencies' value\n", nport); in ub960_parse_dt_txport()
1162 priv->txports[nport] = txport; in ub960_parse_dt_txport()
1174 static void ub960_csi_handle_events(struct ub960_data *priv, u8 nport) in ub960_csi_handle_events() argument
1180 ret = ub960_txport_read(priv, nport, UB960_TR_CSI_TX_ISR, &csi_tx_isr); in ub960_csi_handle_events()
1185 dev_warn(dev, "TX%u: CSI_SYNC_ERROR\n", nport); in ub960_csi_handle_events()
1188 dev_warn(dev, "TX%u: CSI_PASS_ERROR\n", nport); in ub960_csi_handle_events()
1197 unsigned int nport; in ub960_rxport_enable_vpocs() local
1200 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_rxport_enable_vpocs()
1201 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_enable_vpocs()
1214 while (nport--) { in ub960_rxport_enable_vpocs()
1215 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_enable_vpocs()
1228 unsigned int nport; in ub960_rxport_disable_vpocs() local
1230 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_rxport_disable_vpocs()
1231 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_disable_vpocs()
1241 unsigned int nport) in ub960_rxport_clear_errors() argument
1245 ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS1, &v); in ub960_rxport_clear_errors()
1246 ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS2, &v); in ub960_rxport_clear_errors()
1247 ub960_rxport_read(priv, nport, UB960_RR_CSI_RX_STS, &v); in ub960_rxport_clear_errors()
1248 ub960_rxport_read(priv, nport, UB960_RR_BCC_STATUS, &v); in ub960_rxport_clear_errors()
1250 ub960_rxport_read(priv, nport, UB960_RR_RX_PAR_ERR_HI, &v); in ub960_rxport_clear_errors()
1251 ub960_rxport_read(priv, nport, UB960_RR_RX_PAR_ERR_LO, &v); in ub960_rxport_clear_errors()
1253 ub960_rxport_read(priv, nport, UB960_RR_CSI_ERR_COUNTER, &v); in ub960_rxport_clear_errors()
1258 unsigned int nport; in ub960_clear_rx_errors() local
1260 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) in ub960_clear_rx_errors()
1261 ub960_rxport_clear_errors(priv, nport); in ub960_clear_rx_errors()
1265 unsigned int nport, s8 *strobe_pos) in ub960_rxport_get_strobe_pos() argument
1271 ub960_read_ind(priv, UB960_IND_TARGET_RX_ANA(nport), in ub960_rxport_get_strobe_pos()
1277 ub960_read_ind(priv, UB960_IND_TARGET_RX_ANA(nport), in ub960_rxport_get_strobe_pos()
1283 ret = ub960_rxport_read(priv, nport, UB960_RR_SFILTER_STS_0, &v); in ub960_rxport_get_strobe_pos()
1289 ub960_rxport_read(priv, nport, UB960_RR_SFILTER_STS_1, &v); in ub960_rxport_get_strobe_pos()
1301 unsigned int nport, s8 strobe_pos) in ub960_rxport_set_strobe_pos() argument
1317 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), in ub960_rxport_set_strobe_pos()
1320 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), in ub960_rxport_set_strobe_pos()
1337 unsigned int nport, u8 *eq_level) in ub960_rxport_get_eq_level() argument
1342 ret = ub960_rxport_read(priv, nport, UB960_RR_AEQ_STATUS, &v); in ub960_rxport_get_eq_level()
1353 unsigned int nport, u8 eq_level) in ub960_rxport_set_eq_level() argument
1367 ub960_rxport_read(priv, nport, UB960_RR_AEQ_BYPASS, &v); in ub960_rxport_set_eq_level()
1375 ub960_rxport_write(priv, nport, UB960_RR_AEQ_BYPASS, v); in ub960_rxport_set_eq_level()
1379 unsigned int nport, u8 eq_min, u8 eq_max) in ub960_rxport_set_eq_range() argument
1381 ub960_rxport_write(priv, nport, UB960_RR_AEQ_MIN_MAX, in ub960_rxport_set_eq_range()
1386 ub960_rxport_update_bits(priv, nport, UB960_RR_AEQ_CTL2, in ub960_rxport_set_eq_range()
1391 static void ub960_rxport_config_eq(struct ub960_data *priv, unsigned int nport) in ub960_rxport_config_eq() argument
1393 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_config_eq()
1415 ub960_rxport_set_strobe_pos(priv, nport, rxport->eq.strobe_pos); in ub960_rxport_config_eq()
1417 ub960_rxport_set_strobe_pos(priv, nport, 0); in ub960_rxport_config_eq()
1420 ub960_rxport_set_eq_level(priv, nport, in ub960_rxport_config_eq()
1424 ub960_rxport_update_bits(priv, nport, UB960_RR_AEQ_BYPASS, in ub960_rxport_config_eq()
1428 ub960_rxport_set_eq_range(priv, nport, in ub960_rxport_config_eq()
1433 ub960_rxport_update_bits(priv, nport, UB960_RR_AEQ_BYPASS, in ub960_rxport_config_eq()
1438 static int ub960_rxport_link_ok(struct ub960_data *priv, unsigned int nport, in ub960_rxport_link_ok() argument
1449 ret = ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS1, in ub960_rxport_link_ok()
1459 ret = ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS2, in ub960_rxport_link_ok()
1464 ret = ub960_rxport_read(priv, nport, UB960_RR_CSI_RX_STS, &csi_rx_sts); in ub960_rxport_link_ok()
1468 ret = ub960_rxport_read(priv, nport, UB960_RR_CSI_ERR_COUNTER, in ub960_rxport_link_ok()
1473 ret = ub960_rxport_read(priv, nport, UB960_RR_BCC_STATUS, &bcc_sts); in ub960_rxport_link_ok()
1477 ret = ub960_rxport_read16(priv, nport, UB960_RR_RX_PAR_ERR_HI, in ub960_rxport_link_ok()
1506 u8 nport; in ub960_rxport_wait_locks() local
1525 for_each_set_bit(nport, &port_mask, in ub960_rxport_wait_locks()
1527 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_wait_locks()
1533 ret = ub960_rxport_link_ok(priv, nport, &ok); in ub960_rxport_wait_locks()
1542 if (!ok || !(link_ok_mask & BIT(nport))) in ub960_rxport_wait_locks()
1546 link_ok_mask |= BIT(nport); in ub960_rxport_wait_locks()
1548 link_ok_mask &= ~BIT(nport); in ub960_rxport_wait_locks()
1563 for_each_set_bit(nport, &port_mask, priv->hw_data->num_rxports) { in ub960_rxport_wait_locks()
1564 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_wait_locks()
1571 if (!(link_ok_mask & BIT(nport))) { in ub960_rxport_wait_locks()
1572 dev_dbg(dev, "\trx%u: not locked\n", nport); in ub960_rxport_wait_locks()
1576 ub960_rxport_read16(priv, nport, UB960_RR_RX_FREQ_HIGH, &v); in ub960_rxport_wait_locks()
1578 ret = ub960_rxport_get_strobe_pos(priv, nport, &strobe_pos); in ub960_rxport_wait_locks()
1582 ret = ub960_rxport_get_eq_level(priv, nport, &eq_level); in ub960_rxport_wait_locks()
1587 nport, strobe_pos, eq_level, (v * 1000000ULL) >> 8); in ub960_rxport_wait_locks()
1644 static int ub960_rxport_add_serializer(struct ub960_data *priv, u8 nport) in ub960_rxport_add_serializer() argument
1646 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_add_serializer()
1655 ser_pdata->port = nport; in ub960_rxport_add_serializer()
1671 dev_err(dev, "rx%u: cannot add %s i2c device", nport, in ub960_rxport_add_serializer()
1677 nport, rxport->ser.client->addr, in ub960_rxport_add_serializer()
1683 static void ub960_rxport_remove_serializer(struct ub960_data *priv, u8 nport) in ub960_rxport_remove_serializer() argument
1685 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_remove_serializer()
1694 unsigned int nport; in ub960_rxport_add_serializers() local
1697 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_rxport_add_serializers()
1698 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_add_serializers()
1703 ret = ub960_rxport_add_serializer(priv, nport); in ub960_rxport_add_serializers()
1711 while (nport--) { in ub960_rxport_add_serializers()
1712 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_add_serializers()
1717 ub960_rxport_remove_serializer(priv, nport); in ub960_rxport_add_serializers()
1725 unsigned int nport; in ub960_rxport_remove_serializers() local
1727 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_rxport_remove_serializers()
1728 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_remove_serializers()
1733 ub960_rxport_remove_serializer(priv, nport); in ub960_rxport_remove_serializers()
1740 unsigned int nport = txport->nport; in ub960_init_tx_port() local
1755 ub960_txport_write(priv, nport, UB960_TR_CSI_CTL, csi_ctl); in ub960_init_tx_port()
1760 unsigned int nport; in ub960_init_tx_ports() local
1808 for (nport = 0; nport < priv->hw_data->num_txports; nport++) { in ub960_init_tx_ports()
1809 struct ub960_txport *txport = priv->txports[nport]; in ub960_init_tx_ports()
1823 unsigned int nport = rxport->nport; in ub960_init_rx_port_ub960() local
1856 ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, in ub960_init_rx_port_ub960()
1863 ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG, in ub960_init_rx_port_ub960()
1870 ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG2, in ub960_init_rx_port_ub960()
1884 ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG, 0x3, in ub960_init_rx_port_ub960()
1891 ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG2, 0x3, in ub960_init_rx_port_ub960()
1895 ub960_rxport_write(priv, nport, UB960_RR_PORT_ICR_HI, 0x07); in ub960_init_rx_port_ub960()
1896 ub960_rxport_write(priv, nport, UB960_RR_PORT_ICR_LO, 0x7f); in ub960_init_rx_port_ub960()
1899 ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, in ub960_init_rx_port_ub960()
1904 ub960_rxport_write(priv, nport, UB960_RR_SER_ALIAS_ID, in ub960_init_rx_port_ub960()
1908 ub960_rxport_config_eq(priv, nport); in ub960_init_rx_port_ub960()
1911 ub960_update_bits(priv, UB960_SR_RX_PORT_CTL, BIT(nport), BIT(nport)); in ub960_init_rx_port_ub960()
1917 unsigned int nport = rxport->nport; in ub960_init_rx_port_ub9702_fpd3() local
1951 ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, 0x7, in ub960_init_rx_port_ub9702_fpd3()
1953 ub960_rxport_write(priv, nport, UB960_RR_CHANNEL_MODE, fpd_func_mode); in ub960_init_rx_port_ub9702_fpd3()
1956 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xa8, 0x80); in ub960_init_rx_port_ub9702_fpd3()
1959 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x0d, 0x7f); in ub960_init_rx_port_ub9702_fpd3()
1962 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2b, 0x04); in ub960_init_rx_port_ub9702_fpd3()
1965 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xa9, 0x23); in ub960_init_rx_port_ub9702_fpd3()
1968 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xaa, 0); in ub960_init_rx_port_ub9702_fpd3()
1971 ub960_ind_update_bits(priv, UB960_IND_TARGET_RX_ANA(nport), 0x1b, in ub960_init_rx_port_ub9702_fpd3()
1975 ub960_update_bits(priv, UB960_SR_FPD_RATE_CFG, 0x3 << (nport * 2), in ub960_init_rx_port_ub9702_fpd3()
1976 BIT(nport * 2)); in ub960_init_rx_port_ub9702_fpd3()
1982 unsigned int nport = rxport->nport; in ub960_init_rx_port_ub9702_fpd4_aeq() local
1989 ub960_read_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2c, &v); in ub960_init_rx_port_ub9702_fpd4_aeq()
1991 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x27, v); in ub960_init_rx_port_ub9702_fpd4_aeq()
1992 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x28, v + 1); in ub960_init_rx_port_ub9702_fpd4_aeq()
1994 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2b, 0x00); in ub960_init_rx_port_ub9702_fpd4_aeq()
1998 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x9e, 0x00); in ub960_init_rx_port_ub9702_fpd4_aeq()
2001 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x90, 0x40); in ub960_init_rx_port_ub9702_fpd4_aeq()
2004 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2e, 0x40); in ub960_init_rx_port_ub9702_fpd4_aeq()
2007 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xf0, 0x00); in ub960_init_rx_port_ub9702_fpd4_aeq()
2010 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x71, 0x00); in ub960_init_rx_port_ub9702_fpd4_aeq()
2016 unsigned int nport = rxport->nport; in ub960_init_rx_port_ub9702_fpd4() local
2044 ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, 0x7, in ub960_init_rx_port_ub9702_fpd4()
2048 ub960_rxport_write(priv, nport, UB960_RR_CHANNEL_MODE, 0); in ub960_init_rx_port_ub9702_fpd4()
2051 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2b, 0x04); in ub960_init_rx_port_ub9702_fpd4()
2054 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x27, 0x0); in ub960_init_rx_port_ub9702_fpd4()
2056 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x28, 0x23); in ub960_init_rx_port_ub9702_fpd4()
2059 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x04, 0x00); in ub960_init_rx_port_ub9702_fpd4()
2061 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x1b, 0x00); in ub960_init_rx_port_ub9702_fpd4()
2064 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x21, 0x2f); in ub960_init_rx_port_ub9702_fpd4()
2066 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x25, 0xc1); in ub960_init_rx_port_ub9702_fpd4()
2069 ub960_update_bits(priv, UB960_SR_FPD_RATE_CFG, 0x3 << (nport * 2), in ub960_init_rx_port_ub9702_fpd4()
2070 0 << (nport * 2)); in ub960_init_rx_port_ub9702_fpd4()
2078 unsigned int nport = rxport->nport; in ub960_init_rx_port_ub9702() local
2091 ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG2, in ub960_init_rx_port_ub9702()
2108 ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG2, 0x3, in ub960_init_rx_port_ub9702()
2112 ub960_rxport_write(priv, nport, UB960_RR_PORT_ICR_HI, 0x07); in ub960_init_rx_port_ub9702()
2113 ub960_rxport_write(priv, nport, UB960_RR_PORT_ICR_LO, 0x7f); in ub960_init_rx_port_ub9702()
2116 ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, in ub960_init_rx_port_ub9702()
2121 ub960_rxport_write(priv, nport, UB960_RR_SER_ALIAS_ID, in ub960_init_rx_port_ub9702()
2125 ub960_update_bits(priv, UB960_SR_RX_PORT_CTL, BIT(nport), BIT(nport)); in ub960_init_rx_port_ub9702()
2129 ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x25, 0x41); in ub960_init_rx_port_ub9702()
2135 unsigned int nport; in ub960_init_rx_ports() local
2137 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_init_rx_ports()
2138 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_init_rx_ports()
2152 static void ub960_rxport_handle_events(struct ub960_data *priv, u8 nport) in ub960_rxport_handle_events() argument
2163 ret = ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS1, in ub960_rxport_handle_events()
2166 ret = ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS2, in ub960_rxport_handle_events()
2169 ret = ub960_rxport_read(priv, nport, UB960_RR_CSI_RX_STS, in ub960_rxport_handle_events()
2172 ret = ub960_rxport_read(priv, nport, UB960_RR_BCC_STATUS, in ub960_rxport_handle_events()
2181 ret = ub960_rxport_read16(priv, nport, UB960_RR_RX_PAR_ERR_HI, in ub960_rxport_handle_events()
2184 dev_err(dev, "rx%u parity errors: %u\n", nport, v); in ub960_rxport_handle_events()
2188 dev_err(dev, "rx%u BCC CRC error\n", nport); in ub960_rxport_handle_events()
2191 dev_err(dev, "rx%u BCC SEQ error\n", nport); in ub960_rxport_handle_events()
2194 dev_err(dev, "rx%u line length unstable\n", nport); in ub960_rxport_handle_events()
2197 dev_err(dev, "rx%u FPD3 encode error\n", nport); in ub960_rxport_handle_events()
2200 dev_err(dev, "rx%u buffer error\n", nport); in ub960_rxport_handle_events()
2203 dev_err(dev, "rx%u CSI error: %#02x\n", nport, csi_rx_sts); in ub960_rxport_handle_events()
2206 dev_err(dev, "rx%u CSI ECC1 error\n", nport); in ub960_rxport_handle_events()
2209 dev_err(dev, "rx%u CSI ECC2 error\n", nport); in ub960_rxport_handle_events()
2212 dev_err(dev, "rx%u CSI checksum error\n", nport); in ub960_rxport_handle_events()
2215 dev_err(dev, "rx%u CSI length error\n", nport); in ub960_rxport_handle_events()
2218 dev_err(dev, "rx%u BCC error: %#02x\n", nport, bcc_sts); in ub960_rxport_handle_events()
2221 dev_err(dev, "rx%u BCC response error", nport); in ub960_rxport_handle_events()
2224 dev_err(dev, "rx%u BCC slave timeout", nport); in ub960_rxport_handle_events()
2227 dev_err(dev, "rx%u BCC slave error", nport); in ub960_rxport_handle_events()
2230 dev_err(dev, "rx%u BCC master timeout", nport); in ub960_rxport_handle_events()
2233 dev_err(dev, "rx%u BCC master error", nport); in ub960_rxport_handle_events()
2236 dev_err(dev, "rx%u BCC sequence error", nport); in ub960_rxport_handle_events()
2241 ret = ub960_rxport_read16(priv, nport, UB960_RR_LINE_LEN_1, &v); in ub960_rxport_handle_events()
2243 dev_dbg(dev, "rx%u line len changed: %u\n", nport, v); in ub960_rxport_handle_events()
2249 ret = ub960_rxport_read16(priv, nport, UB960_RR_LINE_COUNT_HI, in ub960_rxport_handle_events()
2252 dev_dbg(dev, "rx%u line count changed: %u\n", nport, v); in ub960_rxport_handle_events()
2256 dev_dbg(dev, "rx%u: %s, %s, %s, %s\n", nport, in ub960_rxport_handle_events()
2314 static int ub960_enable_tx_port(struct ub960_data *priv, unsigned int nport) in ub960_enable_tx_port() argument
2318 dev_dbg(dev, "enable TX port %u\n", nport); in ub960_enable_tx_port()
2320 return ub960_txport_update_bits(priv, nport, UB960_TR_CSI_CTL, in ub960_enable_tx_port()
2325 static void ub960_disable_tx_port(struct ub960_data *priv, unsigned int nport) in ub960_disable_tx_port() argument
2329 dev_dbg(dev, "disable TX port %u\n", nport); in ub960_disable_tx_port()
2331 ub960_txport_update_bits(priv, nport, UB960_TR_CSI_CTL, in ub960_disable_tx_port()
2335 static int ub960_enable_rx_port(struct ub960_data *priv, unsigned int nport) in ub960_enable_rx_port() argument
2339 dev_dbg(dev, "enable RX port %u\n", nport); in ub960_enable_rx_port()
2343 UB960_SR_FWD_CTL1_PORT_DIS(nport), 0); in ub960_enable_rx_port()
2346 static void ub960_disable_rx_port(struct ub960_data *priv, unsigned int nport) in ub960_disable_rx_port() argument
2350 dev_dbg(dev, "disable RX port %u\n", nport); in ub960_disable_rx_port()
2354 UB960_SR_FWD_CTL1_PORT_DIS(nport), in ub960_disable_rx_port()
2355 UB960_SR_FWD_CTL1_PORT_DIS(nport)); in ub960_disable_rx_port()
2364 unsigned int nport; in ub960_validate_stream_vcs() local
2367 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_validate_stream_vcs()
2368 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_validate_stream_vcs()
2395 nport); in ub960_validate_stream_vcs()
2416 unsigned int nport; in ub960_configure_ports_for_streaming() local
2430 unsigned int nport; in ub960_configure_ports_for_streaming() local
2432 nport = ub960_pad_to_port(priv, route->sink_pad); in ub960_configure_ports_for_streaming()
2434 rxport = priv->rxports[nport]; in ub960_configure_ports_for_streaming()
2442 rx_data[nport].tx_port = ub960_pad_to_port(priv, route->source_pad); in ub960_configure_ports_for_streaming()
2444 rx_data[nport].num_streams++; in ub960_configure_ports_for_streaming()
2451 if (rx_data[nport].num_streams > 2) in ub960_configure_ports_for_streaming()
2467 nport, fmt->height); in ub960_configure_ports_for_streaming()
2471 rx_data[nport].meta_dt = ub960_fmt->datatype; in ub960_configure_ports_for_streaming()
2472 rx_data[nport].meta_lines = fmt->height; in ub960_configure_ports_for_streaming()
2474 rx_data[nport].pixel_dt = ub960_fmt->datatype; in ub960_configure_ports_for_streaming()
2486 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_configure_ports_for_streaming()
2487 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_configure_ports_for_streaming()
2488 u8 vc = vc_map[nport]; in ub960_configure_ports_for_streaming()
2490 if (rx_data[nport].num_streams == 0) in ub960_configure_ports_for_streaming()
2495 ub960_rxport_write(priv, nport, UB960_RR_RAW10_ID, in ub960_configure_ports_for_streaming()
2496 rx_data[nport].pixel_dt | (vc << UB960_RR_RAW10_ID_VC_SHIFT)); in ub960_configure_ports_for_streaming()
2498 ub960_rxport_write(priv, rxport->nport, in ub960_configure_ports_for_streaming()
2500 (rx_data[nport].meta_lines << UB960_RR_RAW_EMBED_DTYPE_LINES_SHIFT) | in ub960_configure_ports_for_streaming()
2501 rx_data[nport].meta_dt); in ub960_configure_ports_for_streaming()
2514 ub960_rxport_write(priv, nport, UB960_RR_CSI_VC_MAP, in ub960_configure_ports_for_streaming()
2524 ub960_rxport_write(priv, nport, in ub960_configure_ports_for_streaming()
2526 nport); in ub960_configure_ports_for_streaming()
2532 if (rx_data[nport].tx_port == 1) in ub960_configure_ports_for_streaming()
2533 fwd_ctl |= BIT(nport); /* forward to TX1 */ in ub960_configure_ports_for_streaming()
2535 fwd_ctl &= ~BIT(nport); /* forward to TX0 */ in ub960_configure_ports_for_streaming()
2564 unsigned int nport; in ub960_enable_streams() local
2592 nport = ub960_pad_to_port(priv, route->sink_pad); in ub960_enable_streams()
2594 sink_streams[nport] |= BIT_ULL(route->sink_stream); in ub960_enable_streams()
2597 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_enable_streams()
2598 if (!sink_streams[nport]) in ub960_enable_streams()
2602 if (!priv->stream_enable_mask[nport]) { in ub960_enable_streams()
2603 ret = ub960_enable_rx_port(priv, nport); in ub960_enable_streams()
2605 failed_port = nport; in ub960_enable_streams()
2610 priv->stream_enable_mask[nport] |= sink_streams[nport]; in ub960_enable_streams()
2612 dev_dbg(dev, "enable RX port %u streams %#llx\n", nport, in ub960_enable_streams()
2613 sink_streams[nport]); in ub960_enable_streams()
2616 priv->rxports[nport]->source.sd, in ub960_enable_streams()
2617 priv->rxports[nport]->source.pad, in ub960_enable_streams()
2618 sink_streams[nport]); in ub960_enable_streams()
2620 priv->stream_enable_mask[nport] &= ~sink_streams[nport]; in ub960_enable_streams()
2622 if (!priv->stream_enable_mask[nport]) in ub960_enable_streams()
2623 ub960_disable_rx_port(priv, nport); in ub960_enable_streams()
2625 failed_port = nport; in ub960_enable_streams()
2635 for (nport = 0; nport < failed_port; nport++) { in ub960_enable_streams()
2636 if (!sink_streams[nport]) in ub960_enable_streams()
2639 dev_dbg(dev, "disable RX port %u streams %#llx\n", nport, in ub960_enable_streams()
2640 sink_streams[nport]); in ub960_enable_streams()
2643 priv->rxports[nport]->source.sd, in ub960_enable_streams()
2644 priv->rxports[nport]->source.pad, in ub960_enable_streams()
2645 sink_streams[nport]); in ub960_enable_streams()
2649 priv->stream_enable_mask[nport] &= ~sink_streams[nport]; in ub960_enable_streams()
2652 if (!priv->stream_enable_mask[nport]) in ub960_enable_streams()
2653 ub960_disable_rx_port(priv, nport); in ub960_enable_streams()
2675 unsigned int nport; in ub960_disable_streams() local
2686 nport = ub960_pad_to_port(priv, route->sink_pad); in ub960_disable_streams()
2688 sink_streams[nport] |= BIT_ULL(route->sink_stream); in ub960_disable_streams()
2691 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_disable_streams()
2692 if (!sink_streams[nport]) in ub960_disable_streams()
2695 dev_dbg(dev, "disable RX port %u streams %#llx\n", nport, in ub960_disable_streams()
2696 sink_streams[nport]); in ub960_disable_streams()
2699 priv->rxports[nport]->source.sd, in ub960_disable_streams()
2700 priv->rxports[nport]->source.pad, in ub960_disable_streams()
2701 sink_streams[nport]); in ub960_disable_streams()
2705 priv->stream_enable_mask[nport] &= ~sink_streams[nport]; in ub960_disable_streams()
2708 if (!priv->stream_enable_mask[nport]) in ub960_disable_streams()
2709 ub960_disable_rx_port(priv, nport); in ub960_disable_streams()
2797 unsigned int nport; in ub960_get_frame_desc() local
2803 nport = ub960_pad_to_port(priv, route->sink_pad); in ub960_get_frame_desc()
2805 ret = v4l2_subdev_call(priv->rxports[nport]->source.sd, pad, in ub960_get_frame_desc()
2807 priv->rxports[nport]->source.pad, in ub960_get_frame_desc()
2835 fd->entry[fd->num_entries].bus.csi2.vc = vc_map[nport]; in ub960_get_frame_desc()
2948 unsigned int nport; in ub960_log_status() local
2961 for (nport = 0; nport < priv->hw_data->num_txports; nport++) { in ub960_log_status()
2962 struct ub960_txport *txport = priv->txports[nport]; in ub960_log_status()
2964 dev_info(dev, "TX %u\n", nport); in ub960_log_status()
2971 ub960_txport_read(priv, nport, UB960_TR_CSI_STS, &v); in ub960_log_status()
2975 ub960_read16(priv, UB960_SR_CSI_FRAME_COUNT_HI(nport), &v16); in ub960_log_status()
2978 ub960_read16(priv, UB960_SR_CSI_FRAME_ERR_COUNT_HI(nport), &v16); in ub960_log_status()
2981 ub960_read16(priv, UB960_SR_CSI_LINE_COUNT_HI(nport), &v16); in ub960_log_status()
2984 ub960_read16(priv, UB960_SR_CSI_LINE_ERR_COUNT_HI(nport), &v16); in ub960_log_status()
2988 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_log_status()
2989 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_log_status()
2994 dev_info(dev, "RX %u\n", nport); in ub960_log_status()
3001 ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS1, &v); in ub960_log_status()
3009 ub960_rxport_read(priv, nport, UB960_RR_RX_PORT_STS2, &v); in ub960_log_status()
3012 ub960_rxport_read16(priv, nport, UB960_RR_RX_FREQ_HIGH, &v16); in ub960_log_status()
3015 ub960_rxport_read16(priv, nport, UB960_RR_RX_PAR_ERR_HI, &v16); in ub960_log_status()
3018 ub960_rxport_read16(priv, nport, UB960_RR_LINE_COUNT_HI, &v16); in ub960_log_status()
3021 ub960_rxport_read16(priv, nport, UB960_RR_LINE_LEN_1, &v16); in ub960_log_status()
3024 ub960_rxport_read(priv, nport, UB960_RR_CSI_ERR_COUNTER, &v); in ub960_log_status()
3043 ub960_rxport_get_strobe_pos(priv, nport, &strobe_pos); in ub960_log_status()
3049 ub960_rxport_read(priv, nport, UB960_RR_AEQ_BYPASS, &v); in ub960_log_status()
3056 ub960_rxport_read(priv, nport, UB960_RR_AEQ_MIN_MAX, &v); in ub960_log_status()
3063 if (ub960_rxport_get_eq_level(priv, nport, &eq_level) == 0) in ub960_log_status()
3074 ub960_rxport_read(priv, nport, ctl_reg, &v); in ub960_log_status()
3161 unsigned int nport; in ub960_txport_free_ports() local
3163 for (nport = 0; nport < priv->hw_data->num_txports; nport++) { in ub960_txport_free_ports()
3164 struct ub960_txport *txport = priv->txports[nport]; in ub960_txport_free_ports()
3170 priv->txports[nport] = NULL; in ub960_txport_free_ports()
3176 unsigned int nport; in ub960_rxport_free_ports() local
3178 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_rxport_free_ports()
3179 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_rxport_free_ports()
3188 priv->rxports[nport] = NULL; in ub960_rxport_free_ports()
3198 unsigned int nport = rxport->nport; in ub960_parse_dt_rxport_link_properties() local
3210 dev_err(dev, "rx%u: failed to read '%s': %d\n", nport, in ub960_parse_dt_rxport_link_properties()
3216 dev_err(dev, "rx%u: bad 'ti,cdr-mode' %u\n", nport, cdr_mode); in ub960_parse_dt_rxport_link_properties()
3221 dev_err(dev, "rx%u: FPD-Link 4 CDR not supported\n", nport); in ub960_parse_dt_rxport_link_properties()
3229 dev_err(dev, "rx%u: failed to read '%s': %d\n", nport, in ub960_parse_dt_rxport_link_properties()
3235 dev_err(dev, "rx%u: bad 'ti,rx-mode' %u\n", nport, rx_mode); in ub960_parse_dt_rxport_link_properties()
3242 dev_err(dev, "rx%u: unsupported 'ti,rx-mode' %u\n", nport, in ub960_parse_dt_rxport_link_properties()
3262 dev_err(dev, "rx%u: failed to read '%s': %d\n", nport, in ub960_parse_dt_rxport_link_properties()
3270 nport, strobe_pos); in ub960_parse_dt_rxport_link_properties()
3279 nport); in ub960_parse_dt_rxport_link_properties()
3285 dev_err(dev, "rx%u: failed to read '%s': %d\n", nport, in ub960_parse_dt_rxport_link_properties()
3292 nport, eq_level); in ub960_parse_dt_rxport_link_properties()
3303 dev_err(dev, "rx%u: failed to read '%s': %d\n", nport, in ub960_parse_dt_rxport_link_properties()
3311 dev_err(dev, "rx%u: missing 'serializer' node\n", nport); in ub960_parse_dt_rxport_link_properties()
3324 unsigned int nport = rxport->nport; in ub960_parse_dt_rxport_ep_properties() local
3331 dev_err(dev, "rx%u: no remote endpoint\n", nport); in ub960_parse_dt_rxport_ep_properties()
3349 dev_err(dev, "rx%u: failed to parse endpoint data\n", nport); in ub960_parse_dt_rxport_ep_properties()
3367 static int ub960_parse_dt_rxport(struct ub960_data *priv, unsigned int nport, in ub960_parse_dt_rxport() argument
3382 priv->rxports[nport] = rxport; in ub960_parse_dt_rxport()
3384 rxport->nport = nport; in ub960_parse_dt_rxport()
3391 rxport->vpoc = devm_regulator_get_optional(dev, vpoc_names[nport]); in ub960_parse_dt_rxport()
3398 nport, ret); in ub960_parse_dt_rxport()
3412 priv->rxports[nport] = NULL; in ub960_parse_dt_rxport()
3419 unsigned int nport) in ub960_fwnode_get_link_by_regs() argument
3436 if (nport == link_num) in ub960_fwnode_get_link_by_regs()
3447 unsigned int nport; in ub960_parse_dt_rxports() local
3462 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_parse_dt_rxports()
3466 link_fwnode = ub960_fwnode_get_link_by_regs(links_fwnode, nport); in ub960_parse_dt_rxports()
3471 nport, 0, 0); in ub960_parse_dt_rxports()
3477 ret = ub960_parse_dt_rxport(priv, nport, link_fwnode, in ub960_parse_dt_rxports()
3484 dev_err(dev, "rx%u: failed to parse RX port\n", nport); in ub960_parse_dt_rxports()
3502 u32 nport; in ub960_parse_dt_txports() local
3505 for (nport = 0; nport < priv->hw_data->num_txports; nport++) { in ub960_parse_dt_txports()
3506 unsigned int port = nport + priv->hw_data->num_rxports; in ub960_parse_dt_txports()
3514 ret = ub960_parse_dt_txport(priv, ep_fwnode, nport); in ub960_parse_dt_txports()
3552 u8 nport = rxport->nport; in ub960_notify_bound() local
3568 rxport->source.pad, &priv->sd.entity, nport, in ub960_notify_bound()
3574 priv->sd.name, nport); in ub960_notify_bound()
3886 unsigned int nport; in ub960_probe() local
3937 for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { in ub960_probe()
3938 struct ub960_rxport *rxport = priv->rxports[nport]; in ub960_probe()
3943 port_mask |= BIT(nport); in ub960_probe()