Lines Matching +full:pll +full:- +full:in
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * drivers/media/i2c/ccs-pll.h
5 * Generic MIPI CCS/SMIA/SMIA++ PLL calculator
17 /* CSI-2 or CCP-2 */
22 /* op pix clock is for all lanes in total normally */
25 /* CCS PLL flags */
37 * struct ccs_pll_branch_fr - CCS PLL configuration (front)
39 * A single branch front-end of the CCS PLL tree.
41 * @pre_pll_clk_div: Pre-PLL clock divisor
42 * @pll_multiplier: PLL multiplier
43 * @pll_ip_clk_freq_hz: PLL input clock frequency
44 * @pll_op_clk_freq_hz: PLL output clock frequency
54 * struct ccs_pll_branch_bk - CCS PLL configuration (back)
56 * A single branch back-end of the CCS PLL tree.
71 * struct ccs_pll - Full CCS PLL configuration
73 * All information required to calculate CCS PLL configuration.
78 * @csi2: CSI-2 related parameters
79 * @csi2.lanes: The number of the CSI-2 data lanes (input)
90 * @vt_fr: Video timing front-end configuration (output)
91 * @vt_bk: Video timing back-end configuration (output)
92 * @op_fr: Operational timing front-end configuration (output)
93 * @op_bk: Operational timing back-end configuration (output)
95 * @pixel_rate_pixel_array: Nominal pixel rate in the sensor's pixel array
127 * struct ccs_pll_branch_limits_fr - CCS PLL front-end limits
129 * @min_pre_pll_clk_div: Minimum pre-PLL clock divider
130 * @max_pre_pll_clk_div: Maximum pre-PLL clock divider
131 * @min_pll_ip_clk_freq_hz: Minimum PLL input clock frequency
132 * @max_pll_ip_clk_freq_hz: Maximum PLL input clock frequency
133 * @min_pll_multiplier: Minimum PLL multiplier
134 * @max_pll_multiplier: Maximum PLL multiplier
135 * @min_pll_op_clk_freq_hz: Minimum PLL output clock frequency
136 * @max_pll_op_clk_freq_hz: Maximum PLL output clock frequency
150 * struct ccs_pll_branch_limits_bk - CCS PLL back-end limits
173 * struct ccs_pll_limits - CCS PLL limits
177 * @vt_fr: Video timing front-end limits
178 * @vt_bk: Video timing back-end limits
179 * @op_fr: Operational timing front-end limits
180 * @op_bk: Operational timing back-end limits
181 * @min_line_length_pck_bin: Minimum line length in pixels, with binning
182 * @min_line_length_pck: Minimum line length in pixels without binning
185 /* Strict PLL limits */
202 * ccs_pll_calculate - Calculate CCS PLL configuration based on input parameters
206 * @pll: Given PLL configuration
208 * Calculate the CCS PLL configuration based on the limits as well as given
212 struct ccs_pll *pll);