Lines Matching refs:dib0090_read_reg
200 static u16 dib0090_read_reg(struct dib0090_state *state, u8 reg) in dib0090_read_reg() function
333 v = dib0090_read_reg(state, 0x1a); in dib0090_identify()
530 PllCfg = dib0090_read_reg(state, 0x21); in dib0090_reset_digital()
555 v = !!(dib0090_read_reg(state, 0x1a) & 0x800); in dib0090_reset_digital()
656 dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) | (1 << 14)); in dib0090_wakeup()
1037 dprintk("total RF gain: %ddB, step: %d\n", (u32) cfg[0], dib0090_read_reg(state, 0x2a)); in dib0090_set_rframp_pwm()
1056 dprintk("total BB gain: %ddB, step: %d\n", (u32) cfg[0], dib0090_read_reg(state, 0x33)); in dib0090_set_bbramp_pwm()
1144 u16 adc_val = dib0090_read_reg(state, 0x1d); in dib0090_get_slow_adc_val()
1378 dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xfff8) in dib0090_set_switch()
1389 dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x7fff) in dib0090_set_vga()
1507 e2 = dib0090_read_reg(state, 0x26); in dib0090_set_EFUSE()
1508 e4 = dib0090_read_reg(state, 0x28); in dib0090_set_EFUSE()
1514 cal = (dib0090_read_reg(state, 0x22) >> 6) & 0x3ff; in dib0090_set_EFUSE()
1559 if ((dib0090_read_reg(state, 0x1a) >> 5) & 0x2) in dib0090_reset()
1585 dprintk("Pll lock : %d\n", (dib0090_read_reg(state, 0x1a) >> 11) & 0x1); in dib0090_reset()
1606 state->adc_diff = dib0090_read_reg(state, 0x1d); in dib0090_get_offset()
1614 state->adc_diff -= dib0090_read_reg(state, 0x1d); in dib0090_get_offset()
1684 reg = dib0090_read_reg(state, 0x24) & 0x0ffb; /* shutdown lna and lo */ in dib0090_dc_offset_calibration()
1687 state->wbdmux = dib0090_read_reg(state, 0x10); in dib0090_dc_offset_calibration()
1689 dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) & ~(1 << 14)); in dib0090_dc_offset_calibration()
2067 dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x8000) in dib0090_update_tuning_table_7090()
2069 dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xf83f) in dib0090_update_tuning_table_7090()
2104 state->captrim = state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7f; in dib0090_captrim_search()
2115 dib0090_read_reg(state, 0x40); in dib0090_captrim_search()
2129 dib0090_read_reg(state, 0x40); in dib0090_captrim_search()
2131 state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7F; in dib0090_captrim_search()
2188 state->wbdmux = dib0090_read_reg(state, 0x10); in dib0090_get_temperature()
2191 state->bias = dib0090_read_reg(state, 0x13); in dib0090_get_temperature()
2220 dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) | (1 << 14)); in dib0090_get_temperature()
2253 dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) & ~(1 << 14)); in dib0090_tune()
2257 dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) | (1 << 14)); in dib0090_tune()
2274 tmp = dib0090_read_reg(state, 0x39); in dib0090_tune()
2468 …dprintk("FBDIV: %d, Rest: %d\n", (u32) dib0090_read_reg(state, 0x15), (u32) dib0090_read_reg(state… in dib0090_tune()
2469 …dprintk("Num: %d, Den: %d, SD: %d\n", (u32) dib0090_read_reg(state, 0x17), (u32) (dib0090_read_reg… in dib0090_tune()
2470 (u32) dib0090_read_reg(state, 0x1c) & 0x3); in dib0090_tune()