Lines Matching +full:adc +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
5 * Copyright (C) 2005-9 DiBcom (http://www.dibcom.fr/)
73 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib0070_read_reg()
78 state->i2c_write_buffer[0] = reg; in dib0070_read_reg()
80 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib0070_read_reg()
81 state->msg[0].addr = state->cfg->i2c_address; in dib0070_read_reg()
82 state->msg[0].flags = 0; in dib0070_read_reg()
83 state->msg[0].buf = state->i2c_write_buffer; in dib0070_read_reg()
84 state->msg[0].len = 1; in dib0070_read_reg()
85 state->msg[1].addr = state->cfg->i2c_address; in dib0070_read_reg()
86 state->msg[1].flags = I2C_M_RD; in dib0070_read_reg()
87 state->msg[1].buf = state->i2c_read_buffer; in dib0070_read_reg()
88 state->msg[1].len = 2; in dib0070_read_reg()
90 if (i2c_transfer(state->i2c, state->msg, 2) != 2) { in dib0070_read_reg()
94 ret = (state->i2c_read_buffer[0] << 8) in dib0070_read_reg()
95 | state->i2c_read_buffer[1]; in dib0070_read_reg()
97 mutex_unlock(&state->i2c_buffer_lock); in dib0070_read_reg()
105 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib0070_write_reg()
107 return -EINVAL; in dib0070_write_reg()
109 state->i2c_write_buffer[0] = reg; in dib0070_write_reg()
110 state->i2c_write_buffer[1] = val >> 8; in dib0070_write_reg()
111 state->i2c_write_buffer[2] = val & 0xff; in dib0070_write_reg()
113 memset(state->msg, 0, sizeof(struct i2c_msg)); in dib0070_write_reg()
114 state->msg[0].addr = state->cfg->i2c_address; in dib0070_write_reg()
115 state->msg[0].flags = 0; in dib0070_write_reg()
116 state->msg[0].buf = state->i2c_write_buffer; in dib0070_write_reg()
117 state->msg[0].len = 3; in dib0070_write_reg()
119 if (i2c_transfer(state->i2c, state->msg, 1) != 1) { in dib0070_write_reg()
121 ret = -EREMOTEIO; in dib0070_write_reg()
125 mutex_unlock(&state->i2c_buffer_lock); in dib0070_write_reg()
130 state->cfg->sleep(state->fe, 0); \
131 if (state->cfg->reset) { \
132 state->cfg->reset(state->fe,1); msleep(10); \
133 state->cfg->reset(state->fe,0); msleep(10); \
139 struct dib0070_state *state = fe->tuner_priv; in dib0070_set_bandwidth()
142 if (state->fe->dtv_property_cache.bandwidth_hz/1000 > 7000) in dib0070_set_bandwidth()
144 else if (state->fe->dtv_property_cache.bandwidth_hz/1000 > 6000) in dib0070_set_bandwidth()
146 else if (state->fe->dtv_property_cache.bandwidth_hz/1000 > 5000) in dib0070_set_bandwidth()
153 /* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */ in dib0070_set_bandwidth()
154 if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) { in dib0070_set_bandwidth()
169 u16 adc; in dib0070_captrim() local
177 state->step = state->captrim = state->fcaptrim = 64; in dib0070_captrim()
178 state->adc_diff = 3000; in dib0070_captrim()
183 state->step /= 2; in dib0070_captrim()
184 dib0070_write_reg(state, 0x14, state->lo4 | state->captrim); in dib0070_captrim()
190 adc = dib0070_read_reg(state, 0x19); in dib0070_captrim()
192 dprintk("CAPTRIM=%d; ADC = %hd (ADC) & %dmV\n", state->captrim, in dib0070_captrim()
193 adc, (u32)adc * (u32)1800 / (u32)1024); in dib0070_captrim()
195 if (adc >= 400) { in dib0070_captrim()
196 adc -= 400; in dib0070_captrim()
197 step_sign = -1; in dib0070_captrim()
199 adc = 400 - adc; in dib0070_captrim()
203 if (adc < state->adc_diff) { in dib0070_captrim()
205 state->captrim, adc, state->adc_diff); in dib0070_captrim()
206 state->adc_diff = adc; in dib0070_captrim()
207 state->fcaptrim = state->captrim; in dib0070_captrim()
209 state->captrim += (step_sign * state->step); in dib0070_captrim()
211 if (state->step >= 1) in dib0070_captrim()
217 dib0070_write_reg(state, 0x14, state->lo4 | state->fcaptrim); in dib0070_captrim()
227 struct dib0070_state *state = fe->tuner_priv; in dib0070_set_ctrl_lo5()
236 struct dib0070_state *state = fe->tuner_priv; in dib0070_ctrl_agc_filter()
243 if (state->cfg->vga_filter != 0) { in dib0070_ctrl_agc_filter()
244 dib0070_write_reg(state, 0x1a, state->cfg->vga_filter); in dib0070_ctrl_agc_filter()
245 dprintk("vga filter register is set to %x\n", state->cfg->vga_filter); in dib0070_ctrl_agc_filter()
323 struct dib0070_state *state = fe->tuner_priv; in dib0070_tune_digital()
328 enum frontend_tune_state *tune_state = &state->tune_state; in dib0070_tune_digital()
331 u8 band = (u8)BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency/1000); in dib0070_tune_digital()
332 …u32 freq = fe->dtv_property_cache.frequency/1000 + (band == BAND_VHF ? state->cfg->freq_offset_khz… in dib0070_tune_digital() local
335 …if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.is… in dib0070_tune_digital()
336 if (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) in dib0070_tune_digital()
337 …&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb… in dib0070_tune_digital()
338 || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0) in dib0070_tune_digital()
339 …&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == (state->fe->dtv_property_cache.isdbt_sb_… in dib0070_tune_digital()
340 || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0) in dib0070_tune_digital()
341 …&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb… in dib0070_tune_digital()
342 freq += 850; in dib0070_tune_digital()
344 if (state->current_rf != freq) { in dib0070_tune_digital()
346 switch (state->revision) { in dib0070_tune_digital()
353 if (state->cfg->flip_chip) in dib0070_tune_digital()
359 while (freq > tune->max_freq) /* find the right one */ in dib0070_tune_digital()
361 while (freq > lna_match->max_freq) /* find the right one */ in dib0070_tune_digital()
364 state->current_tune_table_index = tune; in dib0070_tune_digital()
365 state->lna_match = lna_match; in dib0070_tune_digital()
369 dprintk("Tuning for Band: %d (%d kHz)\n", band, freq); in dib0070_tune_digital()
370 if (state->current_rf != freq) { in dib0070_tune_digital()
375 state->current_rf = freq; in dib0070_tune_digital()
376 …state->lo4 = (state->current_tune_table_index->vco_band << 11) | (state->current_tune_table_index-… in dib0070_tune_digital()
382 VCOF_kHz = state->current_tune_table_index->vco_multi * freq * 2; in dib0070_tune_digital()
386 REFDIV = (u8) ((state->cfg->clock_khz + 9999) / 10000); in dib0070_tune_digital()
389 REFDIV = (u8) ((state->cfg->clock_khz) / 1000); in dib0070_tune_digital()
392 REFDIV = (u8) (state->cfg->clock_khz / 10000); in dib0070_tune_digital()
395 FREF = state->cfg->clock_khz / REFDIV; in dib0070_tune_digital()
399 switch (state->revision) { in dib0070_tune_digital()
401 FBDiv = (VCOF_kHz / state->current_tune_table_index->presc / FREF); in dib0070_tune_digital()
402 Rest = (VCOF_kHz / state->current_tune_table_index->presc) - FBDiv * FREF; in dib0070_tune_digital()
408 FBDiv = (freq / (FREF / 2)); in dib0070_tune_digital()
409 Rest = 2 * freq - FBDiv * FREF; in dib0070_tune_digital()
417 else if (Rest > (FREF - LPF)) { in dib0070_tune_digital()
420 } else if (Rest > (FREF - 2 * LPF)) in dib0070_tune_digital()
421 Rest = FREF - 2 * LPF; in dib0070_tune_digital()
426 state->lo4 |= (1 << 14) | (1 << 12); in dib0070_tune_digital()
435 if (state->revision == DIB0070S_P1A) { in dib0070_tune_digital()
445 …0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | state->current_tune_table_index->tuner_enabl… in dib0070_tune_digital()
450 (state->lo4 >> 12) & 0x1); in dib0070_tune_digital()
452 state->current_tune_table_index->hfdiv); in dib0070_tune_digital()
454 state->current_tune_table_index->vco_band); in dib0070_tune_digital()
456 state->current_tune_table_index->vco_multi, in dib0070_tune_digital()
457 freq); in dib0070_tune_digital()
460 } else { /* we are already tuned to this frequency - the configuration is correct */ in dib0070_tune_digital()
469 const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain; in dib0070_tune_digital()
471 while (freq/1000 > tmp->freq) /* find the right one */ in dib0070_tune_digital()
475 | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) in dib0070_tune_digital()
476 | (state->current_tune_table_index->wbdmux << 0)); in dib0070_tune_digital()
477 state->wbd_gain_current = tmp->wbd_gain_val; in dib0070_tune_digital()
482 | (state->current_tune_table_index->wbdmux << 0)); in dib0070_tune_digital()
483 state->wbd_gain_current = 6; in dib0070_tune_digital()
488 …(state->current_tune_table_index->switch_trim << 11) | (7 << 8) | (state->lna_match->lna_band << 3… in dib0070_tune_digital()
489 dib0070_write_reg(state, 0x08, (state->lna_match->lna_band << 10) | (3 << 7) | (127)); in dib0070_tune_digital()
510 struct dib0070_state *state = fe->tuner_priv; in dib0070_tune()
513 state->tune_state = CT_TUNER_START; in dib0070_tune()
521 } while (state->tune_state != CT_TUNER_STOP); in dib0070_tune()
528 struct dib0070_state *state = fe->tuner_priv; in dib0070_wakeup()
529 if (state->cfg->sleep) in dib0070_wakeup()
530 state->cfg->sleep(fe, 0); in dib0070_wakeup()
536 struct dib0070_state *state = fe->tuner_priv; in dib0070_sleep()
537 if (state->cfg->sleep) in dib0070_sleep()
538 state->cfg->sleep(fe, 1); in dib0070_sleep()
544 struct dib0070_state *state = fe->tuner_priv; in dib0070_get_rf_output()
551 struct dib0070_state *state = fe->tuner_priv; in dib0070_set_rf_output()
618 state->wbd_offset_3_3[gain - 6] = ((dib0070_read_wbd_offset(state, gain) * 8 * 18 / 33 + 1) / 2); in dib0070_wbd_offset_calibration()
619 dprintk("Gain: %d, WBDOffset (3.3V) = %hd\n", gain, state->wbd_offset_3_3[gain-6]); in dib0070_wbd_offset_calibration()
625 struct dib0070_state *state = fe->tuner_priv; in dib0070_wbd_offset()
626 const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain; in dib0070_wbd_offset()
627 u32 freq = fe->dtv_property_cache.frequency/1000; in dib0070_wbd_offset() local
630 while (freq/1000 > tmp->freq) /* find the right one */ in dib0070_wbd_offset()
632 state->wbd_gain_current = tmp->wbd_gain_val; in dib0070_wbd_offset()
634 state->wbd_gain_current = 6; in dib0070_wbd_offset()
636 return state->wbd_offset_3_3[state->wbd_gain_current - 6]; in dib0070_wbd_offset()
643 struct dib0070_state *state = fe->tuner_priv; in dib0070_reset()
651 state->revision = (dib0070_read_reg(state, 0x1f) >> 8) & 0xff; in dib0070_reset()
656 state->revision = DIB0070S_P1A; in dib0070_reset()
659 dprintk("Revision: %x\n", state->revision); in dib0070_reset()
661 if (state->revision == DIB0070_P1D) { in dib0070_reset()
663 return -EINVAL; in dib0070_reset()
673 } while (--l); in dib0070_reset()
677 if (state->cfg->force_crystal_mode != 0) in dib0070_reset()
678 r = state->cfg->force_crystal_mode; in dib0070_reset()
679 else if (state->cfg->clock_khz >= 24000) in dib0070_reset()
685 r |= state->cfg->osc_buffer_state << 3; in dib0070_reset()
688 dib0070_write_reg(state, 0x1f, (1 << 8) | ((state->cfg->clock_pad_drive & 0xf) << 5)); in dib0070_reset()
690 if (state->cfg->invert_iq) { in dib0070_reset()
695 if (state->revision == DIB0070S_P1A) in dib0070_reset()
698 dib0070_set_ctrl_lo5(fe, 5, 4, state->cfg->charge_pump, in dib0070_reset()
699 state->cfg->enable_third_order_filter); in dib0070_reset()
710 struct dib0070_state *state = fe->tuner_priv; in dib0070_get_frequency()
712 *frequency = 1000 * state->current_rf; in dib0070_get_frequency()
718 kfree(fe->tuner_priv); in dib0070_release()
719 fe->tuner_priv = NULL; in dib0070_release()
745 state->cfg = cfg; in dib0070_attach()
746 state->i2c = i2c; in dib0070_attach()
747 state->fe = fe; in dib0070_attach()
748 mutex_init(&state->i2c_buffer_lock); in dib0070_attach()
749 fe->tuner_priv = state; in dib0070_attach()
755 memcpy(&fe->ops.tuner_ops, &dib0070_ops, sizeof(struct dvb_tuner_ops)); in dib0070_attach()
757 fe->tuner_priv = state; in dib0070_attach()
762 fe->tuner_priv = NULL; in dib0070_attach()
768 MODULE_DESCRIPTION("Driver for the DiBcom 0070 base-band RF Tuner");