19 #define CEC_MESSAGE_BROADCAST_MASK	0x0F
20 #define CEC_MESSAGE_BROADCAST		0x0F
21 #define CEC_FILTER_THRESHOLD		0x15
35 	reg = (reg & ~(0x3FF << 16)) | (div_ratio << 16);  in s5p_cec_set_divider()
44 	writeb(0x0, cec->reg + S5P_CEC_DIVISOR_3);  in s5p_cec_set_divider()
45 	writeb(0x0, cec->reg + S5P_CEC_DIVISOR_2);  in s5p_cec_set_divider()
46 	writeb(0x0, cec->reg + S5P_CEC_DIVISOR_1);  in s5p_cec_set_divider()
106 	reg = readb(cec->reg + 0xc4);  in s5p_cec_reset()
107 	reg &= ~0x1;  in s5p_cec_reset()
108 	writeb(reg, cec->reg + 0xc4);  in s5p_cec_reset()
122 	reg = readb(cec->reg + 0xc4);  in s5p_cec_rx_reset()
123 	reg &= ~0x1;  in s5p_cec_rx_reset()
124 	writeb(reg, cec->reg + 0xc4);  in s5p_cec_rx_reset()
130 	writeb(0, cec->reg + S5P_CEC_RX_FILTER_CTRL);  in s5p_cec_threshold()
136 	int i = 0;  in s5p_cec_copy_packet()
147 	reg &= ~0x70;  in s5p_cec_copy_packet()
150 	if ((data[0] & CEC_MESSAGE_BROADCAST_MASK) == CEC_MESSAGE_BROADCAST) {  in s5p_cec_copy_packet()
165 	writeb(addr & 0x0F, cec->reg + S5P_CEC_LOGIC_ADDR);  in s5p_cec_set_addr()
170 	u32 status = 0;  in s5p_cec_get_status()
172 	status = readb(cec->reg + S5P_CEC_STATUS_0) & 0xf;  in s5p_cec_get_status()
173 	status |= (readb(cec->reg + S5P_CEC_TX_STAT1) & 0xf) << 4;  in s5p_cec_get_status()
178 	dev_dbg(cec->dev, "status = 0x%x!\n", status);  in s5p_cec_get_status()
197 	u32 i = 0;  in s5p_cec_get_rx_buf()