Lines Matching +full:am654 +full:- +full:mailbox
1 // SPDX-License-Identifier: GPL-2.0
3 * OMAP mailbox driver
5 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
6 * Copyright (C) 2013-2021 Texas Instruments Incorporated - https://www.ti.com
9 * Suman Anna <s-anna@ti.com>
25 #include "mailbox.h"
96 return __raw_readl(mdev->mbox_base + ofs); in mbox_read_reg()
102 __raw_writel(val, mdev->mbox_base + ofs); in mbox_write_reg()
105 /* Mailbox FIFO handle functions */
108 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; in mbox_fifo_read()
110 return mbox_read_reg(mbox->parent, fifo->msg); in mbox_fifo_read()
115 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; in mbox_fifo_write()
117 mbox_write_reg(mbox->parent, msg, fifo->msg); in mbox_fifo_write()
122 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; in mbox_fifo_empty()
124 return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0); in mbox_fifo_empty()
129 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; in mbox_fifo_full()
131 return mbox_read_reg(mbox->parent, fifo->fifo_stat); in mbox_fifo_full()
134 /* Mailbox IRQ handle functions */
138 &mbox->tx_fifo : &mbox->rx_fifo; in ack_mbox_irq()
139 u32 bit = fifo->intr_bit; in ack_mbox_irq()
140 u32 irqstatus = fifo->irqstatus; in ack_mbox_irq()
142 mbox_write_reg(mbox->parent, bit, irqstatus); in ack_mbox_irq()
145 mbox_read_reg(mbox->parent, irqstatus); in ack_mbox_irq()
151 &mbox->tx_fifo : &mbox->rx_fifo; in is_mbox_irq()
152 u32 bit = fifo->intr_bit; in is_mbox_irq()
153 u32 irqenable = fifo->irqenable; in is_mbox_irq()
154 u32 irqstatus = fifo->irqstatus; in is_mbox_irq()
156 u32 enable = mbox_read_reg(mbox->parent, irqenable); in is_mbox_irq()
157 u32 status = mbox_read_reg(mbox->parent, irqstatus); in is_mbox_irq()
166 &mbox->tx_fifo : &mbox->rx_fifo; in omap_mbox_enable_irq()
167 u32 bit = fifo->intr_bit; in omap_mbox_enable_irq()
168 u32 irqenable = fifo->irqenable; in omap_mbox_enable_irq()
170 l = mbox_read_reg(mbox->parent, irqenable); in omap_mbox_enable_irq()
172 mbox_write_reg(mbox->parent, l, irqenable); in omap_mbox_enable_irq()
178 &mbox->tx_fifo : &mbox->rx_fifo; in omap_mbox_disable_irq()
179 u32 bit = fifo->intr_bit; in omap_mbox_disable_irq()
180 u32 irqdisable = fifo->irqdisable; in omap_mbox_disable_irq()
183 * Read and update the interrupt configuration register for pre-OMAP4. in omap_mbox_disable_irq()
186 if (!mbox->intr_type) in omap_mbox_disable_irq()
187 bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit; in omap_mbox_disable_irq()
189 mbox_write_reg(mbox->parent, bit, irqdisable); in omap_mbox_disable_irq()
193 * Mailbox interrupt handler
199 mbox_chan_txdone(mbox->chan, 0); in __mbox_tx_interrupt()
208 mbox_chan_received_data(mbox->chan, (void *)(uintptr_t)msg); in __mbox_rx_interrupt()
232 ret = request_threaded_irq(mbox->irq, NULL, mbox_interrupt, in omap_mbox_startup()
233 IRQF_SHARED | IRQF_ONESHOT, mbox->name, in omap_mbox_startup()
236 pr_err("failed to register mailbox interrupt:%d\n", ret); in omap_mbox_startup()
240 if (mbox->send_no_irq) in omap_mbox_startup()
241 mbox->chan->txdone_method = TXDONE_BY_ACK; in omap_mbox_startup()
251 free_irq(mbox->irq, mbox); in omap_mbox_fini()
256 struct omap_mbox *mbox = chan->con_priv; in omap_mbox_chan_startup()
257 struct omap_mbox_device *mdev = mbox->parent; in omap_mbox_chan_startup()
260 mutex_lock(&mdev->cfg_lock); in omap_mbox_chan_startup()
261 pm_runtime_get_sync(mdev->dev); in omap_mbox_chan_startup()
264 pm_runtime_put_sync(mdev->dev); in omap_mbox_chan_startup()
265 mutex_unlock(&mdev->cfg_lock); in omap_mbox_chan_startup()
271 struct omap_mbox *mbox = chan->con_priv; in omap_mbox_chan_shutdown()
272 struct omap_mbox_device *mdev = mbox->parent; in omap_mbox_chan_shutdown()
274 mutex_lock(&mdev->cfg_lock); in omap_mbox_chan_shutdown()
276 pm_runtime_put_sync(mdev->dev); in omap_mbox_chan_shutdown()
277 mutex_unlock(&mdev->cfg_lock); in omap_mbox_chan_shutdown()
283 return -EBUSY; in omap_mbox_chan_send_noirq()
301 return -EBUSY; in omap_mbox_chan_send()
313 struct omap_mbox *mbox = chan->con_priv; in omap_mbox_chan_send_data()
318 return -EINVAL; in omap_mbox_chan_send_data()
320 if (mbox->send_no_irq) in omap_mbox_chan_send_data()
343 for (fifo = 0; fifo < mdev->num_fifos; fifo++) { in omap_mbox_suspend()
345 dev_err(mdev->dev, "fifo %d has unexpected unread messages\n", in omap_mbox_suspend()
347 return -EBUSY; in omap_mbox_suspend()
351 for (usr = 0; usr < mdev->num_users; usr++) { in omap_mbox_suspend()
352 reg = MAILBOX_IRQENABLE(mdev->intr_type, usr); in omap_mbox_suspend()
353 mdev->irq_ctx[usr] = mbox_read_reg(mdev, reg); in omap_mbox_suspend()
367 for (usr = 0; usr < mdev->num_users; usr++) { in omap_mbox_resume()
368 reg = MAILBOX_IRQENABLE(mdev->intr_type, usr); in omap_mbox_resume()
369 mbox_write_reg(mdev, mdev->irq_ctx[usr], reg); in omap_mbox_resume()
385 .compatible = "ti,omap2-mailbox",
389 .compatible = "ti,omap3-mailbox",
393 .compatible = "ti,omap4-mailbox",
397 .compatible = "ti,am654-mailbox",
401 .compatible = "ti,am64-mailbox",
413 phandle phandle = sp->args[0]; in omap_mbox_of_xlate()
419 mdev = dev_get_drvdata(controller->dev); in omap_mbox_of_xlate()
421 return ERR_PTR(-EINVAL); in omap_mbox_of_xlate()
427 return ERR_PTR(-ENODEV); in omap_mbox_of_xlate()
430 for (i = 0; i < controller->num_chans; i++) { in omap_mbox_of_xlate()
431 mbox = controller->chans[i].con_priv; in omap_mbox_of_xlate()
432 if (!strcmp(mbox->name, node->name)) { in omap_mbox_of_xlate()
434 return &controller->chans[i]; in omap_mbox_of_xlate()
439 return ERR_PTR(-ENOENT); in omap_mbox_of_xlate()
449 struct device_node *node = pdev->dev.of_node; in omap_mbox_probe()
460 pr_err("%s: only DT-based devices are supported\n", __func__); in omap_mbox_probe()
461 return -ENODEV; in omap_mbox_probe()
464 match_data = of_device_get_match_data(&pdev->dev); in omap_mbox_probe()
466 return -ENODEV; in omap_mbox_probe()
467 intr_type = match_data->intr_type; in omap_mbox_probe()
469 if (of_property_read_u32(node, "ti,mbox-num-users", &num_users)) in omap_mbox_probe()
470 return -ENODEV; in omap_mbox_probe()
472 if (of_property_read_u32(node, "ti,mbox-num-fifos", &num_fifos)) in omap_mbox_probe()
473 return -ENODEV; in omap_mbox_probe()
477 dev_err(&pdev->dev, "no available mbox devices found\n"); in omap_mbox_probe()
478 return -ENODEV; in omap_mbox_probe()
481 mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL); in omap_mbox_probe()
483 return -ENOMEM; in omap_mbox_probe()
485 mdev->mbox_base = devm_platform_ioremap_resource(pdev, 0); in omap_mbox_probe()
486 if (IS_ERR(mdev->mbox_base)) in omap_mbox_probe()
487 return PTR_ERR(mdev->mbox_base); in omap_mbox_probe()
489 mdev->irq_ctx = devm_kcalloc(&pdev->dev, num_users, sizeof(u32), in omap_mbox_probe()
491 if (!mdev->irq_ctx) in omap_mbox_probe()
492 return -ENOMEM; in omap_mbox_probe()
494 chnls = devm_kcalloc(&pdev->dev, info_count + 1, sizeof(*chnls), in omap_mbox_probe()
497 return -ENOMEM; in omap_mbox_probe()
504 mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL); in omap_mbox_probe()
506 return -ENOMEM; in omap_mbox_probe()
509 ret = of_property_read_u32_array(child, "ti,mbox-tx", tmp, in omap_mbox_probe()
517 ret = of_property_read_u32_array(child, "ti,mbox-rx", tmp, in omap_mbox_probe()
527 return -EINVAL; in omap_mbox_probe()
529 fifo = &mbox->tx_fifo; in omap_mbox_probe()
530 fifo->msg = MAILBOX_MESSAGE(tx_id); in omap_mbox_probe()
531 fifo->fifo_stat = MAILBOX_FIFOSTATUS(tx_id); in omap_mbox_probe()
532 fifo->intr_bit = MAILBOX_IRQ_NOTFULL(tx_id); in omap_mbox_probe()
533 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, tx_usr); in omap_mbox_probe()
534 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, tx_usr); in omap_mbox_probe()
535 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, tx_usr); in omap_mbox_probe()
537 fifo = &mbox->rx_fifo; in omap_mbox_probe()
538 fifo->msg = MAILBOX_MESSAGE(rx_id); in omap_mbox_probe()
539 fifo->msg_stat = MAILBOX_MSGSTATUS(rx_id); in omap_mbox_probe()
540 fifo->intr_bit = MAILBOX_IRQ_NEWMSG(rx_id); in omap_mbox_probe()
541 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, rx_usr); in omap_mbox_probe()
542 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, rx_usr); in omap_mbox_probe()
543 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, rx_usr); in omap_mbox_probe()
545 mbox->send_no_irq = of_property_read_bool(child, "ti,mbox-send-noirq"); in omap_mbox_probe()
546 mbox->intr_type = intr_type; in omap_mbox_probe()
548 mbox->parent = mdev; in omap_mbox_probe()
549 mbox->name = child->name; in omap_mbox_probe()
550 mbox->irq = platform_get_irq(pdev, tx_irq); in omap_mbox_probe()
551 if (mbox->irq < 0) in omap_mbox_probe()
552 return mbox->irq; in omap_mbox_probe()
553 mbox->chan = &chnls[i]; in omap_mbox_probe()
557 mutex_init(&mdev->cfg_lock); in omap_mbox_probe()
558 mdev->dev = &pdev->dev; in omap_mbox_probe()
559 mdev->num_users = num_users; in omap_mbox_probe()
560 mdev->num_fifos = num_fifos; in omap_mbox_probe()
561 mdev->intr_type = intr_type; in omap_mbox_probe()
563 controller = devm_kzalloc(&pdev->dev, sizeof(*controller), GFP_KERNEL); in omap_mbox_probe()
565 return -ENOMEM; in omap_mbox_probe()
567 * OMAP/K3 Mailbox IP does not have a Tx-Done IRQ, but rather a Tx-Ready in omap_mbox_probe()
570 controller->txdone_irq = true; in omap_mbox_probe()
571 controller->dev = mdev->dev; in omap_mbox_probe()
572 controller->ops = &omap_mbox_chan_ops; in omap_mbox_probe()
573 controller->chans = chnls; in omap_mbox_probe()
574 controller->num_chans = info_count; in omap_mbox_probe()
575 controller->of_xlate = omap_mbox_of_xlate; in omap_mbox_probe()
576 ret = devm_mbox_controller_register(mdev->dev, controller); in omap_mbox_probe()
581 devm_pm_runtime_enable(mdev->dev); in omap_mbox_probe()
583 ret = pm_runtime_resume_and_get(mdev->dev); in omap_mbox_probe()
592 dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l); in omap_mbox_probe()
594 ret = pm_runtime_put_sync(mdev->dev); in omap_mbox_probe()
595 if (ret < 0 && ret != -ENOSYS) in omap_mbox_probe()
604 .name = "omap-mailbox",
612 MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");