Lines Matching full:w
14 #define W_D_XFIFO 0x04 /* W */
15 #define W_D_CMDR 0x08 /* W */
16 #define W_D_MODE 0x0c /* R/W */
17 #define W_D_TIMR 0x10 /* R/W */
19 #define W_IMASK 0x18 /* R/W */
21 #define W_D_EXIM 0x20 /* R/W */
24 #define W_D_SAM 0x2c /* R/W */
25 #define W_D_SAP1 0x30 /* R/W */
26 #define W_D_SAP2 0x34 /* R/W */
27 #define W_D_TAM 0x38 /* R/W */
28 #define W_D_TEI1 0x3c /* R/W */
29 #define W_D_TEI2 0x40 /* R/W */
32 #define W_TIMR2 0x4c /* W */
33 #define W_L1_RC 0x50 /* R/W */
34 #define W_D_CTL 0x54 /* R/W */
36 #define W_CIX 0x5c /* W */
38 #define W_SQX 0x64 /* W */
39 #define W_PCTL 0x68 /* R/W */
41 #define W_MOX 0x70 /* R/W */
43 #define W_MOCR 0x78 /* R/W */
44 #define W_GCR 0x7c /* R/W */
47 #define W_B_XFIFO 0x84 /* W */
48 #define W_B_CMDR 0x88 /* W */
49 #define W_B_MODE 0x8c /* R/W */
51 #define W_B_EXIM 0x94 /* R/W */
53 #define W_B_ADM1 0x9c /* R/W */
54 #define W_B_ADM2 0xa0 /* R/W */
55 #define W_B_ADR1 0xa4 /* R/W */
56 #define W_B_ADR2 0xa8 /* R/W */
60 #define W_XADDR 0xf4 /* R/W */
61 #define W_XDATA 0xf8 /* R/W */
62 #define W_EPCTL 0xfc /* W */