Lines Matching +full:no +full:- +full:poll +full:- +full:on +full:- +full:init
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * hfcpci.c low level driver for CCD's hfc-pci based cards
7 * based on existing driver for CCD hfc ISA cards
8 * type approval valid for HFC-S PCI A based card
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
16 * NOTE: only one poll value must be given for all cards
19 * poll:
20 * NOTE: only one poll value must be given for all cards
27 * Also note that the value depends on the kernel timer frequency.
46 static uint poll, tics; variable
51 MODULE_DESCRIPTION("mISDN driver for CCD's hfc-pci based cards");
54 module_param(poll, uint, S_IRUGO | S_IWUSR);
103 /* marker saving last b-fifo frame count */
142 hc->hw.int_m2 |= HFCPCI_IRQ_ENABLE; in enable_hwirq()
143 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in enable_hwirq()
149 hc->hw.int_m2 &= ~((u_char)HFCPCI_IRQ_ENABLE); in disable_hwirq()
150 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in disable_hwirq()
160 pci_write_config_word(hc->pdev, PCI_COMMAND, 0); in release_io_hfcpci()
161 del_timer(&hc->hw.timer); in release_io_hfcpci()
162 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in release_io_hfcpci()
163 hc->hw.dmahandle); in release_io_hfcpci()
164 iounmap(hc->hw.pci_io); in release_io_hfcpci()
173 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_setmode()
174 hc->hw.clkdel = CLKDEL_NT; /* ST-Bit delay for NT-Mode */ in hfcpci_setmode()
175 hc->hw.sctrl |= SCTRL_MODE_NT; /* NT-MODE */ in hfcpci_setmode()
176 hc->hw.states = 1; /* G1 */ in hfcpci_setmode()
178 hc->hw.clkdel = CLKDEL_TE; /* ST-Bit delay for TE-Mode */ in hfcpci_setmode()
179 hc->hw.sctrl &= ~SCTRL_MODE_NT; /* TE-MODE */ in hfcpci_setmode()
180 hc->hw.states = 2; /* F2 */ in hfcpci_setmode()
182 Write_hfc(hc, HFCPCI_CLKDEL, hc->hw.clkdel); in hfcpci_setmode()
183 Write_hfc(hc, HFCPCI_STATES, HFCPCI_LOAD_STATE | hc->hw.states); in hfcpci_setmode()
185 Write_hfc(hc, HFCPCI_STATES, hc->hw.states | 0x40); /* Deactivate */ in hfcpci_setmode()
186 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in hfcpci_setmode()
203 pci_write_config_word(hc->pdev, PCI_COMMAND, PCI_ENA_MEMIO); in reset_hfcpci()
206 pci_write_config_word(hc->pdev, PCI_COMMAND, in reset_hfcpci()
209 printk(KERN_DEBUG "HFC-PCI status(%x) before reset\n", val); in reset_hfcpci()
210 hc->hw.cirm = HFCPCI_RESET; /* Reset On */ in reset_hfcpci()
211 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
214 hc->hw.cirm = 0; /* Reset Off */ in reset_hfcpci()
215 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
217 printk(KERN_DEBUG "HFC-PCI status(%x) after reset\n", val); in reset_hfcpci()
225 printk(KERN_DEBUG "HFC-PCI status(%x) after %dus\n", val, cnt); in reset_hfcpci()
227 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
229 hc->hw.bswapped = 0; /* no exchange */ in reset_hfcpci()
230 hc->hw.ctmt = HFCPCI_TIM3_125 | HFCPCI_AUTO_TIMER; in reset_hfcpci()
231 hc->hw.trm = HFCPCI_BTRANS_THRESMASK; /* no echo connect , threshold */ in reset_hfcpci()
232 hc->hw.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
233 hc->hw.sctrl_r = 0; in reset_hfcpci()
234 hc->hw.sctrl_e = HFCPCI_AUTO_AWAKE; /* S/T Auto awake */ in reset_hfcpci()
235 hc->hw.mst_m = 0; in reset_hfcpci()
236 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in reset_hfcpci()
237 hc->hw.mst_m |= HFCPCI_MASTER; /* HFC Master Mode */ in reset_hfcpci()
238 if (test_bit(HFC_CFG_NEG_F0, &hc->cfg)) in reset_hfcpci()
239 hc->hw.mst_m |= HFCPCI_F0_NEGATIV; in reset_hfcpci()
240 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in reset_hfcpci()
241 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in reset_hfcpci()
242 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in reset_hfcpci()
243 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in reset_hfcpci()
245 hc->hw.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | in reset_hfcpci()
247 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in reset_hfcpci()
255 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in reset_hfcpci()
256 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in reset_hfcpci()
259 * Init GCI/IOM2 in master mode in reset_hfcpci()
260 * Slots 0 and 1 are set for B-chan 1 and 2 in reset_hfcpci()
261 * D- and monitor/CI channel are not enabled in reset_hfcpci()
262 * STIO1 is used as output for data, B1+B2 from ST->IOM+HFC in reset_hfcpci()
263 * STIO2 is used as data input, B1+B2 from IOM->ST in reset_hfcpci()
264 * ST B-channel send disabled -> continuous 1s in reset_hfcpci()
267 if (test_bit(HFC_CFG_PCM, &hc->cfg)) { in reset_hfcpci()
269 hc->hw.conn = 0x09; in reset_hfcpci()
271 hc->hw.conn = 0x36; /* set data flow directions */ in reset_hfcpci()
272 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) { in reset_hfcpci()
284 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in reset_hfcpci()
295 hc->hw.timer.expires = jiffies + 75; in hfcpci_Timer()
298 * WriteReg(hc, HFCD_DATA, HFCD_CTMT, hc->hw.ctmt | 0x80); in hfcpci_Timer()
299 * add_timer(&hc->hw.timer); in hfcpci_Timer()
305 * select a b-channel entry matching and active
310 if (test_bit(FLG_ACTIVE, &hc->bch[0].Flags) && in Sel_BCS()
311 (hc->bch[0].nr & channel)) in Sel_BCS()
312 return &hc->bch[0]; in Sel_BCS()
313 else if (test_bit(FLG_ACTIVE, &hc->bch[1].Flags) && in Sel_BCS()
314 (hc->bch[1].nr & channel)) in Sel_BCS()
315 return &hc->bch[1]; in Sel_BCS()
321 * clear the desired B-channel rx fifo
330 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
331 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()
333 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
334 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()
337 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()
338 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
339 hc->hw.last_bfifo_cnt[fifo] = 0; in hfcpci_clear_fifo_rx()
340 bzr->f1 = MAX_B_FRAMES; in hfcpci_clear_fifo_rx()
341 bzr->f2 = bzr->f1; /* init F pointers to remain constant */ in hfcpci_clear_fifo_rx()
342 bzr->za[MAX_B_FRAMES].z1 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 1); in hfcpci_clear_fifo_rx()
343 bzr->za[MAX_B_FRAMES].z2 = cpu_to_le16( in hfcpci_clear_fifo_rx()
344 le16_to_cpu(bzr->za[MAX_B_FRAMES].z1)); in hfcpci_clear_fifo_rx()
346 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()
347 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
351 * clear the desired B-channel tx fifo
359 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
360 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()
362 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
363 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()
366 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_tx()
367 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
368 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
371 fifo, bzt->f1, bzt->f2, in hfcpci_clear_fifo_tx()
372 le16_to_cpu(bzt->za[MAX_B_FRAMES].z1), in hfcpci_clear_fifo_tx()
373 le16_to_cpu(bzt->za[MAX_B_FRAMES].z2), in hfcpci_clear_fifo_tx()
375 bzt->f2 = MAX_B_FRAMES; in hfcpci_clear_fifo_tx()
376 bzt->f1 = bzt->f2; /* init F pointers to remain constant */ in hfcpci_clear_fifo_tx()
377 bzt->za[MAX_B_FRAMES].z1 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 1); in hfcpci_clear_fifo_tx()
378 bzt->za[MAX_B_FRAMES].z2 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 2); in hfcpci_clear_fifo_tx()
380 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_tx()
381 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
382 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
385 fifo, bzt->f1, bzt->f2, in hfcpci_clear_fifo_tx()
386 le16_to_cpu(bzt->za[MAX_B_FRAMES].z1), in hfcpci_clear_fifo_tx()
387 le16_to_cpu(bzt->za[MAX_B_FRAMES].z2)); in hfcpci_clear_fifo_tx()
391 * read a complete B-frame out of the buffer
401 if ((bch->debug & DEBUG_HW_BCHANNEL) && !(bch->debug & DEBUG_HW_BFIFO)) in hfcpci_empty_bfifo()
403 zp = &bz->za[bz->f2]; /* point to Z-Regs */ in hfcpci_empty_bfifo()
404 new_z2 = le16_to_cpu(zp->z2) + count; /* new position in fifo */ in hfcpci_empty_bfifo()
406 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_bfifo()
407 new_f2 = (bz->f2 + 1) & MAX_B_FRAMES; in hfcpci_empty_bfifo()
409 (*(bdata + (le16_to_cpu(zp->z1) - B_SUB_VAL)))) { in hfcpci_empty_bfifo()
410 if (bch->debug & DEBUG_HW) in hfcpci_empty_bfifo()
414 bch->err_inv++; in hfcpci_empty_bfifo()
416 bz->za[new_f2].z2 = cpu_to_le16(new_z2); in hfcpci_empty_bfifo()
417 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_bfifo()
419 bch->rx_skb = mI_alloc_skb(count - 3, GFP_ATOMIC); in hfcpci_empty_bfifo()
420 if (!bch->rx_skb) { in hfcpci_empty_bfifo()
424 count -= 3; in hfcpci_empty_bfifo()
425 ptr = skb_put(bch->rx_skb, count); in hfcpci_empty_bfifo()
427 if (le16_to_cpu(zp->z2) + count <= B_FIFO_SIZE + B_SUB_VAL) in hfcpci_empty_bfifo()
430 maxlen = B_FIFO_SIZE + B_SUB_VAL - in hfcpci_empty_bfifo()
431 le16_to_cpu(zp->z2); /* maximum */ in hfcpci_empty_bfifo()
433 ptr1 = bdata + (le16_to_cpu(zp->z2) - B_SUB_VAL); in hfcpci_empty_bfifo()
436 count -= maxlen; in hfcpci_empty_bfifo()
443 bz->za[new_f2].z2 = cpu_to_le16(new_z2); in hfcpci_empty_bfifo()
444 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_bfifo()
450 * D-channel receive procedure
455 struct dchannel *dch = &hc->dch; in receive_dmsg()
463 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg()
464 while (((df->f1 & D_FREG_MASK) != (df->f2 & D_FREG_MASK)) && count--) { in receive_dmsg()
465 zp = &df->za[df->f2 & D_FREG_MASK]; in receive_dmsg()
466 rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2); in receive_dmsg()
470 if (dch->debug & DEBUG_HW_DCHANNEL) in receive_dmsg()
473 df->f1, df->f2, in receive_dmsg()
474 le16_to_cpu(zp->z1), in receive_dmsg()
475 le16_to_cpu(zp->z2), in receive_dmsg()
479 (df->data[le16_to_cpu(zp->z1)])) { in receive_dmsg()
480 if (dch->debug & DEBUG_HW) in receive_dmsg()
485 df->data[le16_to_cpu(zp->z1)]); in receive_dmsg()
487 cs->err_rx++; in receive_dmsg()
489 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | in receive_dmsg()
491 df->za[df->f2 & D_FREG_MASK].z2 = in receive_dmsg()
492 cpu_to_le16((le16_to_cpu(zp->z2) + rcnt) & in receive_dmsg()
493 (D_FIFO_SIZE - 1)); in receive_dmsg()
495 dch->rx_skb = mI_alloc_skb(rcnt - 3, GFP_ATOMIC); in receive_dmsg()
496 if (!dch->rx_skb) { in receive_dmsg()
498 "HFC-PCI: D receive out of memory\n"); in receive_dmsg()
502 rcnt -= 3; in receive_dmsg()
503 ptr = skb_put(dch->rx_skb, rcnt); in receive_dmsg()
505 if (le16_to_cpu(zp->z2) + rcnt <= D_FIFO_SIZE) in receive_dmsg()
508 maxlen = D_FIFO_SIZE - le16_to_cpu(zp->z2); in receive_dmsg()
511 ptr1 = df->data + le16_to_cpu(zp->z2); in receive_dmsg()
514 rcnt -= maxlen; in receive_dmsg()
518 ptr1 = df->data; /* start of buffer */ in receive_dmsg()
521 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | in receive_dmsg()
523 df->za[df->f2 & D_FREG_MASK].z2 = cpu_to_le16(( in receive_dmsg()
524 le16_to_cpu(zp->z2) + total) & (D_FIFO_SIZE - 1)); in receive_dmsg()
532 * check for transparent receive data and read max one 'poll' size if avail
542 z1r = &rxbz->za[MAX_B_FRAMES].z1; /* pointer to z reg */ in hfcpci_empty_fifo_trans()
544 z1t = &txbz->za[MAX_B_FRAMES].z1; in hfcpci_empty_fifo_trans()
547 fcnt_rx = le16_to_cpu(*z1r) - le16_to_cpu(*z2r); in hfcpci_empty_fifo_trans()
549 return; /* no data avail */ in hfcpci_empty_fifo_trans()
555 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_fifo_trans()
557 fcnt_tx = le16_to_cpu(*z2t) - le16_to_cpu(*z1t); in hfcpci_empty_fifo_trans()
560 /* fcnt_tx contains available bytes in tx-fifo */ in hfcpci_empty_fifo_trans()
561 fcnt_tx = B_FIFO_SIZE - fcnt_tx; in hfcpci_empty_fifo_trans()
562 /* remaining bytes to send (bytes in tx-fifo) */ in hfcpci_empty_fifo_trans()
564 if (test_bit(FLG_RX_OFF, &bch->Flags)) { in hfcpci_empty_fifo_trans()
565 bch->dropcnt += fcnt_rx; in hfcpci_empty_fifo_trans()
571 pr_warn("B%d: No bufferspace for %d bytes\n", bch->nr, fcnt_rx); in hfcpci_empty_fifo_trans()
573 ptr = skb_put(bch->rx_skb, fcnt_rx); in hfcpci_empty_fifo_trans()
577 maxlen = B_FIFO_SIZE + B_SUB_VAL - le16_to_cpu(*z2r); in hfcpci_empty_fifo_trans()
580 ptr1 = bdata + (le16_to_cpu(*z2r) - B_SUB_VAL); in hfcpci_empty_fifo_trans()
583 fcnt_rx -= maxlen; in hfcpci_empty_fifo_trans()
596 * B-channel main receive routine
601 struct hfc_pci *hc = bch->hw; in main_rec_hfcpci()
608 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in main_rec_hfcpci()
609 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
610 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in main_rec_hfcpci()
611 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b2; in main_rec_hfcpci()
614 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in main_rec_hfcpci()
615 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in main_rec_hfcpci()
616 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b1; in main_rec_hfcpci()
620 count--; in main_rec_hfcpci()
621 if (rxbz->f1 != rxbz->f2) { in main_rec_hfcpci()
622 if (bch->debug & DEBUG_HW_BCHANNEL) in main_rec_hfcpci()
624 bch->nr, rxbz->f1, rxbz->f2); in main_rec_hfcpci()
625 zp = &rxbz->za[rxbz->f2]; in main_rec_hfcpci()
627 rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2); in main_rec_hfcpci()
631 if (bch->debug & DEBUG_HW_BCHANNEL) in main_rec_hfcpci()
634 bch->nr, le16_to_cpu(zp->z1), in main_rec_hfcpci()
635 le16_to_cpu(zp->z2), rcnt); in main_rec_hfcpci()
637 rcnt = rxbz->f1 - rxbz->f2; in main_rec_hfcpci()
640 if (hc->hw.last_bfifo_cnt[real_fifo] > rcnt + 1) { in main_rec_hfcpci()
644 hc->hw.last_bfifo_cnt[real_fifo] = rcnt; in main_rec_hfcpci()
649 } else if (test_bit(FLG_TRANSPARENT, &bch->Flags)) { in main_rec_hfcpci()
660 * D-channel send routine
665 struct dchannel *dch = &hc->dch; in hfcpci_fill_dfifo()
671 if ((dch->debug & DEBUG_HW_DCHANNEL) && !(dch->debug & DEBUG_HW_DFIFO)) in hfcpci_fill_dfifo()
674 if (!dch->tx_skb) in hfcpci_fill_dfifo()
676 count = dch->tx_skb->len - dch->tx_idx; in hfcpci_fill_dfifo()
679 df = &((union fifo_area *) (hc->hw.fifos))->d_chan.d_tx; in hfcpci_fill_dfifo()
681 if (dch->debug & DEBUG_HW_DFIFO) in hfcpci_fill_dfifo()
683 df->f1, df->f2, in hfcpci_fill_dfifo()
684 le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1)); in hfcpci_fill_dfifo()
685 fcnt = df->f1 - df->f2; /* frame count actually buffered */ in hfcpci_fill_dfifo()
688 if (fcnt > (MAX_D_FRAMES - 1)) { in hfcpci_fill_dfifo()
689 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
693 cs->err_tx++; in hfcpci_fill_dfifo()
698 maxlen = le16_to_cpu(df->za[df->f2 & D_FREG_MASK].z2) - in hfcpci_fill_dfifo()
699 le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1) - 1; in hfcpci_fill_dfifo()
703 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
707 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
708 printk(KERN_DEBUG "hfcpci_fill_Dfifo no fifo mem\n"); in hfcpci_fill_dfifo()
711 new_z1 = (le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1) + count) & in hfcpci_fill_dfifo()
712 (D_FIFO_SIZE - 1); in hfcpci_fill_dfifo()
713 new_f1 = ((df->f1 + 1) & D_FREG_MASK) | (D_FREG_MASK + 1); in hfcpci_fill_dfifo()
714 src = dch->tx_skb->data + dch->tx_idx; /* source pointer */ in hfcpci_fill_dfifo()
715 dst = df->data + le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
716 maxlen = D_FIFO_SIZE - le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
722 count -= maxlen; /* remaining bytes */ in hfcpci_fill_dfifo()
724 dst = df->data; /* start of buffer */ in hfcpci_fill_dfifo()
728 df->za[new_f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); in hfcpci_fill_dfifo()
730 df->za[df->f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); in hfcpci_fill_dfifo()
732 df->f1 = new_f1; /* next frame */ in hfcpci_fill_dfifo()
733 dch->tx_idx = dch->tx_skb->len; in hfcpci_fill_dfifo()
737 * B-channel send routine
742 struct hfc_pci *hc = bch->hw; in hfcpci_fill_fifo()
750 if ((bch->debug & DEBUG_HW_BCHANNEL) && !(bch->debug & DEBUG_HW_BFIFO)) in hfcpci_fill_fifo()
752 if ((!bch->tx_skb) || bch->tx_skb->len == 0) { in hfcpci_fill_fifo()
753 if (!test_bit(FLG_FILLEMPTY, &bch->Flags) && in hfcpci_fill_fifo()
754 !test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcpci_fill_fifo()
758 count = bch->tx_skb->len - bch->tx_idx; in hfcpci_fill_fifo()
760 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in hfcpci_fill_fifo()
761 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_fill_fifo()
762 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b2; in hfcpci_fill_fifo()
764 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_fill_fifo()
765 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b1; in hfcpci_fill_fifo()
768 if (test_bit(FLG_TRANSPARENT, &bch->Flags)) { in hfcpci_fill_fifo()
769 z1t = &bz->za[MAX_B_FRAMES].z1; in hfcpci_fill_fifo()
771 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
773 "cnt(%d) z1(%x) z2(%x)\n", bch->nr, count, in hfcpci_fill_fifo()
775 fcnt = le16_to_cpu(*z2t) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
778 if (test_bit(FLG_FILLEMPTY, &bch->Flags)) { in hfcpci_fill_fifo()
785 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
786 dst = bdata + (le16_to_cpu(*z1t) - B_SUB_VAL); in hfcpci_fill_fifo()
787 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
789 if (bch->debug & DEBUG_HW_BFIFO) in hfcpci_fill_fifo()
795 memset(dst, bch->fill[0], maxlen); /* first copy */ in hfcpci_fill_fifo()
796 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
799 memset(dst, bch->fill[0], count); in hfcpci_fill_fifo()
805 fcnt = B_FIFO_SIZE - fcnt; in hfcpci_fill_fifo()
809 count = bch->tx_skb->len - bch->tx_idx; in hfcpci_fill_fifo()
810 /* maximum fill shall be poll*2 */ in hfcpci_fill_fifo()
811 if (count > (poll << 1) - fcnt) in hfcpci_fill_fifo()
812 count = (poll << 1) - fcnt; in hfcpci_fill_fifo()
819 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
820 src = bch->tx_skb->data + bch->tx_idx; in hfcpci_fill_fifo()
822 dst = bdata + (le16_to_cpu(*z1t) - B_SUB_VAL); in hfcpci_fill_fifo()
823 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
825 if (bch->debug & DEBUG_HW_BFIFO) in hfcpci_fill_fifo()
830 bch->tx_idx += count; in hfcpci_fill_fifo()
834 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
841 if (bch->tx_idx < bch->tx_skb->len) in hfcpci_fill_fifo()
843 dev_kfree_skb_any(bch->tx_skb); in hfcpci_fill_fifo()
848 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
851 __func__, bch->nr, bz->f1, bz->f2, in hfcpci_fill_fifo()
852 bz->za[bz->f1].z1); in hfcpci_fill_fifo()
853 fcnt = bz->f1 - bz->f2; /* frame count actually buffered */ in hfcpci_fill_fifo()
856 if (fcnt > (MAX_B_FRAMES - 1)) { in hfcpci_fill_fifo()
857 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
863 maxlen = le16_to_cpu(bz->za[bz->f2].z2) - in hfcpci_fill_fifo()
864 le16_to_cpu(bz->za[bz->f1].z1) - 1; in hfcpci_fill_fifo()
868 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
870 bch->nr, count, maxlen); in hfcpci_fill_fifo()
873 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
874 printk(KERN_DEBUG "hfcpci_fill_fifo no fifo mem\n"); in hfcpci_fill_fifo()
877 new_z1 = le16_to_cpu(bz->za[bz->f1].z1) + count; in hfcpci_fill_fifo()
880 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
882 new_f1 = ((bz->f1 + 1) & MAX_B_FRAMES); in hfcpci_fill_fifo()
883 src = bch->tx_skb->data + bch->tx_idx; /* source pointer */ in hfcpci_fill_fifo()
884 dst = bdata + (le16_to_cpu(bz->za[bz->f1].z1) - B_SUB_VAL); in hfcpci_fill_fifo()
885 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(bz->za[bz->f1].z1); in hfcpci_fill_fifo()
891 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
897 bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */ in hfcpci_fill_fifo()
898 bz->f1 = new_f1; /* next frame */ in hfcpci_fill_fifo()
899 dev_kfree_skb_any(bch->tx_skb); in hfcpci_fill_fifo()
912 if (dch->debug) in ph_state_te()
914 __func__, dch->state); in ph_state_te()
915 switch (dch->state) { in ph_state_te()
917 l1_event(dch->l1, HW_RESET_IND); in ph_state_te()
920 l1_event(dch->l1, HW_DEACT_IND); in ph_state_te()
924 l1_event(dch->l1, ANYSIGNAL); in ph_state_te()
927 l1_event(dch->l1, INFO2); in ph_state_te()
930 l1_event(dch->l1, INFO4_P8); in ph_state_te()
941 struct hfc_pci *hc = dch->hw; in handle_nt_timer3()
943 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in handle_nt_timer3()
944 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in handle_nt_timer3()
945 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in handle_nt_timer3()
946 hc->hw.nt_timer = 0; in handle_nt_timer3()
947 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in handle_nt_timer3()
948 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in handle_nt_timer3()
949 hc->hw.mst_m |= HFCPCI_MASTER; in handle_nt_timer3()
950 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in handle_nt_timer3()
951 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in handle_nt_timer3()
958 struct hfc_pci *hc = dch->hw; in ph_state_nt()
960 if (dch->debug) in ph_state_nt()
962 __func__, dch->state); in ph_state_nt()
963 switch (dch->state) { in ph_state_nt()
965 if (hc->hw.nt_timer < 0) { in ph_state_nt()
966 hc->hw.nt_timer = 0; in ph_state_nt()
967 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
968 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
969 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
970 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
976 dch->state = 4; in ph_state_nt()
977 } else if (hc->hw.nt_timer == 0) { in ph_state_nt()
978 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
979 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
980 hc->hw.nt_timer = NT_T1_COUNT; in ph_state_nt()
981 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
982 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
983 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
985 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
986 test_and_set_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
987 /* allow G2 -> G3 transition */ in ph_state_nt()
994 hc->hw.nt_timer = 0; in ph_state_nt()
995 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
996 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
997 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
998 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
999 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_nt()
1000 hc->hw.mst_m &= ~HFCPCI_MASTER; in ph_state_nt()
1001 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in ph_state_nt()
1002 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in ph_state_nt()
1003 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_nt()
1007 hc->hw.nt_timer = 0; in ph_state_nt()
1008 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
1009 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
1010 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
1011 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1014 if (!test_and_set_bit(FLG_HFC_TIMER_T3, &dch->Flags)) { in ph_state_nt()
1016 &dch->Flags)) { in ph_state_nt()
1020 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
1021 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
1022 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1023 hc->hw.nt_timer = NT_T3_COUNT; in ph_state_nt()
1024 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
1025 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
1026 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
1036 struct hfc_pci *hc = dch->hw; in ph_state()
1038 if (hc->hw.protocol == ISDN_P_NT_S0) { in ph_state()
1039 if (test_bit(FLG_HFC_TIMER_T3, &dch->Flags) && in ph_state()
1040 hc->hw.nt_timer < 0) in ph_state()
1054 struct hfc_pci *hc = dch->hw; in hfc_l1callback()
1059 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfc_l1callback()
1060 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1061 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1068 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfc_l1callback()
1069 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1070 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1073 l1_event(dch->l1, HW_POWERUP_IND); in hfc_l1callback()
1076 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfc_l1callback()
1077 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1078 skb_queue_purge(&dch->squeue); in hfc_l1callback()
1079 if (dch->tx_skb) { in hfc_l1callback()
1080 dev_kfree_skb(dch->tx_skb); in hfc_l1callback()
1081 dch->tx_skb = NULL; in hfc_l1callback()
1083 dch->tx_idx = 0; in hfc_l1callback()
1084 if (dch->rx_skb) { in hfc_l1callback()
1085 dev_kfree_skb(dch->rx_skb); in hfc_l1callback()
1086 dch->rx_skb = NULL; in hfc_l1callback()
1088 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfc_l1callback()
1089 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfc_l1callback()
1090 del_timer(&dch->timer); in hfc_l1callback()
1096 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in hfc_l1callback()
1097 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfc_l1callback()
1101 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in hfc_l1callback()
1102 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfc_l1callback()
1106 if (dch->debug & DEBUG_HW) in hfc_l1callback()
1109 return -1; in hfc_l1callback()
1120 if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) in tx_birq()
1123 dev_kfree_skb_any(bch->tx_skb); in tx_birq()
1132 if (dch->tx_skb && dch->tx_idx < dch->tx_skb->len) in tx_dirq()
1133 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1135 dev_kfree_skb(dch->tx_skb); in tx_dirq()
1137 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1149 spin_lock(&hc->lock); in hfcpci_int()
1150 if (!(hc->hw.int_m2 & 0x08)) { in hfcpci_int()
1151 spin_unlock(&hc->lock); in hfcpci_int()
1157 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1159 "HFC-PCI: stat(%02x) s1(%02x)\n", stat, val); in hfcpci_int()
1162 spin_unlock(&hc->lock); in hfcpci_int()
1165 hc->irqcnt++; in hfcpci_int()
1167 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1168 printk(KERN_DEBUG "HFC-PCI irq %x\n", val); in hfcpci_int()
1169 val &= hc->hw.int_m1; in hfcpci_int()
1172 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1173 printk(KERN_DEBUG "ph_state chg %d->%d\n", in hfcpci_int()
1174 hc->dch.state, exval); in hfcpci_int()
1175 hc->dch.state = exval; in hfcpci_int()
1176 schedule_event(&hc->dch, FLG_PHCHANGE); in hfcpci_int()
1180 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_int()
1181 if ((--hc->hw.nt_timer) < 0) in hfcpci_int()
1182 schedule_event(&hc->dch, FLG_PHCHANGE); in hfcpci_int()
1185 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | HFCPCI_CLTIMER); in hfcpci_int()
1188 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1191 else if (hc->dch.debug) in hfcpci_int()
1198 else if (hc->dch.debug) in hfcpci_int()
1202 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1205 else if (hc->dch.debug) in hfcpci_int()
1212 else if (hc->dch.debug) in hfcpci_int()
1218 if (test_and_clear_bit(FLG_BUSY_TIMER, &hc->dch.Flags)) in hfcpci_int()
1219 del_timer(&hc->dch.timer); in hfcpci_int()
1220 tx_dirq(&hc->dch); in hfcpci_int()
1222 spin_unlock(&hc->lock); in hfcpci_int()
1227 * timer callback for D-chan busy resolution. Currently no function
1240 struct hfc_pci *hc = bch->hw; in mode_hfcpci()
1244 if (bch->debug & DEBUG_HW_BCHANNEL) in mode_hfcpci()
1246 "HFCPCI bchannel protocol %x-->%x ch %x-->%x\n", in mode_hfcpci()
1247 bch->state, protocol, bch->nr, bc); in mode_hfcpci()
1252 if (!test_bit(HFC_CFG_PCM, &hc->cfg)) in mode_hfcpci()
1259 } else if (test_bit(HFC_CFG_PCM, &hc->cfg) && (protocol > ISDN_P_NONE)) in mode_hfcpci()
1260 printk(KERN_WARNING "%s: no pcm channel id but HFC_CFG_PCM\n", in mode_hfcpci()
1262 if (hc->chanlimit > 1) { in mode_hfcpci()
1263 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1264 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1268 hc->hw.bswapped = 1; /* B1 and B2 exchanged */ in mode_hfcpci()
1269 hc->hw.sctrl_e |= 0x80; in mode_hfcpci()
1271 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1272 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1276 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1277 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1281 case (-1): /* used for init */ in mode_hfcpci()
1282 bch->state = -1; in mode_hfcpci()
1283 bch->nr = bc; in mode_hfcpci()
1286 if (bch->state == ISDN_P_NONE) in mode_hfcpci()
1289 hc->hw.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1290 hc->hw.sctrl_r &= ~SCTRL_B2_ENA; in mode_hfcpci()
1292 hc->hw.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1293 hc->hw.sctrl_r &= ~SCTRL_B1_ENA; in mode_hfcpci()
1296 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1297 hc->hw.int_m1 &= ~(HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1300 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1301 hc->hw.int_m1 &= ~(HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1305 if (bch->nr & 2) in mode_hfcpci()
1306 hc->hw.cirm &= 0x7f; in mode_hfcpci()
1308 hc->hw.cirm &= 0xbf; in mode_hfcpci()
1310 bch->state = ISDN_P_NONE; in mode_hfcpci()
1311 bch->nr = bc; in mode_hfcpci()
1312 test_and_clear_bit(FLG_HDLC, &bch->Flags); in mode_hfcpci()
1313 test_and_clear_bit(FLG_TRANSPARENT, &bch->Flags); in mode_hfcpci()
1316 bch->state = protocol; in mode_hfcpci()
1317 bch->nr = bc; in mode_hfcpci()
1321 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1322 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1324 hc->hw.cirm |= 0x80; in mode_hfcpci()
1327 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1328 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1330 hc->hw.cirm |= 0x40; in mode_hfcpci()
1334 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1336 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1338 hc->hw.ctmt |= 2; in mode_hfcpci()
1339 hc->hw.conn &= ~0x18; in mode_hfcpci()
1341 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1343 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1345 hc->hw.ctmt |= 1; in mode_hfcpci()
1346 hc->hw.conn &= ~0x03; in mode_hfcpci()
1348 test_and_set_bit(FLG_TRANSPARENT, &bch->Flags); in mode_hfcpci()
1351 bch->state = protocol; in mode_hfcpci()
1352 bch->nr = bc; in mode_hfcpci()
1356 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1357 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1359 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1360 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1363 hc->hw.last_bfifo_cnt[1] = 0; in mode_hfcpci()
1364 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1365 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1367 hc->hw.ctmt &= ~2; in mode_hfcpci()
1368 hc->hw.conn &= ~0x18; in mode_hfcpci()
1370 hc->hw.last_bfifo_cnt[0] = 0; in mode_hfcpci()
1371 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1372 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1374 hc->hw.ctmt &= ~1; in mode_hfcpci()
1375 hc->hw.conn &= ~0x03; in mode_hfcpci()
1377 test_and_set_bit(FLG_HDLC, &bch->Flags); in mode_hfcpci()
1381 return -ENOPROTOOPT; in mode_hfcpci()
1383 if (test_bit(HFC_CFG_PCM, &hc->cfg)) { in mode_hfcpci()
1385 (protocol == -1)) { /* init case */ in mode_hfcpci()
1389 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) { in mode_hfcpci()
1398 hc->hw.conn &= 0xc7; in mode_hfcpci()
1399 hc->hw.conn |= 0x08; in mode_hfcpci()
1407 hc->hw.conn &= 0xf8; in mode_hfcpci()
1408 hc->hw.conn |= 0x01; in mode_hfcpci()
1417 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in mode_hfcpci()
1418 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in mode_hfcpci()
1419 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in mode_hfcpci()
1420 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in mode_hfcpci()
1421 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in mode_hfcpci()
1422 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in mode_hfcpci()
1423 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in mode_hfcpci()
1425 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in mode_hfcpci()
1433 struct hfc_pci *hc = bch->hw; in set_hfcpci_rxtest()
1435 if (bch->debug & DEBUG_HW_BCHANNEL) in set_hfcpci_rxtest()
1437 "HFCPCI bchannel test rx protocol %x-->%x ch %x-->%x\n", in set_hfcpci_rxtest()
1438 bch->state, protocol, bch->nr, chan); in set_hfcpci_rxtest()
1439 if (bch->nr != chan) { in set_hfcpci_rxtest()
1442 bch->nr, chan); in set_hfcpci_rxtest()
1443 return -EINVAL; in set_hfcpci_rxtest()
1447 bch->state = protocol; in set_hfcpci_rxtest()
1450 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1451 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1453 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1454 hc->hw.ctmt |= 2; in set_hfcpci_rxtest()
1455 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1457 hc->hw.cirm |= 0x80; in set_hfcpci_rxtest()
1460 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1461 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1463 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1464 hc->hw.ctmt |= 1; in set_hfcpci_rxtest()
1465 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1467 hc->hw.cirm |= 0x40; in set_hfcpci_rxtest()
1472 bch->state = protocol; in set_hfcpci_rxtest()
1475 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1476 hc->hw.last_bfifo_cnt[1] = 0; in set_hfcpci_rxtest()
1477 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1478 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1479 hc->hw.ctmt &= ~2; in set_hfcpci_rxtest()
1480 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1482 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1483 hc->hw.last_bfifo_cnt[0] = 0; in set_hfcpci_rxtest()
1484 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1485 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1486 hc->hw.ctmt &= ~1; in set_hfcpci_rxtest()
1487 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1492 return -ENOPROTOOPT; in set_hfcpci_rxtest()
1494 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in set_hfcpci_rxtest()
1495 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in set_hfcpci_rxtest()
1496 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in set_hfcpci_rxtest()
1497 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in set_hfcpci_rxtest()
1498 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in set_hfcpci_rxtest()
1500 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in set_hfcpci_rxtest()
1508 struct hfc_pci *hc = bch->hw; in deactivate_bchannel()
1511 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
1513 mode_hfcpci(bch, bch->nr, ISDN_P_NONE); in deactivate_bchannel()
1514 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
1518 * Layer 1 B-channel hardware access
1529 struct hfc_pci *hc = bch->hw; in hfc_bctrl()
1530 int ret = -EINVAL; in hfc_bctrl()
1533 if (bch->debug & DEBUG_HW) in hfc_bctrl()
1537 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1539 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1542 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1544 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1547 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1548 mode_hfcpci(bch, bch->nr, ISDN_P_NONE); in hfc_bctrl()
1549 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1553 test_and_clear_bit(FLG_OPEN, &bch->Flags); in hfc_bctrl()
1555 ch->protocol = ISDN_P_NONE; in hfc_bctrl()
1556 ch->peer = NULL; in hfc_bctrl()
1571 * Layer2 -> Layer 1 Dchannel data
1578 struct hfc_pci *hc = dch->hw; in hfcpci_l2l1D()
1579 int ret = -EINVAL; in hfcpci_l2l1D()
1584 switch (hh->prim) { in hfcpci_l2l1D()
1586 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1589 id = hh->id; /* skb can be freed */ in hfcpci_l2l1D()
1590 hfcpci_fill_dfifo(dch->hw); in hfcpci_l2l1D()
1592 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1595 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1598 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1599 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1601 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfcpci_l2l1D()
1602 hc->hw.mst_m |= HFCPCI_MASTER; in hfcpci_l2l1D()
1603 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1604 if (test_bit(FLG_ACTIVE, &dch->Flags)) { in hfcpci_l2l1D()
1605 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1606 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in hfcpci_l2l1D()
1610 test_and_set_bit(FLG_L2_ACTIVATED, &dch->Flags); in hfcpci_l2l1D()
1614 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1615 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1618 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in hfcpci_l2l1D()
1619 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1620 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1626 skb_queue_splice_init(&dch->squeue, &free_queue); in hfcpci_l2l1D()
1627 if (dch->tx_skb) { in hfcpci_l2l1D()
1628 __skb_queue_tail(&free_queue, dch->tx_skb); in hfcpci_l2l1D()
1629 dch->tx_skb = NULL; in hfcpci_l2l1D()
1631 dch->tx_idx = 0; in hfcpci_l2l1D()
1632 if (dch->rx_skb) { in hfcpci_l2l1D()
1633 __skb_queue_tail(&free_queue, dch->rx_skb); in hfcpci_l2l1D()
1634 dch->rx_skb = NULL; in hfcpci_l2l1D()
1636 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfcpci_l2l1D()
1637 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfcpci_l2l1D()
1638 del_timer(&dch->timer); in hfcpci_l2l1D()
1640 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) in hfcpci_l2l1D()
1641 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in hfcpci_l2l1D()
1643 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfcpci_l2l1D()
1644 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1646 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1649 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1650 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1660 * Layer2 -> Layer 1 Bchannel data
1666 struct hfc_pci *hc = bch->hw; in hfcpci_l2l1B()
1667 int ret = -EINVAL; in hfcpci_l2l1B()
1671 switch (hh->prim) { in hfcpci_l2l1B()
1673 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1B()
1679 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1B()
1682 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1B()
1683 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) in hfcpci_l2l1B()
1684 ret = mode_hfcpci(bch, bch->nr, ch->protocol); in hfcpci_l2l1B()
1687 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1B()
1705 * called for card init message
1712 timer_setup(&hc->dch.timer, hfcpci_dbusy_timer, 0); in inithfcpci()
1713 hc->chanlimit = 2; in inithfcpci()
1714 mode_hfcpci(&hc->bch[0], 1, -1); in inithfcpci()
1715 mode_hfcpci(&hc->bch[1], 2, -1); in inithfcpci()
1728 spin_lock_irqsave(&hc->lock, flags); in init_card()
1730 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1731 if (request_irq(hc->irq, hfcpci_int, IRQF_SHARED, "HFC PCI", hc)) { in init_card()
1733 "mISDN: couldn't get interrupt %d\n", hc->irq); in init_card()
1734 return -EIO; in init_card()
1736 spin_lock_irqsave(&hc->lock, flags); in init_card()
1746 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1751 hc->irq, hc->irqcnt); in init_card()
1753 spin_lock_irqsave(&hc->lock, flags); in init_card()
1754 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in init_card()
1755 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in init_card()
1757 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in init_card()
1758 if (!hc->irqcnt) { in init_card()
1760 "HFC PCI: IRQ(%d) getting no interrupts " in init_card()
1761 "during init %d\n", hc->irq, 4 - cnt); in init_card()
1766 cnt--; in init_card()
1769 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1770 hc->initdone = 1; in init_card()
1775 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1776 free_irq(hc->irq, hc); in init_card()
1777 return -EIO; in init_card()
1786 switch (cq->op) { in channel_ctrl()
1788 cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_CONNECT | in channel_ctrl()
1793 if (cq->channel < 0 || cq->channel > 2) { in channel_ctrl()
1794 ret = -EINVAL; in channel_ctrl()
1797 if (cq->channel & 1) { in channel_ctrl()
1798 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1806 hc->hw.conn = (hc->hw.conn & ~7) | 6; in channel_ctrl()
1807 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1809 if (cq->channel & 2) { in channel_ctrl()
1810 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1818 hc->hw.conn = (hc->hw.conn & ~0x38) | 0x30; in channel_ctrl()
1819 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1821 if (cq->channel & 3) in channel_ctrl()
1822 hc->hw.trm |= 0x80; /* enable IOM-loop */ in channel_ctrl()
1824 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1825 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1826 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1828 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1831 if (cq->channel == cq->p1) { in channel_ctrl()
1832 ret = -EINVAL; in channel_ctrl()
1835 if (cq->channel < 1 || cq->channel > 2 || in channel_ctrl()
1836 cq->p1 < 1 || cq->p1 > 2) { in channel_ctrl()
1837 ret = -EINVAL; in channel_ctrl()
1840 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1848 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1856 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x36; in channel_ctrl()
1857 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1858 hc->hw.trm |= 0x80; in channel_ctrl()
1859 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1862 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1863 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1864 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1867 ret = l1_event(hc->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); in channel_ctrl()
1871 __func__, cq->op); in channel_ctrl()
1872 ret = -EINVAL; in channel_ctrl()
1886 hc->dch.dev.id, __builtin_return_address(0)); in open_dchannel()
1887 if (rq->protocol == ISDN_P_NONE) in open_dchannel()
1888 return -EINVAL; in open_dchannel()
1889 if (rq->adr.channel == 1) { in open_dchannel()
1890 /* TODO: E-Channel */ in open_dchannel()
1891 return -EINVAL; in open_dchannel()
1893 if (!hc->initdone) { in open_dchannel()
1894 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
1895 err = create_l1(&hc->dch, hfc_l1callback); in open_dchannel()
1899 hc->hw.protocol = rq->protocol; in open_dchannel()
1900 ch->protocol = rq->protocol; in open_dchannel()
1905 if (rq->protocol != ch->protocol) { in open_dchannel()
1906 if (hc->hw.protocol == ISDN_P_TE_S0) in open_dchannel()
1907 l1_event(hc->dch.l1, CLOSE_CHANNEL); in open_dchannel()
1908 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
1909 err = create_l1(&hc->dch, hfc_l1callback); in open_dchannel()
1913 hc->hw.protocol = rq->protocol; in open_dchannel()
1914 ch->protocol = rq->protocol; in open_dchannel()
1919 if (((ch->protocol == ISDN_P_NT_S0) && (hc->dch.state == 3)) || in open_dchannel()
1920 ((ch->protocol == ISDN_P_TE_S0) && (hc->dch.state == 7))) { in open_dchannel()
1924 rq->ch = ch; in open_dchannel()
1935 if (rq->adr.channel == 0 || rq->adr.channel > 2) in open_bchannel()
1936 return -EINVAL; in open_bchannel()
1937 if (rq->protocol == ISDN_P_NONE) in open_bchannel()
1938 return -EINVAL; in open_bchannel()
1939 bch = &hc->bch[rq->adr.channel - 1]; in open_bchannel()
1940 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) in open_bchannel()
1941 return -EBUSY; /* b-channel can be only open once */ in open_bchannel()
1942 bch->ch.protocol = rq->protocol; in open_bchannel()
1943 rq->ch = &bch->ch; /* TODO: E-channel */ in open_bchannel()
1957 struct hfc_pci *hc = dch->hw; in hfc_dctrl()
1961 if (dch->debug & DEBUG_HW) in hfc_dctrl()
1967 if ((rq->protocol == ISDN_P_TE_S0) || in hfc_dctrl()
1968 (rq->protocol == ISDN_P_NT_S0)) in hfc_dctrl()
1976 __func__, hc->dch.dev.id, in hfc_dctrl()
1984 if (dch->debug & DEBUG_HW) in hfc_dctrl()
1987 return -EINVAL; in hfc_dctrl()
1997 printk(KERN_INFO "mISDN: HFC-PCI driver %s\n", hfcpci_revision); in setup_hw()
1998 hc->hw.cirm = 0; in setup_hw()
1999 hc->dch.state = 0; in setup_hw()
2000 pci_set_master(hc->pdev); in setup_hw()
2001 if (!hc->irq) { in setup_hw()
2002 printk(KERN_WARNING "HFC-PCI: No IRQ for PCI card found\n"); in setup_hw()
2003 return -EINVAL; in setup_hw()
2005 hc->hw.pci_io = in setup_hw()
2006 (char __iomem *)(unsigned long)hc->pdev->resource[1].start; in setup_hw()
2008 if (!hc->hw.pci_io) { in setup_hw()
2009 printk(KERN_WARNING "HFC-PCI: No IO-Mem for PCI card found\n"); in setup_hw()
2010 return -ENOMEM; in setup_hw()
2013 /* the memory needs to be on a 32k boundary within the first 4G */ in setup_hw()
2014 if (dma_set_mask(&hc->pdev->dev, 0xFFFF8000)) { in setup_hw()
2016 "HFC-PCI: No usable DMA configuration!\n"); in setup_hw()
2017 return -EIO; in setup_hw()
2019 buffer = dma_alloc_coherent(&hc->pdev->dev, 0x8000, &hc->hw.dmahandle, in setup_hw()
2024 "HFC-PCI: Error allocating memory for FIFO!\n"); in setup_hw()
2025 return -ENOMEM; in setup_hw()
2027 hc->hw.fifos = buffer; in setup_hw()
2028 pci_write_config_dword(hc->pdev, 0x80, hc->hw.dmahandle); in setup_hw()
2029 hc->hw.pci_io = ioremap((ulong) hc->hw.pci_io, 256); in setup_hw()
2030 if (unlikely(!hc->hw.pci_io)) { in setup_hw()
2032 "HFC-PCI: Error in ioremap for PCI!\n"); in setup_hw()
2033 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in setup_hw()
2034 hc->hw.dmahandle); in setup_hw()
2035 return -ENOMEM; in setup_hw()
2039 "HFC-PCI: defined at mem %#lx fifo %p(%pad) IRQ %d HZ %d\n", in setup_hw()
2040 (u_long) hc->hw.pci_io, hc->hw.fifos, in setup_hw()
2041 &hc->hw.dmahandle, hc->irq, HZ); in setup_hw()
2044 pci_write_config_word(hc->pdev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_hw()
2045 hc->hw.int_m2 = 0; in setup_hw()
2047 hc->hw.int_m1 = 0; in setup_hw()
2048 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in setup_hw()
2051 timer_setup(&hc->hw.timer, hfcpci_Timer, 0); in setup_hw()
2053 test_and_set_bit(HFC_CFG_MASTER, &hc->cfg); in setup_hw()
2061 spin_lock_irqsave(&hc->lock, flags); in release_card()
2062 hc->hw.int_m2 = 0; /* interrupt output off ! */ in release_card()
2064 mode_hfcpci(&hc->bch[0], 1, ISDN_P_NONE); in release_card()
2065 mode_hfcpci(&hc->bch[1], 2, ISDN_P_NONE); in release_card()
2066 if (hc->dch.timer.function != NULL) { in release_card()
2067 del_timer(&hc->dch.timer); in release_card()
2068 hc->dch.timer.function = NULL; in release_card()
2070 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
2071 if (hc->hw.protocol == ISDN_P_TE_S0) in release_card()
2072 l1_event(hc->dch.l1, CLOSE_CHANNEL); in release_card()
2073 if (hc->initdone) in release_card()
2074 free_irq(hc->irq, hc); in release_card()
2076 mISDN_unregister_device(&hc->dch.dev); in release_card()
2077 mISDN_freebchannel(&hc->bch[1]); in release_card()
2078 mISDN_freebchannel(&hc->bch[0]); in release_card()
2079 mISDN_freedchannel(&hc->dch); in release_card()
2080 pci_set_drvdata(hc->pdev, NULL); in release_card()
2087 int err = -EINVAL; in setup_card()
2091 card->dch.debug = debug; in setup_card()
2092 spin_lock_init(&card->lock); in setup_card()
2093 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, ph_state); in setup_card()
2094 card->dch.hw = card; in setup_card()
2095 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); in setup_card()
2096 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in setup_card()
2098 card->dch.dev.D.send = hfcpci_l2l1D; in setup_card()
2099 card->dch.dev.D.ctrl = hfc_dctrl; in setup_card()
2100 card->dch.dev.nrbchan = 2; in setup_card()
2102 card->bch[i].nr = i + 1; in setup_card()
2103 set_channelmap(i + 1, card->dch.dev.channelmap); in setup_card()
2104 card->bch[i].debug = debug; in setup_card()
2105 mISDN_initbchannel(&card->bch[i], MAX_DATA_MEM, poll >> 1); in setup_card()
2106 card->bch[i].hw = card; in setup_card()
2107 card->bch[i].ch.send = hfcpci_l2l1B; in setup_card()
2108 card->bch[i].ch.ctrl = hfc_bctrl; in setup_card()
2109 card->bch[i].ch.nr = i + 1; in setup_card()
2110 list_add(&card->bch[i].ch.list, &card->dch.dev.bchannels); in setup_card()
2115 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-pci.%d", HFC_cnt + 1); in setup_card()
2116 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, name); in setup_card()
2123 mISDN_freebchannel(&card->bch[1]); in setup_card()
2124 mISDN_freebchannel(&card->bch[0]); in setup_card()
2125 mISDN_freedchannel(&card->dch); in setup_card()
2153 {HFC_BERKOM_TCONCEPT, 0, "German telekom T-Concept"},
2165 {HFC_SITECOM_DC105V2, 0, "Sitecom Connectivity DC-105 ISDN TA"},
2223 int err = -ENOMEM; in hfc_probe()
2225 struct _hfc_map *m = (struct _hfc_map *)ent->driver_data; in hfc_probe()
2229 printk(KERN_ERR "No kmem for HFC card\n"); in hfc_probe()
2232 card->pdev = pdev; in hfc_probe()
2233 card->subtype = m->subtype; in hfc_probe()
2241 m->name, pci_name(pdev)); in hfc_probe()
2243 card->irq = pdev->irq; in hfc_probe()
2280 if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) { in _hfcpci_softirq()
2281 spin_lock_irq(&hc->lock); in _hfcpci_softirq()
2282 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in _hfcpci_softirq()
2283 if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */ in _hfcpci_softirq()
2287 bch = Sel_BCS(hc, hc->hw.bswapped ? 1 : 2); in _hfcpci_softirq()
2288 if (bch && bch->state == ISDN_P_B_RAW) { /* B2 rx&tx */ in _hfcpci_softirq()
2292 spin_unlock_irq(&hc->lock); in _hfcpci_softirq()
2304 if ((s32)(hfc_jiffies + tics - jiffies) <= 0) in hfcpci_softirq()
2317 if (!poll) in HFC_init()
2318 poll = HFCPCI_BTRANS_THRESHOLD; in HFC_init()
2320 if (poll != HFCPCI_BTRANS_THRESHOLD) { in HFC_init()
2321 tics = (poll * HZ) / 8000; in HFC_init()
2324 poll = (tics * 8000) / HZ; in HFC_init()
2325 if (poll > 256 || poll < 8) { in HFC_init()
2326 printk(KERN_ERR "%s: Wrong poll value %d not in range " in HFC_init()
2327 "of 8..256.\n", __func__, poll); in HFC_init()
2328 err = -EINVAL; in HFC_init()
2332 if (poll != HFCPCI_BTRANS_THRESHOLD) { in HFC_init()
2333 printk(KERN_INFO "%s: Using alternative poll value of %d\n", in HFC_init()
2334 __func__, poll); in HFC_init()