1 // SPDX-License-Identifier: GPL-2.0
3  *  Support for Versatile FPGA-based IRQ controllers
35  * struct fpga_irq_data - irq data container for the FPGA IRQ controller
38  * @valid: mask for valid IRQs on this controller
43 	u32 valid;  member
55 	u32 mask = 1 << d->hwirq;  in fpga_irq_mask()  local
57 	writel(mask, f->base + IRQ_ENABLE_CLEAR);  in fpga_irq_mask()
63 	u32 mask = 1 << d->hwirq;  in fpga_irq_unmask()  local
65 	writel(mask, f->base + IRQ_ENABLE_SET);  in fpga_irq_unmask()
72 	seq_printf(p, irq_domain_get_of_node(f->domain)->name);  in fpga_irq_print_chip()
90 	status = readl(f->base + IRQ_STATUS);  in fpga_irq_handle()
97 		unsigned int irq = ffs(status) - 1;  in fpga_irq_handle()
100 		generic_handle_domain_irq(f->domain, irq);  in fpga_irq_handle()
108  * Handle each interrupt in a single FPGA IRQ controller.  Returns non-zero
118 	while ((status  = readl(f->base + IRQ_STATUS))) {  in handle_one_fpga()
119 		irq = ffs(status) - 1;  in handle_one_fpga()
120 		generic_handle_domain_irq(f->domain, irq);  in handle_one_fpga()
144 	struct fpga_irq_data *f = d->host_data;  in fpga_irqdomain_map()
147 	if (!(f->valid & BIT(hwirq)))  in fpga_irqdomain_map()
148 		return -EPERM;  in fpga_irqdomain_map()
161 				 u32 valid, struct device_node *node)  in fpga_irq_init()  argument
171 	f->base = base;  in fpga_irq_init()
172 	f->valid = valid;  in fpga_irq_init()
174 	if (parent_irq != -1) {  in fpga_irq_init()
179 	f->domain = irq_domain_add_linear(node, fls(valid),  in fpga_irq_init()
182 	/* This will allocate all valid descriptors in the linear case */  in fpga_irq_init()
183 	for (i = 0; i < fls(valid); i++)  in fpga_irq_init()
184 		if (valid & BIT(i)) {  in fpga_irq_init()
186 			irq_create_mapping(f->domain, i);  in fpga_irq_init()
187 			f->used_irqs++;  in fpga_irq_init()
191 		fpga_irq_id, node->name, base, f->used_irqs);  in fpga_irq_init()
192 	if (parent_irq != -1)  in fpga_irq_init()
210 		return -ENODEV;  in fpga_irq_of_init()
215 	if (of_property_read_u32(node, "clear-mask", &clear_mask))  in fpga_irq_of_init()
218 	if (of_property_read_u32(node, "valid-mask", &valid_mask))  in fpga_irq_of_init()
228 		parent_irq = -1;  in fpga_irq_of_init()
235 	 * pass-thru to the primary controller for IRQs 20 and 22-31 which need  in fpga_irq_of_init()
238 	if (of_device_is_compatible(node, "arm,versatile-sic"))  in fpga_irq_of_init()
243 IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init);
244 IRQCHIP_DECLARE(arm_fpga_sic, "arm,versatile-sic", fpga_irq_of_init);