1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/irqchip/riscv-aplic.h>
10 #include <linux/irqchip/riscv-imsic.h>
17 #include "irq-riscv-aplic-main.h"
23 	writel(d->hwirq, priv->regs + APLIC_SETIENUM);  in aplic_irq_unmask()
30 	writel(d->hwirq, priv->regs + APLIC_CLRIENUM);  in aplic_irq_mask()
56 		return -EINVAL;  in aplic_irq_set_type()
59 	sourcecfg = priv->regs + APLIC_SOURCECFG_BASE;  in aplic_irq_set_type()
60 	sourcecfg += (d->hwirq - 1) * sizeof(u32);  in aplic_irq_set_type()
69 	if (WARN_ON(fwspec->param_count < 2))  in aplic_irqdomain_translate()
70 		return -EINVAL;  in aplic_irqdomain_translate()
71 	if (WARN_ON(!fwspec->param[0]))  in aplic_irqdomain_translate()
72 		return -EINVAL;  in aplic_irqdomain_translate()
75 	*hwirq = fwspec->param[0] - gsi_base;  in aplic_irqdomain_translate()
76 	*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;  in aplic_irqdomain_translate()
90 		val = lower_32_bits(priv->msicfg.base_ppn);  in aplic_init_hw_global()
91 		valh = FIELD_PREP(APLIC_xMSICFGADDRH_BAPPN, upper_32_bits(priv->msicfg.base_ppn));  in aplic_init_hw_global()
92 		valh |= FIELD_PREP(APLIC_xMSICFGADDRH_LHXW, priv->msicfg.lhxw);  in aplic_init_hw_global()
93 		valh |= FIELD_PREP(APLIC_xMSICFGADDRH_HHXW, priv->msicfg.hhxw);  in aplic_init_hw_global()
94 		valh |= FIELD_PREP(APLIC_xMSICFGADDRH_LHXS, priv->msicfg.lhxs);  in aplic_init_hw_global()
95 		valh |= FIELD_PREP(APLIC_xMSICFGADDRH_HHXS, priv->msicfg.hhxs);  in aplic_init_hw_global()
96 		writel(val, priv->regs + APLIC_xMSICFGADDR);  in aplic_init_hw_global()
97 		writel(valh, priv->regs + APLIC_xMSICFGADDRH);  in aplic_init_hw_global()
102 	val = readl(priv->regs + APLIC_DOMAINCFG);  in aplic_init_hw_global()
106 	writel(val, priv->regs + APLIC_DOMAINCFG);  in aplic_init_hw_global()
107 	if (readl(priv->regs + APLIC_DOMAINCFG) != val)  in aplic_init_hw_global()
108 		dev_warn(priv->dev, "unable to write 0x%x in domaincfg\n", val);  in aplic_init_hw_global()
116 	for (i = 0; i <= priv->nr_irqs; i += 32)  in aplic_init_hw_irqs()
117 		writel(-1U, priv->regs + APLIC_CLRIE_BASE + (i / 32) * sizeof(u32));  in aplic_init_hw_irqs()
120 	for (i = 1; i <= priv->nr_irqs; i++) {  in aplic_init_hw_irqs()
121 		writel(0, priv->regs + APLIC_SOURCECFG_BASE + (i - 1) * sizeof(u32));  in aplic_init_hw_irqs()
123 		       priv->regs + APLIC_TARGET_BASE + (i - 1) * sizeof(u32));  in aplic_init_hw_irqs()
127 	writel(0, priv->regs + APLIC_DOMAINCFG);  in aplic_init_hw_irqs()
141 	struct device_node *np = to_of_node(dev->fwnode);  in aplic_setup_priv()
146 	priv->dev = dev;  in aplic_setup_priv()
147 	priv->regs = regs;  in aplic_setup_priv()
150 		/* Find out number of interrupt sources */  in aplic_setup_priv()
151 		rc = of_property_read_u32(np, "riscv,num-sources", &priv->nr_irqs);  in aplic_setup_priv()
153 			dev_err(dev, "failed to get number of interrupt sources\n");  in aplic_setup_priv()
160 		 * If "msi-parent" property is present then we ignore the  in aplic_setup_priv()
163 		if (!of_property_present(np, "msi-parent")) {  in aplic_setup_priv()
164 			while (!of_irq_parse_one(np, priv->nr_idcs, &parent))  in aplic_setup_priv()
165 				priv->nr_idcs++;  in aplic_setup_priv()
168 		rc = riscv_acpi_get_gsi_info(dev->fwnode, &priv->gsi_base, &priv->acpi_aplic_id,  in aplic_setup_priv()
169 					     &priv->nr_irqs, &priv->nr_idcs);  in aplic_setup_priv()
184 	struct device *dev = &pdev->dev;  in aplic_probe()
197 	 * If msi-parent property is present then setup APLIC MSI  in aplic_probe()
200 	if (is_of_node(dev->fwnode))  in aplic_probe()
201 		msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent");  in aplic_probe()
227 		.name		= "riscv-aplic",