drivers/irqchip/irq-qcom-mpm.c

26  * This is the driver for Qualcomm MPM (MSM Power Manager) interrupt controller,
28  * Sitting in always-on domain, MPM monitors the wakeup interrupts when SoC is
30  * doesn't directly access physical MPM registers though.  Instead, the access
37  * ownership and dump vMPM into physical MPM registers.  On wakeup, AP is woken
38  * up by a MPM pin/interrupt, and RPM will copy STATUS registers into vMPM.
72 /* MPM pin map to GIC hwirq */
191 	.name			= "mpm",
337 	ret = of_property_read_u32(np, "qcom,mpm-pin-count", &pin_cnt);  in qcom_mpm_init()
339 		dev_err(dev, "failed to read qcom,mpm-pin-count: %d\n", ret);  in qcom_mpm_init()
345 	ret = of_property_count_u32_elems(np, "qcom,mpm-pin-map");  in qcom_mpm_init()
347 		dev_err(dev, "failed to read qcom,mpm-pin-map: %d\n", ret);  in qcom_mpm_init()
352 		dev_err(dev, "invalid qcom,mpm-pin-map\n");  in qcom_mpm_init()
365 		of_property_read_u32_index(np, "qcom,mpm-pin-map", i * 2, &pin);  in qcom_mpm_init()
366 		of_property_read_u32_index(np, "qcom,mpm-pin-map", i * 2 + 1, &hwirq);  in qcom_mpm_init()
443 		dev_err(dev, "failed to find MPM parent domain\n");  in qcom_mpm_init()
452 		dev_err(dev, "failed to create MPM domain\n");  in qcom_mpm_init()
478 IRQCHIP_MATCH("qcom,mpm", qcom_mpm_init)