61 	u32 reg_idx = SEI_IRQ_REG_IDX(d->hwirq);  in mvebu_sei_ack_irq()  local
64 		       sei->base + GICP_SECR(reg_idx));  in mvebu_sei_ack_irq()
70 	u32 reg, reg_idx = SEI_IRQ_REG_IDX(d->hwirq);  in mvebu_sei_mask_irq()  local
75 	reg = readl_relaxed(sei->base + GICP_SEMR(reg_idx));  in mvebu_sei_mask_irq()
77 	writel_relaxed(reg, sei->base + GICP_SEMR(reg_idx));  in mvebu_sei_mask_irq()
84 	u32 reg, reg_idx = SEI_IRQ_REG_IDX(d->hwirq);  in mvebu_sei_unmask_irq()  local
89 	reg = readl_relaxed(sei->base + GICP_SEMR(reg_idx));  in mvebu_sei_unmask_irq()
91 	writel_relaxed(reg, sei->base + GICP_SEMR(reg_idx));  in mvebu_sei_unmask_irq()
342 	u32 reg_idx;  in mvebu_sei_reset()  local
345 	for (reg_idx = 0; reg_idx < SEI_IRQ_REG_COUNT; reg_idx++) {  in mvebu_sei_reset()
346 		writel_relaxed(0xFFFFFFFF, sei->base + GICP_SECR(reg_idx));  in mvebu_sei_reset()
347 		writel_relaxed(0xFFFFFFFF, sei->base + GICP_SEMR(reg_idx));  in mvebu_sei_reset()