6  * Copyright (C) 2008 Ralf Baechle (ralf@linux-mips.org)
7  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
10 #define pr_fmt(fmt) "irq-mips-gic: " fmt
26 #include <asm/mips-cps.h>
30 #include <dt-bindings/interrupt-controller/mips-gic.h>
35 /* Add 2 to convert GIC CPU pin to core interrupt */
38 /* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */
41 /* Convert between local/shared IRQ number and GIC HW IRQ number. */
44 #define GIC_HWIRQ_TO_LOCAL(x)	((x) - GIC_LOCAL_HWIRQ_BASE)
47 #define GIC_HWIRQ_TO_SHARED(x)	((x) - GIC_SHARED_HWIRQ_BASE)
105 	irq -= GIC_PIN_TO_VEC_OFFSET;  in gic_bind_eic_interrupt()
131 			return -1;  in gic_get_c0_perfcount_int()
143 			return -1;  in gic_get_c0_fdc_int()
157 	/* Get per-cpu bitmaps */  in gic_handle_shared_int()
181 	unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_mask_irq()
189 	unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_unmask_irq()
201 	unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_ack_irq()
211 	irq = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_set_type()
262 	unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_set_affinity()
268 		return -EINVAL;  in gic_set_affinity()
273 	/* Re-route this IRQ */  in gic_set_affinity()
289 	.name			=	"MIPS GIC",
299 	.name			=	"MIPS GIC",
332 	int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_mask_local_irq()
339 	int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_unmask_local_irq()
345 	.name			=	"MIPS GIC Local",
356 	intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_mask_local_irq_all_vpes()
358 	cd->mask = false;  in gic_mask_local_irq_all_vpes()
374 	intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_unmask_local_irq_all_vpes()
376 	cd->mask = true;  in gic_unmask_local_irq_all_vpes()
405 		write_gic_vl_map(mips_gic_vx_map_reg(intr), cd->map);  in gic_all_vpes_irq_cpu_online()
406 		if (cd->mask)  in gic_all_vpes_irq_cpu_online()
414 	.name			= "MIPS GIC Local",
455 		return -EINVAL;  in gic_irq_domain_xlate()
462 		return -EINVAL;  in gic_irq_domain_xlate()
481 			return -EBUSY;  in gic_irq_domain_map()
498 	 * If adding support for more per-cpu interrupts, keep the  in gic_irq_domain_map()
507 		 * the rest of the MIPS kernel code does not use the  in gic_irq_domain_map()
511 		cd->map = map;  in gic_irq_domain_map()
534 		return -EPERM;  in gic_irq_domain_map()
552 	if (fwspec->param[0] == GIC_SHARED)  in gic_irq_domain_alloc()
553 		hwirq = GIC_SHARED_TO_HWIRQ(fwspec->param[1]);  in gic_irq_domain_alloc()
555 		hwirq = GIC_LOCAL_TO_HWIRQ(fwspec->param[1]);  in gic_irq_domain_alloc()
598 		return -ENOMEM;  in gic_ipi_domain_alloc()
603 			return -EBUSY;  in gic_ipi_domain_alloc()
618 		ret = irq_domain_set_hwirq_and_chip(d->parent, virq + i, hwirq,  in gic_ipi_domain_alloc()
662 		is_ipi = d->bus_token == bus_token;  in gic_ipi_domain_match()
663 		return (!node || to_of_node(d->fwnode) == node) && is_ipi;  in gic_ipi_domain_match()
688 		return -ENXIO;  in gic_register_ipi_domain()
694 	    !of_property_read_u32_array(node, "mti,reserved-ipi-vectors", v, 2)) {  in gic_register_ipi_domain()
699 		 * meeting the requirements of arch/mips SMP.  in gic_register_ipi_domain()
702 		bitmap_set(ipi_resrv, gic_shared_intrs - num_ipis, num_ipis);  in gic_register_ipi_domain()
747 	while (!of_property_read_u32_index(node, "mti,reserved-cpu-vectors",  in gic_of_init()
754 		return -ENODEV;  in gic_of_init()
759 		 * Probe the CM for the GIC base address if not specified  in gic_of_init()
760 		 * in the device-tree.  in gic_of_init()
770 			return -ENODEV;  in gic_of_init()
779 		/* Ensure GIC region is enabled before trying to access it */  in gic_of_init()
786 		return -ENOMEM;  in gic_of_init()
799 		gic_cpu_pin = cpu_vec - GIC_CPU_PIN_OFFSET;  in gic_of_init()
809 		return -ENXIO;  in gic_of_init()
826 				 "irqchip/mips/gic:starting",  in gic_of_init()
829 IRQCHIP_DECLARE(mips_gic, "mti,gic", gic_of_init);