31 static void __iomem *gpcv2_idx_to_reg(struct gpcv2_irqchip_data *cd, int i)  in gpcv2_idx_to_reg()  argument
33 	return cd->gpc_base + cd->cpu2wakeup + i * 4;  in gpcv2_idx_to_reg()
38 	struct gpcv2_irqchip_data *cd;  in gpcv2_wakeup_source_save()  local
42 	cd = imx_gpcv2_instance;  in gpcv2_wakeup_source_save()
43 	if (!cd)  in gpcv2_wakeup_source_save()
47 		reg = gpcv2_idx_to_reg(cd, i);  in gpcv2_wakeup_source_save()
48 		cd->saved_irq_mask[i] = readl_relaxed(reg);  in gpcv2_wakeup_source_save()
49 		writel_relaxed(cd->wakeup_sources[i], reg);  in gpcv2_wakeup_source_save()
57 	struct gpcv2_irqchip_data *cd;  in gpcv2_wakeup_source_restore()  local
60 	cd = imx_gpcv2_instance;  in gpcv2_wakeup_source_restore()
61 	if (!cd)  in gpcv2_wakeup_source_restore()
65 		writel_relaxed(cd->saved_irq_mask[i], gpcv2_idx_to_reg(cd, i));  in gpcv2_wakeup_source_restore()
75 	struct gpcv2_irqchip_data *cd = d->chip_data;  in imx_gpcv2_irq_set_wake()  local
80 	raw_spin_lock_irqsave(&cd->rlock, flags);  in imx_gpcv2_irq_set_wake()
82 	val = cd->wakeup_sources[idx];  in imx_gpcv2_irq_set_wake()
84 	cd->wakeup_sources[idx] = on ? (val & ~mask) : (val | mask);  in imx_gpcv2_irq_set_wake()
85 	raw_spin_unlock_irqrestore(&cd->rlock, flags);  in imx_gpcv2_irq_set_wake()
97 	struct gpcv2_irqchip_data *cd = d->chip_data;  in imx_gpcv2_irq_unmask()  local
101 	raw_spin_lock(&cd->rlock);  in imx_gpcv2_irq_unmask()
102 	reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);  in imx_gpcv2_irq_unmask()
106 	raw_spin_unlock(&cd->rlock);  in imx_gpcv2_irq_unmask()
113 	struct gpcv2_irqchip_data *cd = d->chip_data;  in imx_gpcv2_irq_mask()  local
117 	raw_spin_lock(&cd->rlock);  in imx_gpcv2_irq_mask()
118 	reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);  in imx_gpcv2_irq_mask()
122 	raw_spin_unlock(&cd->rlock);  in imx_gpcv2_irq_mask()
206 	struct gpcv2_irqchip_data *cd;  in imx_gpcv2_irqchip_init()  local
230 	cd = kzalloc(sizeof(struct gpcv2_irqchip_data), GFP_KERNEL);  in imx_gpcv2_irqchip_init()
231 	if (!cd)  in imx_gpcv2_irqchip_init()
234 	raw_spin_lock_init(&cd->rlock);  in imx_gpcv2_irqchip_init()
236 	cd->gpc_base = of_iomap(node, 0);  in imx_gpcv2_irqchip_init()
237 	if (!cd->gpc_base) {  in imx_gpcv2_irqchip_init()
239 		kfree(cd);  in imx_gpcv2_irqchip_init()
244 				node, &gpcv2_irqchip_data_domain_ops, cd);  in imx_gpcv2_irqchip_init()
246 		iounmap(cd->gpc_base);  in imx_gpcv2_irqchip_init()
247 		kfree(cd);  in imx_gpcv2_irqchip_init()
254 		void __iomem *reg = cd->gpc_base + i * 4;  in imx_gpcv2_irqchip_init()
265 		cd->wakeup_sources[i] = ~0;  in imx_gpcv2_irqchip_init()
269 	cd->cpu2wakeup = GPC_IMR1_CORE0;  in imx_gpcv2_irqchip_init()
276 	writel_relaxed(~0x1, cd->gpc_base + cd->cpu2wakeup);  in imx_gpcv2_irqchip_init()
278 	imx_gpcv2_instance = cd;  in imx_gpcv2_irqchip_init()