Lines Matching +full:cpu +full:- +full:intc
1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/cpu.h>
14 #include <linux/irqchip/irq-bcm2836.h>
23 static struct bcm2836_arm_irqchip_intc intc __read_mostly;
27 int cpu) in bcm2836_arm_irqchip_mask_per_cpu_irq() argument
29 void __iomem *reg = intc.base + reg_offset + 4 * cpu; in bcm2836_arm_irqchip_mask_per_cpu_irq()
36 int cpu) in bcm2836_arm_irqchip_unmask_per_cpu_irq() argument
38 void __iomem *reg = intc.base + reg_offset + 4 * cpu; in bcm2836_arm_irqchip_unmask_per_cpu_irq()
46 d->hwirq - LOCAL_IRQ_CNTPSIRQ, in bcm2836_arm_irqchip_mask_timer_irq()
53 d->hwirq - LOCAL_IRQ_CNTPSIRQ, in bcm2836_arm_irqchip_unmask_timer_irq()
58 .name = "bcm2836-timer",
65 writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_CLR); in bcm2836_arm_irqchip_mask_pmu_irq()
70 writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_SET); in bcm2836_arm_irqchip_unmask_pmu_irq()
74 .name = "bcm2836-pmu",
88 .name = "bcm2836-gpu",
98 .name = "bcm2836-dummy",
125 return -EINVAL; in bcm2836_map()
129 irq_domain_set_info(d, irq, hw, chip, d->host_data, in bcm2836_map()
139 int cpu = smp_processor_id(); in bcm2836_arm_irqchip_handle_irq() local
142 stat = readl_relaxed(intc.base + LOCAL_IRQ_PENDING0 + 4 * cpu); in bcm2836_arm_irqchip_handle_irq()
144 u32 hwirq = ffs(stat) - 1; in bcm2836_arm_irqchip_handle_irq()
146 generic_handle_domain_irq(intc.domain, hwirq); in bcm2836_arm_irqchip_handle_irq()
156 int cpu = smp_processor_id(); in bcm2836_arm_irqchip_handle_ipi() local
161 mbox_val = readl_relaxed(intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu); in bcm2836_arm_irqchip_handle_ipi()
163 int hwirq = ffs(mbox_val) - 1; in bcm2836_arm_irqchip_handle_ipi()
172 int cpu = smp_processor_id(); in bcm2836_arm_irqchip_ipi_ack() local
174 writel_relaxed(BIT(d->hwirq), in bcm2836_arm_irqchip_ipi_ack()
175 intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu); in bcm2836_arm_irqchip_ipi_ack()
181 int cpu; in bcm2836_arm_irqchip_ipi_send_mask() local
182 void __iomem *mailbox0_base = intc.base + LOCAL_MAILBOX0_SET0; in bcm2836_arm_irqchip_ipi_send_mask()
190 for_each_cpu(cpu, mask) in bcm2836_arm_irqchip_ipi_send_mask()
191 writel_relaxed(BIT(d->hwirq), mailbox0_base + 16 * cpu); in bcm2836_arm_irqchip_ipi_send_mask()
211 d->host_data, in bcm2836_arm_irqchip_ipi_alloc()
231 static int bcm2836_cpu_starting(unsigned int cpu) in bcm2836_cpu_starting() argument
234 cpu); in bcm2836_cpu_starting()
238 static int bcm2836_cpu_dying(unsigned int cpu) in bcm2836_cpu_dying() argument
241 cpu); in bcm2836_cpu_dying()
250 .fwnode = intc.domain->fwnode, in bcm2836_arm_irqchip_smp_init()
262 ipi_domain = irq_domain_create_linear(intc.domain->fwnode, in bcm2836_arm_irqchip_smp_init()
268 ipi_domain->flags |= IRQ_DOMAIN_FLAG_IPI_SINGLE; in bcm2836_arm_irqchip_smp_init()
280 /* Unmask IPIs to the boot CPU. */ in bcm2836_arm_irqchip_smp_init()
306 writel(0, intc.base + LOCAL_CONTROL); in bcm2835_init_local_timer_frequency()
312 writel(0x80000000, intc.base + LOCAL_PRESCALER); in bcm2835_init_local_timer_frequency()
318 intc.base = of_iomap(node, 0); in bcm2836_arm_irqchip_l1_intc_of_init()
319 if (!intc.base) { in bcm2836_arm_irqchip_l1_intc_of_init()
325 intc.domain = irq_domain_add_linear(node, LAST_IRQ + 1, in bcm2836_arm_irqchip_l1_intc_of_init()
328 if (!intc.domain) in bcm2836_arm_irqchip_l1_intc_of_init()
331 irq_domain_update_bus_token(intc.domain, DOMAIN_BUS_WIRED); in bcm2836_arm_irqchip_l1_intc_of_init()
339 IRQCHIP_DECLARE(bcm2836_arm_irqchip_l1_intc, "brcm,bcm2836-l1-intc",