1 // SPDX-License-Identifier: GPL-2.0-or-later
3  *  Copyright (C) 2015 - Ben Herrenschmidt, IBM Corp.
5  *  Driver for Aspeed "new" VIC as found in SoC generation 3 and later
7  *  Based on irq-vic.c:
9  *  Copyright (C) 1999 - 2003 ARM Limited
58 static void vic_init_hw(struct aspeed_vic *vic)  in vic_init_hw()  argument
63 	writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR);  in vic_init_hw()
64 	writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR + 4);  in vic_init_hw()
67 	writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR);  in vic_init_hw()
68 	writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR + 4);  in vic_init_hw()
71 	writel(0, vic->base + AVIC_INT_SELECT);  in vic_init_hw()
72 	writel(0, vic->base + AVIC_INT_SELECT + 4);  in vic_init_hw()
78 	sense = readl(vic->base + AVIC_INT_SENSE);  in vic_init_hw()
79 	vic->edge_sources[0] = ~sense;  in vic_init_hw()
80 	sense = readl(vic->base + AVIC_INT_SENSE + 4);  in vic_init_hw()
81 	vic->edge_sources[1] = ~sense;  in vic_init_hw()
84 	writel(0xffffffff, vic->base + AVIC_EDGE_CLR);  in vic_init_hw()
85 	writel(0xffffffff, vic->base + AVIC_EDGE_CLR + 4);  in vic_init_hw()
90 	struct aspeed_vic *vic = system_avic;  in avic_handle_irq()  local
95 		stat = readl_relaxed(vic->base + AVIC_IRQ_STATUS);  in avic_handle_irq()
97 			stat = readl_relaxed(vic->base + AVIC_IRQ_STATUS + 4);  in avic_handle_irq()
102 		irq += ffs(stat) - 1;  in avic_handle_irq()
103 		generic_handle_domain_irq(vic->dom, irq);  in avic_handle_irq()
109 	struct aspeed_vic *vic = irq_data_get_irq_chip_data(d);  in avic_ack_irq()  local
110 	unsigned int sidx = d->hwirq >> 5;  in avic_ack_irq()
111 	unsigned int sbit = 1u << (d->hwirq & 0x1f);  in avic_ack_irq()
114 	if (vic->edge_sources[sidx] & sbit)  in avic_ack_irq()
115 		writel(sbit, vic->base + AVIC_EDGE_CLR + sidx * 4);  in avic_ack_irq()
120 	struct aspeed_vic *vic = irq_data_get_irq_chip_data(d);  in avic_mask_irq()  local
121 	unsigned int sidx = d->hwirq >> 5;  in avic_mask_irq()
122 	unsigned int sbit = 1u << (d->hwirq & 0x1f);  in avic_mask_irq()
124 	writel(sbit, vic->base + AVIC_INT_ENABLE_CLR + sidx * 4);  in avic_mask_irq()
129 	struct aspeed_vic *vic = irq_data_get_irq_chip_data(d);  in avic_unmask_irq()  local
130 	unsigned int sidx = d->hwirq >> 5;  in avic_unmask_irq()
131 	unsigned int sbit = 1u << (d->hwirq & 0x1f);  in avic_unmask_irq()
133 	writel(sbit, vic->base + AVIC_INT_ENABLE + sidx * 4);  in avic_unmask_irq()
139 	struct aspeed_vic *vic = irq_data_get_irq_chip_data(d);  in avic_mask_ack_irq()  local
140 	unsigned int sidx = d->hwirq >> 5;  in avic_mask_ack_irq()
141 	unsigned int sbit = 1u << (d->hwirq & 0x1f);  in avic_mask_ack_irq()
144 	writel(sbit, vic->base + AVIC_INT_ENABLE_CLR + sidx * 4);  in avic_mask_ack_irq()
147 	if (vic->edge_sources[sidx] & sbit)  in avic_mask_ack_irq()
148 		writel(sbit, vic->base + AVIC_EDGE_CLR + sidx * 4);  in avic_mask_ack_irq()
162 	struct aspeed_vic *vic = d->host_data;  in avic_map()  local
168 		return -EPERM;  in avic_map()
170 	if (vic->edge_sources[sidx] & sbit)  in avic_map()
174 	irq_set_chip_data(irq, vic);  in avic_map()
188 	struct aspeed_vic *vic;  in avic_of_init()  local
190 	if (WARN(parent, "non-root Aspeed VIC not supported"))  in avic_of_init()
191 		return -EINVAL;  in avic_of_init()
192 	if (WARN(system_avic, "duplicate Aspeed VIC not supported"))  in avic_of_init()
193 		return -EINVAL;  in avic_of_init()
197 		return -EIO;  in avic_of_init()
199 	vic = kzalloc(sizeof(struct aspeed_vic), GFP_KERNEL);  in avic_of_init()
200 	if (WARN_ON(!vic)) {  in avic_of_init()
202 		return -ENOMEM;  in avic_of_init()
204 	vic->base = regs;  in avic_of_init()
207 	vic_init_hw(vic);  in avic_of_init()
210 	system_avic = vic;  in avic_of_init()
214 	vic->dom = irq_domain_add_simple(node, NUM_IRQS, 0,  in avic_of_init()
215 					 &avic_dom_ops, vic);  in avic_of_init()
220 IRQCHIP_DECLARE(ast2400_vic, "aspeed,ast2400-vic", avic_of_init);
221 IRQCHIP_DECLARE(ast2500_vic, "aspeed,ast2500-vic", avic_of_init);