Lines Matching refs:irqc

811 static int __init aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node)  in aic_init_smp()  argument
936 struct aic_irq_chip *irqc; in aic_of_ic_init() local
944 irqc = kzalloc(sizeof(*irqc), GFP_KERNEL); in aic_of_ic_init()
945 if (!irqc) { in aic_of_ic_init()
950 irqc->base = regs; in aic_of_ic_init()
956 irqc->info = *(struct aic_info *)match->data; in aic_of_ic_init()
958 aic_irqc = irqc; in aic_of_ic_init()
960 switch (irqc->info.version) { in aic_of_ic_init()
964 info = aic_ic_read(irqc, AIC_INFO); in aic_of_ic_init()
965 irqc->nr_irq = FIELD_GET(AIC_INFO_NR_IRQ, info); in aic_of_ic_init()
966 irqc->max_irq = AIC_MAX_IRQ; in aic_of_ic_init()
967 irqc->nr_die = irqc->max_die = 1; in aic_of_ic_init()
969 off = start_off = irqc->info.target_cpu; in aic_of_ic_init()
970 off += sizeof(u32) * irqc->max_irq; /* TARGET_CPU */ in aic_of_ic_init()
972 irqc->event = irqc->base; in aic_of_ic_init()
979 info1 = aic_ic_read(irqc, AIC2_INFO1); in aic_of_ic_init()
980 info3 = aic_ic_read(irqc, AIC2_INFO3); in aic_of_ic_init()
982 irqc->nr_irq = FIELD_GET(AIC2_INFO1_NR_IRQ, info1); in aic_of_ic_init()
983 irqc->max_irq = FIELD_GET(AIC2_INFO3_MAX_IRQ, info3); in aic_of_ic_init()
984 irqc->nr_die = FIELD_GET(AIC2_INFO1_LAST_DIE, info1) + 1; in aic_of_ic_init()
985 irqc->max_die = FIELD_GET(AIC2_INFO3_MAX_DIE, info3); in aic_of_ic_init()
987 off = start_off = irqc->info.irq_cfg; in aic_of_ic_init()
988 off += sizeof(u32) * irqc->max_irq; /* IRQ_CFG */ in aic_of_ic_init()
990 irqc->event = of_iomap(node, 1); in aic_of_ic_init()
991 if (WARN_ON(!irqc->event)) in aic_of_ic_init()
998 irqc->info.sw_set = off; in aic_of_ic_init()
999 off += sizeof(u32) * (irqc->max_irq >> 5); /* SW_SET */ in aic_of_ic_init()
1000 irqc->info.sw_clr = off; in aic_of_ic_init()
1001 off += sizeof(u32) * (irqc->max_irq >> 5); /* SW_CLR */ in aic_of_ic_init()
1002 irqc->info.mask_set = off; in aic_of_ic_init()
1003 off += sizeof(u32) * (irqc->max_irq >> 5); /* MASK_SET */ in aic_of_ic_init()
1004 irqc->info.mask_clr = off; in aic_of_ic_init()
1005 off += sizeof(u32) * (irqc->max_irq >> 5); /* MASK_CLR */ in aic_of_ic_init()
1006 off += sizeof(u32) * (irqc->max_irq >> 5); /* HW_STATE */ in aic_of_ic_init()
1008 if (!irqc->info.fast_ipi) in aic_of_ic_init()
1011 if (!irqc->info.local_fast_ipi) in aic_of_ic_init()
1014 irqc->info.die_stride = off - start_off; in aic_of_ic_init()
1016 irqc->hw_domain = irq_domain_create_tree(of_node_to_fwnode(node), in aic_of_ic_init()
1017 &aic_irq_domain_ops, irqc); in aic_of_ic_init()
1018 if (WARN_ON(!irqc->hw_domain)) in aic_of_ic_init()
1021 irq_domain_update_bus_token(irqc->hw_domain, DOMAIN_BUS_WIRED); in aic_of_ic_init()
1023 if (aic_init_smp(irqc, node)) in aic_of_ic_init()
1031 build_fiq_affinity(irqc, chld); in aic_of_ic_init()
1039 for (die = 0; die < irqc->nr_die; die++) { in aic_of_ic_init()
1040 for (i = 0; i < BITS_TO_U32(irqc->nr_irq); i++) in aic_of_ic_init()
1041 aic_ic_write(irqc, irqc->info.mask_set + off + i * 4, U32_MAX); in aic_of_ic_init()
1042 for (i = 0; i < BITS_TO_U32(irqc->nr_irq); i++) in aic_of_ic_init()
1043 aic_ic_write(irqc, irqc->info.sw_clr + off + i * 4, U32_MAX); in aic_of_ic_init()
1044 if (irqc->info.target_cpu) in aic_of_ic_init()
1045 for (i = 0; i < irqc->nr_irq; i++) in aic_of_ic_init()
1046 aic_ic_write(irqc, irqc->info.target_cpu + off + i * 4, 1); in aic_of_ic_init()
1047 off += irqc->info.die_stride; in aic_of_ic_init()
1050 if (irqc->info.version == 2) { in aic_of_ic_init()
1051 u32 config = aic_ic_read(irqc, AIC2_CONFIG); in aic_of_ic_init()
1054 aic_ic_write(irqc, AIC2_CONFIG, config); in aic_of_ic_init()
1085 irqc->nr_irq, irqc->max_irq, irqc->nr_die, irqc->max_die, AIC_NR_FIQ, AIC_NR_SWIPI); in aic_of_ic_init()
1090 irq_domain_remove(irqc->hw_domain); in aic_of_ic_init()
1092 if (irqc->event && irqc->event != irqc->base) in aic_of_ic_init()
1093 iounmap(irqc->event); in aic_of_ic_init()
1094 iounmap(irqc->base); in aic_of_ic_init()
1095 kfree(irqc); in aic_of_ic_init()