211 static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain,  in ipmmu_ctx_read_root()  argument
214 	return ipmmu_ctx_read(domain->mmu->root, domain->context_id, reg);  in ipmmu_ctx_read_root()
217 static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain,  in ipmmu_ctx_write_root()  argument
220 	ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);  in ipmmu_ctx_write_root()
223 static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain,  in ipmmu_ctx_write_all()  argument
226 	if (domain->mmu != domain->mmu->root)  in ipmmu_ctx_write_all()
227 		ipmmu_ctx_write(domain->mmu, domain->context_id, reg, data);  in ipmmu_ctx_write_all()
229 	ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);  in ipmmu_ctx_write_all()
254 static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain)  in ipmmu_tlb_sync()  argument
260 				     false, domain, IMCTR))  in ipmmu_tlb_sync()
261 		dev_err_ratelimited(domain->mmu->dev,  in ipmmu_tlb_sync()
265 static void ipmmu_tlb_invalidate(struct ipmmu_vmsa_domain *domain)  in ipmmu_tlb_invalidate()  argument
269 	reg = ipmmu_ctx_read_root(domain, IMCTR);  in ipmmu_tlb_invalidate()
271 	ipmmu_ctx_write_all(domain, IMCTR, reg);  in ipmmu_tlb_invalidate()
273 	ipmmu_tlb_sync(domain);  in ipmmu_tlb_invalidate()
279 static void ipmmu_utlb_enable(struct ipmmu_vmsa_domain *domain,  in ipmmu_utlb_enable()  argument
282 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_utlb_enable()
292 	ipmmu_imuctr_write(mmu, utlb, IMUCTR_TTSEL_MMU(domain->context_id) |  in ipmmu_utlb_enable()
294 	mmu->utlb_ctx[utlb] = domain->context_id;  in ipmmu_utlb_enable()
300 static void ipmmu_utlb_disable(struct ipmmu_vmsa_domain *domain,  in ipmmu_utlb_disable()  argument
303 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_utlb_disable()
311 	struct ipmmu_vmsa_domain *domain = cookie;  in ipmmu_tlb_flush_all()  local
313 	ipmmu_tlb_invalidate(domain);  in ipmmu_tlb_flush_all()
332 					 struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_allocate_context()  argument
341 		mmu->domains[ret] = domain;  in ipmmu_domain_allocate_context()
364 static void ipmmu_domain_setup_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_setup_context()  argument
370 	ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr;  in ipmmu_domain_setup_context()
371 	ipmmu_ctx_write_root(domain, IMTTLBR0, ttbr);  in ipmmu_domain_setup_context()
372 	ipmmu_ctx_write_root(domain, IMTTUBR0, ttbr >> 32);  in ipmmu_domain_setup_context()
379 	if (domain->mmu->features->twobit_imttbcr_sl0)  in ipmmu_domain_setup_context()
384 	if (domain->mmu->features->cache_snoop)  in ipmmu_domain_setup_context()
388 	ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE | tmp);  in ipmmu_domain_setup_context()
391 	ipmmu_ctx_write_root(domain, IMMAIR0,  in ipmmu_domain_setup_context()
392 			     domain->cfg.arm_lpae_s1_cfg.mair);  in ipmmu_domain_setup_context()
395 	if (domain->mmu->features->setup_imbuscr)  in ipmmu_domain_setup_context()
396 		ipmmu_ctx_write_root(domain, IMBUSCR,  in ipmmu_domain_setup_context()
397 				     ipmmu_ctx_read_root(domain, IMBUSCR) &  in ipmmu_domain_setup_context()
404 	ipmmu_ctx_write_root(domain, IMSTR, ipmmu_ctx_read_root(domain, IMSTR));  in ipmmu_domain_setup_context()
413 	ipmmu_ctx_write_all(domain, IMCTR,  in ipmmu_domain_setup_context()
417 static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_init_context()  argument
432 	domain->cfg.quirks = IO_PGTABLE_QUIRK_ARM_NS;  in ipmmu_domain_init_context()
433 	domain->cfg.pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K;  in ipmmu_domain_init_context()
434 	domain->cfg.ias = 32;  in ipmmu_domain_init_context()
435 	domain->cfg.oas = 40;  in ipmmu_domain_init_context()
436 	domain->cfg.tlb = &ipmmu_flush_ops;  in ipmmu_domain_init_context()
437 	domain->io_domain.geometry.aperture_end = DMA_BIT_MASK(32);  in ipmmu_domain_init_context()
438 	domain->io_domain.geometry.force_aperture = true;  in ipmmu_domain_init_context()
443 	domain->cfg.coherent_walk = false;  in ipmmu_domain_init_context()
444 	domain->cfg.iommu_dev = domain->mmu->root->dev;  in ipmmu_domain_init_context()
449 	ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);  in ipmmu_domain_init_context()
453 	domain->context_id = ret;  in ipmmu_domain_init_context()
455 	domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg,  in ipmmu_domain_init_context()
456 					   domain);  in ipmmu_domain_init_context()
457 	if (!domain->iop) {  in ipmmu_domain_init_context()
458 		ipmmu_domain_free_context(domain->mmu->root,  in ipmmu_domain_init_context()
459 					  domain->context_id);  in ipmmu_domain_init_context()
463 	ipmmu_domain_setup_context(domain);  in ipmmu_domain_init_context()
467 static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_destroy_context()  argument
469 	if (!domain->mmu)  in ipmmu_domain_destroy_context()
478 	ipmmu_ctx_write_all(domain, IMCTR, IMCTR_FLUSH);  in ipmmu_domain_destroy_context()
479 	ipmmu_tlb_sync(domain);  in ipmmu_domain_destroy_context()
480 	ipmmu_domain_free_context(domain->mmu->root, domain->context_id);  in ipmmu_domain_destroy_context()
487 static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_irq()  argument
490 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_domain_irq()
494 	status = ipmmu_ctx_read_root(domain, IMSTR);  in ipmmu_domain_irq()
498 	iova = ipmmu_ctx_read_root(domain, IMELAR);  in ipmmu_domain_irq()
500 		iova |= (u64)ipmmu_ctx_read_root(domain, IMEUAR) << 32;  in ipmmu_domain_irq()
508 	ipmmu_ctx_write_root(domain, IMSTR, 0);  in ipmmu_domain_irq()
527 	if (!report_iommu_fault(&domain->io_domain, mmu->dev, iova, 0))  in ipmmu_domain_irq()
567 	struct ipmmu_vmsa_domain *domain;  in ipmmu_domain_alloc_paging()  local
569 	domain = kzalloc(sizeof(*domain), GFP_KERNEL);  in ipmmu_domain_alloc_paging()
570 	if (!domain)  in ipmmu_domain_alloc_paging()
573 	mutex_init(&domain->mutex);  in ipmmu_domain_alloc_paging()
575 	return &domain->io_domain;  in ipmmu_domain_alloc_paging()
580 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_domain_free()  local
586 	ipmmu_domain_destroy_context(domain);  in ipmmu_domain_free()
587 	free_io_pgtable_ops(domain->iop);  in ipmmu_domain_free()
588 	kfree(domain);  in ipmmu_domain_free()
596 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_attach_device()  local
605 	mutex_lock(&domain->mutex);  in ipmmu_attach_device()
607 	if (!domain->mmu) {  in ipmmu_attach_device()
609 		domain->mmu = mmu;  in ipmmu_attach_device()
610 		ret = ipmmu_domain_init_context(domain);  in ipmmu_attach_device()
613 			domain->mmu = NULL;  in ipmmu_attach_device()
616 				 domain->context_id);  in ipmmu_attach_device()
618 	} else if (domain->mmu != mmu) {  in ipmmu_attach_device()
625 		dev_info(dev, "Reusing IPMMU context %u\n", domain->context_id);  in ipmmu_attach_device()
627 	mutex_unlock(&domain->mutex);  in ipmmu_attach_device()
633 		ipmmu_utlb_enable(domain, fwspec->ids[i]);  in ipmmu_attach_device()
643 	struct ipmmu_vmsa_domain *domain;  in ipmmu_iommu_identity_attach()  local
649 	domain = to_vmsa_domain(io_domain);  in ipmmu_iommu_identity_attach()
651 		ipmmu_utlb_disable(domain, fwspec->ids[i]);  in ipmmu_iommu_identity_attach()
672 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_map()  local
674 	return domain->iop->map_pages(domain->iop, iova, paddr, pgsize, pgcount,  in ipmmu_map()
682 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_unmap()  local
684 	return domain->iop->unmap_pages(domain->iop, iova, pgsize, pgcount, gather);  in ipmmu_unmap()
689 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_flush_iotlb_all()  local
691 	if (domain->mmu)  in ipmmu_flush_iotlb_all()
692 		ipmmu_tlb_flush_all(domain);  in ipmmu_flush_iotlb_all()
704 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_iova_to_phys()  local
708 	return domain->iop->iova_to_phys(domain->iop, iova);  in ipmmu_iova_to_phys()